Iwagaki Tsuyoshi 岩垣剛

… Alternative Names

IWAGAKI Tsuyoshi 岩垣剛

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Researcher Number	00397845
Other IDs
Affiliation (Current)	2025: 広島市立大学, 情報科学研究科, 助教
Affiliation (based on the past Project Information) *help	2015 – 2023: 広島市立大学, 情報科学研究科, 助教 2012: 広島市立大学, 情報科学研究科, 助教 2010 – 2011: 北陸先端科学技術大学院大学, 情報科学研究科, 助教
Review Section/Research Field	Principal Investigator Basic Section 60040:Computer system-related / Computer system / Computer system/Network
Keywords	Principal Investigator 耐故障設計 / ソフトエラー / 非同期式回路 / 相関強化 / ストカスティックコンピューティング / 確率的演算 / 演算チェイニング / スケジューリング / ハンドシェイク遅延 / 4相2線式 … More / 演算器バインディング / エラー訂正 / エラー検出 / フォールトトレランス / ディペンダブルコンピューティング / 遅延故障 / 劣化故障 / 一時故障 / 高位合成 / スキャンチェーン順序 / ホールド違反検出 / テストスケジューリング / 集積回路 / 変数割当て順序 / インスタンスの類似度 / 解の再利用 / 消費電力 / ホールド違反 / 検出故障数最大化 / テストパターン数最小化 / 整数計画問題 / ホールドタイム故障 / テスト数最小化 / 電力制約下テスト / ホールドタイム違反 / クロックスキュー / 非同期インターコネクト / 充足可能性問題 / 整数計画法 / テスト生成 Less

Research Projects
(3 results)
Research Products
(29 results)

確率的演算に基づく非同期式回路の設計と高信頼化に関する研究Principal Investigator
- Principal Investigator
  
  岩垣剛
- Project Period (FY)
  2019 – 2024
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Review Section
  
  Basic Section 60040:Computer system-related
- Research Institution
  Hiroshima City University
Studies on Design of Reliable Asynchronous Circuits for Transient Fault Tolerance in the FieldPrincipal Investigator
- Principal Investigator
  
  Iwagaki Tsuyoshi
- Project Period (FY)
  2015 – 2018
- Research Category
  
  Grant-in-Aid for Young Scientists (B)
- Research Field
  
  Computer system
- Research Institution
  Hiroshima City University
A Systematic Test Generation Approach to Achieving VariousTest Qualities for LSIs Based on Mathematical ProgrammingPrincipal Investigator
- Principal Investigator
  
  IWAGAKI Tsuyoshi
- Project Period (FY)
  2010 – 2012
- Research Category
  
  Grant-in-Aid for Young Scientists (B)
- Research Field
  
  Computer system/Network
- Research Institution
  Hiroshima City University
  Japan Advanced Institute of Science and Technology

All 2021 2020 2019 2017 2016 2015 2013 2012 2011 2010

All Journal Article Presentation

[Journal Article] A Design of Fully Stochastic Computing Neurons Focused on the Gain of Sigmoid Functions2021
- Author(s)
  可児冬弥, 市原英行, 岩垣剛, 井上智生
- Journal Title
  
  電子情報通信学会論文誌D 情報・システム
  
  Volume: J104-D Issue: 7 Pages: 552-561
- DOI
  10.14923/transinfj.2020FIP0008
- ISSN
  1880-4535, 1881-0225
- Year and Date
  2021-07-01
- Language
  Japanese
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-19K11880
[Journal Article] Transient Fault Tolerant State Assignment for Stochastic Computing Based on Linear Finite State Machines2020
- Author(s)
  Hideyuki Ichihara, Motoi Fukuda, Tsuyoshi Iwagaki and Tomoo Inoue
- Journal Title
  
  IEICE Trans. Fundamentals
  
  Volume: E103.A Issue: 12 Pages: 1464-1471
- DOI
  10.1587/transfun.2020VLP0013
- NAID
  130007948289
- ISSN
  0916-8508, 1745-1337
- Year and Date
  2020-12-01
- Language
  English
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-19K11880
[Journal Article] Flexible test scheduling for an asynchronous on-chip interconnect through special data transfer2011
- Author(s)
  Tsuyoshi Iwagaki, Eiri Takeda and Mineo Kaneko
- Journal Title
  
  IEICE Trans. on Fundamentals
  
  Volume: E94-A Pages: 2563-2570
- NAID
  10030533654
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22700049
[Journal Article] Fiexible test scheduling for an asynchronous on-chip interconnect through special data transfer2011
- Author(s)
  Tsuyoshi Iwagaki
- Journal Title
  
  IEICE Trans.on Fundamentals
  
  Volume: E94-A Pages: 2563-2570
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22700049
[Presentation] ドントケア拡大を用いたエラートレラントアプリケーションのための多出力論理関数の簡単化2020
- Author(s)
  森川範茂, 青野優里, 市原英行, 岩垣剛, 井上智生
- Organizer
  第82回FTC研究会
- Data Source
  KAKENHI-PROJECT-19K11880
[Presentation] ストカスティック計算に基づくニューラルネットワークにおけるシグモイド関数の演算精度に関する解析2020
- Author(s)
  可児冬弥, 瀬戸信明, 市原英行, 岩垣剛, 井上智生
- Organizer
  DAシンポジウム
- Data Source
  KAKENHI-PROJECT-19K11880
[Presentation] ストカスティックコンピューティングにおけるシグモイド関数実装法に関する考察2020
- Author(s)
  可児冬弥, 瀬戸信明, 市原英行, 岩垣剛, 井上智生
- Organizer
  第82回FTC研究会
- Data Source
  KAKENHI-PROJECT-19K11880
[Presentation] An empirical approach to RTL scan path design focusing on structural interpretation in logic synthesis2019
- Author(s)
  Tsuyoshi Iwagaki, Sho Yuasa, Hideyuki Ichihara and Tomoo Inoue
- Organizer
  3rd IEEE International Test Conference in Asia
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-19K11880
[Presentation] State encoding with stochastic numbers for transient fault tolerant linear finite state machines2019
- Author(s)
  Hideyuki Ichihara, Yuki Maeda, Tsuyoshi Iwagaki and Tomoo Inoue
- Organizer
  32nd IEEE Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-19K11880
[Presentation] Impact of operational unit binding on aging-induced degradation in high-level synthesis for asynchronous systems2017
- Author(s)
  Tsuyoshi Iwagaki, Kohta Itani, Hideyuki Ichihara and Tomoo Inoue
- Organizer
  IEICE Technical Report (DC2016-78)
- Place of Presentation
  東京
- Year and Date
  2017-02-21
- Data Source
  KAKENHI-PROJECT-15K15961
[Presentation] Exploration of four-phase dual-rail asynchronous RTL design for delay-robustness2016
- Author(s)
  Tsuyoshi Iwagaki, Kohta Itani, Hideyuki Ichihara and Tomoo Inoue
- Organizer
  17th IEEE Workshop on RTL and High Level Testing (WRTLT '16)
- Place of Presentation
  広島
- Year and Date
  2016-11-25
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-15K15961
[Presentation] ハンドシェイク遅延を考慮した4相2線式非同期システムの高位合成におけるスケジューリングアルゴリズム2015
- Author(s)
  猪谷孝太，岩垣剛，市原英行，井上智生
- Organizer
  電子情報通信学会（デザインガイア，ディペンダブルコンピューティング研究会）
- Place of Presentation
  長崎県勤労福祉会館（長崎県長崎市）
- Year and Date
  2015-12-01
- Data Source
  KAKENHI-PROJECT-15K15961
[Presentation] 解の再利用によるテスト生成のためのハードウェアSATソルバの実装2013
- Author(s)
  向井俊矢, 上田健司, 岩垣剛, 市原英行, 井上智生
- Organizer
  信学技法
- Place of Presentation
  東京
- Year and Date
  2013-02-01
- Data Source
  KAKENHI-PROJECT-22700049
[Presentation] 解の再利用を用いたSATに基づくテスト生成におけるインスタンス順序と変数割当順序の決定法2012
- Author(s)
  上田健司, 岩垣剛, 市原英行, 井上智生
- Organizer
  信学技法
- Place of Presentation
  福岡
- Year and Date
  2012-11-01
- Data Source
  KAKENHI-PROJECT-22700049
[Presentation] Exact and heuristic methods of generating compact tests for hold-time violations2012
- Author(s)
  Tsuyoshi Iwagaki, HideyukiIchihara, Tomoo Inoue and Kewal K. Saluja
- Organizer
  Digest of Papers 13th IEEE Workshop on RTL and High Level Testing
- Place of Presentation
  Niigata
- Year and Date
  2012-11-01
- Data Source
  KAKENHI-PROJECT-22700049
[Presentation] Exact and heuristic methods of generating compact tests for hold-time violations2012
- Author(s)
  Tsuyoshi Iwagaki
- Organizer
  IEEE Workshop on RTL and High Level Testing (WRTLT)
- Place of Presentation
  新潟
- Data Source
  KAKENHI-PROJECT-22700049
[Presentation] A technique for SAT-based testgeneration through history of reusing solutions2012
- Author(s)
  Kenji Ueda, Fumiyuki Hafuri, Toshiya Mukai, Tsuyoshi Iwagaki, Hideyuki Ichihara and Tomoo Inoue
- Organizer
  Proc. 17th Workshop on Synthesis and System Integration of Mixed Information Technologies (SASIMI '12)
- Place of Presentation
  Oita
- Year and Date
  2012-03-01
- Data Source
  KAKENHI-PROJECT-22700049
[Presentation] On indirect detection of functional hold-time violations using scan shift operations2011
- Author(s)
  Tsuyoshi Iwagaki and Kewal K. Saluja
- Organizer
  IEICE Technical Report (FIIS-11-298)
- Place of Presentation
  Chiba
- Year and Date
  2011-03-01
- Data Source
  KAKENHI-PROJECT-22700049
[Presentation] Power-constrained test generation for hold-time faults using integer linear programming2011
- Author(s)
  Tsuyoshi Iwagaki and Kewal K. Saluja
- Organizer
  Proc. 4th IEEE International Workshop on Impact of Low-Power Design on Test and Reliability (LPonTR '11)
- Place of Presentation
  Trondheim (Norway)
- Year and Date
  2011-05-01
- Data Source
  KAKENHI-PROJECT-22700049
[Presentation] Power-constrained test generation for hold-time faults using integer linear programming2011
- Author(s)
  Tsuyoshi Iwagaki
- Organizer
  4th IEEE International Workshop on Impact of Low-Power Design on Test and Reliability
- Place of Presentation
  Gloshaugen Campus, Trondheim, Norway
- Year and Date
  2011-05-27
- Data Source
  KAKENHI-PROJECT-22700049
[Presentation] An approach to hardware SAT solvers for test generation based on instance similarity2011
- Author(s)
  Tsuyoshi Iwagaki, Fumiyuki Hafuri, Kenji Ueda, Toshiya Mukai, Hideyuki Ichihara and Tomoo Inoue
- Organizer
  Digest of Papers 12th IEEE Workshop on RTL and High Level Testing (WRTLT '11)
- Place of Presentation
  Jaipur (India)
- Year and Date
  2011-11-01
- Data Source
  KAKENHI-PROJECT-22700049
[Presentation] Indirect detection of clock skew induced hold-time violations on functional paths using scan shift operations2011
- Author(s)
  Tsuyoshi Iwagaki
- Organizer
  14th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems
- Place of Presentation
  Lindner Congress Hotel, Cottbus, Germany
- Year and Date
  2011-04-13
- Data Source
  KAKENHI-PROJECT-22700049
[Presentation] On indirect detection of functional hold-time violations using scan shift operations2011
- Author(s)
  岩垣剛
- Organizer
  第44回機能集積情報システム研究会
- Place of Presentation
  千葉大学(千葉県)
- Year and Date
  2011-03-07
- Data Source
  KAKENHI-PROJECT-22700049
[Presentation] An approach to hardware SAT solvers for test generation based on instance similarity2011
- Author(s)
  Tsuyoshi Iwagaki
- Organizer
  12th IEEE Workshop on RTL and High Level Testing
- Place of Presentation
  MNIT Jaipur, India
- Year and Date
  2011-11-26
- Data Source
  KAKENHI-PROJECT-22700049
[Presentation] Indirect detection of clock skew induced hold-time violations on functional paths using scan shift operations2011
- Author(s)
  Tsuyoshi Iwagaki and Kewal K. Saluja
- Organizer
  Proc. 14th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS '11)
- Place of Presentation
  Cottbus (Germany)
- Year and Date
  2011-04-01
- Data Source
  KAKENHI-PROJECT-22700049
[Presentation] An approach to test scheduling for asynchronous on-chip interconnects using integer programming2010
- Author(s)
  Tsuyoshi Iwagaki, Eiri Takeda and Mineo Kaneko
- Organizer
  Digest of Papers 11th IEEE Workshop on RTL and High Level Testing (WRTLT '10)
- Place of Presentation
  Shanghai (China)
- Year and Date
  2010-12-01
- Data Source
  KAKENHI-PROJECT-22700049
[Presentation] Test scheduling Algorithms for delay-insensitive chip area interconnects based on cone partitioning2010
- Author(s)
  岩垣剛
- Organizer
  3^<rd> International Workshop on Impact of Low-Power Design on Test and Reliability
- Place of Presentation
  Hotel Don Giovanni, Prague, Czech Republic
- Year and Date
  2010-05-28
- Data Source
  KAKENHI-PROJECT-22700049
[Presentation] Test scheduling algorithms for delay-insensitive chip area interconnects based on cone partitioning2010
- Author(s)
  Tsuyoshi Iwagaki, Eiri Takeda and Mineo Kaneko
- Organizer
  Proc. 3rd International Workshop on the Impact of Low-Power Design on Test and Reliability (LPonTR '10)
- Place of Presentation
  Prague (Czech republic)
- Year and Date
  2010-05-01
- Data Source
  KAKENHI-PROJECT-22700049
[Presentation] An approach to test scheduling for asynchronous on-chip interconnects using integer programming2010
- Author(s)
  岩垣剛
- Organizer
  IEEE 11^<th> Workshop on RTL and High Level Testing
- Place of Presentation
  Shanghai Sheraton Hotel, Shanghai, China
- Year and Date
  2010-12-06
- Data Source
  KAKENHI-PROJECT-22700049

Iwagaki Tsuyoshi 岩垣 剛

IWAGAKI Tsuyoshi 岩垣 剛

Research Projects

Research Products

確率的演算に基づく非同期式回路の設計と高信頼化に関する研究Principal Investigator

Principal Investigator

Project Period (FY)

Research Category

Review Section

Research Institution

Studies on Design of Reliable Asynchronous Circuits for Transient Fault Tolerance in the FieldPrincipal Investigator

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

A Systematic Test Generation Approach to Achieving VariousTest Qualities for LSIs Based on Mathematical ProgrammingPrincipal Investigator

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

[Journal Article] A Design of Fully Stochastic Computing Neurons Focused on the Gain of Sigmoid Functions2021

Author(s)

Journal Title

DOI

ISSN

Year and Date

Language

Data Source

[Journal Article] Transient Fault Tolerant State Assignment for Stochastic Computing Based on Linear Finite State Machines2020

Author(s)

Journal Title

DOI

NAID

ISSN

Year and Date

Language

Data Source

[Journal Article] Flexible test scheduling for an asynchronous on-chip interconnect through special data transfer2011

Author(s)

Journal Title

NAID

Data Source

[Journal Article] Fiexible test scheduling for an asynchronous on-chip interconnect through special data transfer2011

Author(s)

Journal Title

Data Source

[Presentation] ドントケア拡大を用いたエラートレラントアプリケーションのための多出力論理関数の簡単化2020

Author(s)

Organizer

Data Source

[Presentation] ストカスティック計算に基づくニューラルネットワークにおけるシグモイド関数の演算精度に関する解析2020

Author(s)

Organizer

Data Source

[Presentation] ストカスティックコンピューティングにおけるシグモイド関数実装法に関する考察2020

Author(s)

Organizer

Data Source

[Presentation] An empirical approach to RTL scan path design focusing on structural interpretation in logic synthesis2019

Author(s)

Organizer

Data Source

[Presentation] State encoding with stochastic numbers for transient fault tolerant linear finite state machines2019

Author(s)

Organizer

Data Source

[Presentation] Impact of operational unit binding on aging-induced degradation in high-level synthesis for asynchronous systems2017

Author(s)

Organizer

Place of Presentation

Year and Date

Data Source

[Presentation] Exploration of four-phase dual-rail asynchronous RTL design for delay-robustness2016

Author(s)

Organizer

Place of Presentation

Year and Date

Data Source

Iwagaki Tsuyoshi 岩垣剛

IWAGAKI Tsuyoshi 岩垣剛