KISHINE Keiji 岸根桂路

Researcher Number	20512776
Other IDs
Affiliation (Current)	2025: 滋賀県立大学, 工学部, 教授
Affiliation (based on the past Project Information) *help	2015 – 2023: 滋賀県立大学, 工学部, 教授 2011 – 2014: 滋賀県立大学, 工学部, 准教授
Review Section/Research Field	Principal Investigator Communication/Network engineering / Basic Section 21020:Communication and network engineering-related
Keywords	Principal Investigator 高速 / 変調 / チャネル / 集積回路 / 通信方式 / ネットワーク / 回路 / 光通信 / 65nm / CMOS … More / 微細デバイス / LSI / 符号化 / データ重畳 / 4値　パルス振幅変調 / 集積 / 4値パルス振幅変調 / 高速伝送 / パルス振幅変調 / PAM４ / 伝送効率 / 高性能 / 高周波回路 / PAM4 / 4 値パルス振幅変調 / 通信 / 制御インタフェース / CMOSデバイス / 装置内回路 / 終端装置 / 中継装置 / 無線インタフェース / 小型 / 制御 / インタフェース回路 / マルチポート / シングルチャネル / 光通信システム装置 / 制御システム / 無線 / インタフェース / 制御回路 / 高分解能 / 線形性 / ラベリング / 伝送 / フレーム信号 / 多重化 / 高効率 / 通信システム / ルーティング / ネットワーク監視 / 周波数ラッピング / 高速回路 / 低雑音 / 低ジッタ / VCO / 瞬時同期 / 安定動作 / 極微細デバイス / ロバスト / 超高速 / 同期回路 / 光フロントエンド / メタスタビリティ / フリップフロップ / アナログ回路 Less

Add-on technique of Monitoring data for 4-Level PAM4 transmission systemPrincipal Investigator
- Principal Investigator
  
  Kishine Keiji
- Project Period (FY)
  2020 – 2023
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Review Section
  
  Basic Section 21020:Communication and network engineering-related
- Research Institution
  The University of Shiga Prefecture
The research on single-channel multi-port control interface circuitPrincipal Investigator
- Principal Investigator
  
  Keiji Kishine
- Project Period (FY)
  2017 – 2019
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  Communication/Network engineering
- Research Institution
  The University of Shiga Prefecture
Development of an Additional-data-wrapping Circuit for a Network MonitoringPrincipal Investigator
- Principal Investigator
  
  Kieiji Kisshine
- Project Period (FY)
  2014 – 2017
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  Communication/Network engineering
- Research Institution
  The University of Shiga Prefecture
The robust clock and data recovery circuit for high-speed communication systemPrincipal Investigator
- Principal Investigator
  
  KISHINE Keiji
- Project Period (FY)
  2011 – 2013
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  Communication/Network engineering
- Research Institution
  The University of Shiga Prefecture

All 2024 2022 2021 2020 2019 2018 2017 2016 2015 2014 2013 2012 2011 Other

All Journal Article Presentation

[Journal Article] FPGA-based binary labeling signal transmission system2019
- Author(s)
  T. Inoue, K. Nomura, R. Noguchi, N. Koda, A. Tsuchiya, and K. Kishine
- Journal Title
  
  Journal of Semiconductor Technology and Science
  
  Volume: 19 Issue: 3 Pages: 276-286
- DOI
  10.5573/jsts.2019.19.3.276
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-19K14998, KAKENHI-PROJECT-17K06433
[Journal Article] 10-Gb/s Data Frame Generation Circuit with Frequency Modulation in 65-nm CMOS2018
- Author(s)
  Hiromu Uemura, Kosuke Furuichi, Natsuyuki Koda, Hiromi Inaba, and Keiji Kishine
- Journal Title
  
  IEIE JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
  
  Volume: 18 Issue: 2 Pages: 238-245
- DOI
  10.5573/jsts.2018.18.2.238
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-17K06433
[Journal Article] Design of High-linearity Delay Detection Circuit for 10-Gb/s Communication System in 65-nm CMOS2017
- Author(s)
  Kosuke Furuichi, Hiromu Uemura, Natsuyuki Koda, Hiromi Inaba, and Keiji Kishine
- Journal Title
  
  IEIE JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
  
  Volume: 17 Issue: 6 Pages: 742-749
- DOI
  10.5573/jsts.2017.17.6.742
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-26420364
[Journal Article] Simple and Low Power Highly Sensitive Frequency Demodulator Circuit for 10-Gb/s Transmission System　for Labeling Signal2017
- Author(s)
  Natsuyuki Koda, Kosuke Furuichi, Hiromu Uemura, Hiromi Inaba, and Keiji Kishine
- Journal Title
  
  IEIE JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
  
  Volume: 17 Issue: 6 Pages: 733-740
- DOI
  10.5573/jsts.2017.17.6.733
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-26420364
[Journal Article] Simple Routing Control System for 10 Gb/s Data Transmission Using a Frequency Modulation Technique2016
- Author(s)
  Daichi Omoto, Keiji Kishine*, Hiromi Inaba, and Tomoki Tanaka
- Journal Title
  
  IEIE Transactions on Smart Processing and Computing
  
  Volume: vol. 5, no. 3 Issue: 3 Pages: 199-206
- DOI
  10.5573/ieiespc.2016.5.3.199
- Peer Reviewed / Acknowledgement Compliant / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26420364
[Journal Article] A 32-Gb/s Inductorless Output Buffer Circuit with Adjustable Pre-emphasis in 65-nm CMOS2016
- Author(s)
  Tomoki Tanaka, Keiji Kishine, Akira Tsuchiya, Hiromi Inaba, and Daichi Omoto
- Journal Title
  
  IEIE Transactions on Smart Processing and Computing
  
  Volume: vol. 5, no. 3 Issue: 3 Pages: 207-214
- DOI
  10.5573/ieiespc.2016.5.3.207
- Peer Reviewed / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26420364
[Journal Article] A Multi-Rate Burst-Mode CDR Using a GVCO With Symmetric Loops for Instantaneous Phase Locking in 65-nm CMOS2015
- Author(s)
  Keiji Kishine, Hiromi Inaba, Makoto Nakamura, Akira Tsuchiya, Hiroaki Katsurai, Hidetoshi Onodera
- Journal Title
  
  IEEE Transactions on Circuits and Systems. I
  
  Volume: vol. 62, no. 5 Issue: 5 Pages: 1288-1295
- DOI
  10.1109/tcsi.2015.2416812
- Peer Reviewed / Acknowledgement Compliant
- Data Source
  KAKENHI-PROJECT-26420364
[Journal Article] Area effective inductive peaking with interwoven inductor for high speed Laser Diode Driver for Optical Communication System2012
- Author(s)
  Takeshi Kuboki, Yusuke Ohtomo, Akira Tsuchiya, Keiji Kishine and Hidetoshi Onodera
- Journal Title
  
  IEICE Transactions on Communications
  
  Volume: E95.A,No.2 Pages: 479-486
- NAID
  10030607634
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23560462
[Journal Article] Area-effective inductive peaking with interwoven inductor for high-speed Laser-Diode Driver for Optical Communication System2012
- Author(s)
  Takeshi KUBOKI, Yusuke OHTOMOyyb), Akira TSUCHIYA, Keiji KISHINE and Hidetoshi ONODERA
- Journal Title
  
  IEICE TRANS. FUNDAMENTALS
  
  Volume: VOL.E95-A Pages: 479-486
- NAID
  10030607634
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23560462
[Presentation] 周波数変調によるデータ管理情報重畳PAM4伝送システムにおける付加情報抽出のための受信回路の検討2024
- Author(s)
  中塩屋真也,井上敏之,土谷亮,岸根桂路
- Organizer
  電子情報通信学会　総合大会(2024)
- Data Source
  KAKENHI-PROJECT-20K04469
[Presentation] A preamplifier circuit with offset-voltage control technique for 50-Gb/s CMOS PAM4 receiver2022
- Author(s)
  M. Miyabe, T. Inoue, M. Inoue, S. Nakashioya, A. Tsuchiya, and K. Kishine
- Organizer
  International Conference on Electronics, Information, and Communication (ICEIC) 2022
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-20K04469
[Presentation] PAM4伝送システムへの周波数変調技術適応の検討2022
- Author(s)
  中塩屋真也, 宮部雅也, 井上敏之, 土谷亮, 岸根桂路
- Organizer
  2022年電子情報通信学会総合大会
- Data Source
  KAKENHI-PROJECT-20K04469
[Presentation] Smart Computational Resource Distribution System with Automatic Classification Interface for CPS2022
- Author(s)
  Yuuki Teramura, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine
- Organizer
  19th IEEE International SoC Design Conference (ISOCC 2022)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-20K04469
[Presentation] 5-Gb/s PAM4 Transmitter IC Using Compensation Circuit in an 180nm CMOS2021
- Author(s)
  Yudai Ichii, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine
- Organizer
  International Conference on Electronics, Information, and Communication (ICEIC) 2021
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-20K04469
[Presentation] オフセット制御機能付きプリアンプを用いたPAM4レシーバの出力性能向上に向けた検討2021
- Author(s)
  宮部雅也，井上敏之，土谷　亮，岸根桂路
- Organizer
  電子情報通信学会　ソサイエティ大会　A-1-17
- Data Source
  KAKENHI-PROJECT-20K04469
[Presentation] シングルチャネルマルチポート制御システムにおける送受信回路デジタル化の検討2020
- Author(s)
  今城篤人・井上敏之・木村山紫郎・西口健太・土谷　亮・岸根桂路
- Organizer
  電子情報通信学会総合大会（2020)
- Data Source
  KAKENHI-PROJECT-17K06433
[Presentation] Processing Time Reduction for JPEG Compression　Using Pixel Array Conversion2020
- Author(s)
  Rei Yamazaki, Toshiyuki Inoue, Akira Tsuchiya, and Keiji Kishine
- Organizer
  The 17th International SoC Conference (ISOCC 2020)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-20K04469
[Presentation] Optimization Technique of Memory Traffic for FPGA-Based Image Processing System2019
- Author(s)
  Kenta Nishiguchi, Toshiyuki Inoue, Akira Tsuchiya, Kazunori Ogohara, Keiji Kishine
- Organizer
  16th International SoC Design Conference (ISOCC 2019)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-17K06433
[Presentation] Suitable-Compensation Circuit Design for a PAM4 Transmitter in 180-nm CMOS2019
- Author(s)
  Yudai Ichii, Ryosuke Noguchi, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine
- Organizer
  16th International SoC Design Conference (ISOCC 2019)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-17K06433
[Presentation] Frequency Discriminator Using a Simple AD Converter for Interface Systems2019
- Author(s)
  Sanshiro Kimura, Atsuto Imajo, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine
- Organizer
  16th International SoC Design Conference (ISOCC 2019)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-17K06433
[Presentation] シングルチャネルシステム実現に向けた周波数識別回路の検討2019
- Author(s)
  今城篤人，野口凌輔，井上敏之，土谷亮，岸根桂路
- Organizer
  電子情報通信学会総合大会
- Data Source
  KAKENHI-PROJECT-17K06433
[Presentation] A 25-Gb/s 13mW Clock and Data Recovery Using C2MOS D-Flip-Flop in 65nm CMOS2018
- Author(s)
  Ryosuke Noguchi, Kosuke Furuichi, Hiromu Uemura, Toshiyuki Inoue, AkiraTsuchiya, Keiji Kishine,Hiroaki Katsurai, Shinsuke Nakano, Hideyuki Nosaka
- Organizer
  The 2018 International Symposium on VLSI Design, Automation and Test (2018 VLSI-DAT)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-17K06433
[Presentation] XBeeと脈波センサを用いた自律神経機能検知システムの検討2018
- Author(s)
  牧将平，荒内航貴，水野佑哉，井上敏之，土谷亮，岸根桂路
- Organizer
  電気学会電子回路研究会
- Data Source
  KAKENHI-PROJECT-17K06433
[Presentation] A 25-Gb/s Low-Power Clock and Data Recovery with an ActiveStabilizing CML-CMOS Conversion2018
- Author(s)
  Ryosuke Noguchi, Atsuto Imajo, Toshiyuki Inoue, Akira Tsuchiya, and Keiji Kishine
- Organizer
  The 25th IEEE International Conference on Electronics Circuits and Systems (ICECS 2018)
- Data Source
  KAKENHI-PROJECT-17K06433
[Presentation] ウェアラブルセンサと簡易無線モジュールによる筋疲労計測システムの検討2018
- Author(s)
  水野佑哉，牧将平，荒内航貴，井上敏之，土谷亮，岸根桂路
- Organizer
  電子情報通信学会総合大会
- Data Source
  KAKENHI-PROJECT-17K06433
[Presentation] 脈拍センサを用いた呼吸統制下における自律神経状態推定システムの検討2018
- Author(s)
  牧将平，井上敏之，土谷亮，岸根桂路
- Organizer
  電気関係学会関西連合大会
- Data Source
  KAKENHI-PROJECT-17K06433
[Presentation] キャリア周波数識別の高分解能化を目指したディスチャージ遅延回路の検討2018
- Author(s)
  木村山紫郎，井上敏之，野口凌輔，土谷亮，岸根桂路
- Organizer
  電気関係学会関西連合大会
- Data Source
  KAKENHI-PROJECT-17K06433
[Presentation] 100-Gb/s低電力光通信トランシーバ用CML-CMOSレベル変換回路の検討2018
- Author(s)
  野口凌輔，香田夏幸，野村幸平，土谷亮，井上敏之，岸根桂路
- Organizer
  電子情報通信学会総合大会
- Data Source
  KAKENHI-PROJECT-17K06433
[Presentation] 入出力インタフェースを実装したFPGAリアルタイム画像処理システムの構築2018
- Author(s)
  西口健太，井上敏之，小郷原一智，土谷亮，岸根桂路
- Organizer
  電子情報通信学会ソサイエティ大会
- Data Source
  KAKENHI-PROJECT-17K06433
[Presentation] Low-Power and High-Linearity Inductorless Low-Noise Amplifiers with Active-Shunt-Feedback 　in 65-nm CMOS Technology2018
- Author(s)
  Toshiyuki Inoue, Ryosuke Noguchi, Akira Tsuchiya, Keiji Kishine, and Hidetoshi Onodera
- Organizer
  The 61st IEEE International Midwest Symposium on Circuits and Systems (MWSCAS2018)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-17K06433
[Presentation] XBeeと複数ウェアラブルセンサによる高齢者見守り検知システムの検討2017
- Author(s)
  牧将平，荒内航貴，森本安紀，土谷亮，井上敏之，岸根桂路
- Organizer
  電気関係学会連合大会
- Data Source
  KAKENHI-PROJECT-17K06433
[Presentation] ラべリング信号伝送システムにおける受信回路高速化の検討2017
- Author(s)
  香田夏幸，古市康祐，植村宙夢，荒内航貴，野村幸平，岸根桂路
- Organizer
  電子情報通信学会総合大会
- Place of Presentation
  名城大学　天白キャンパス（名古屋市）
- Year and Date
  2017-03-22
- Data Source
  KAKENHI-PROJECT-26420364
[Presentation] 25-Gb/sCDRの低消費電力化を目指したD-FFの比較検討2017
- Author(s)
  野口凌輔，岸根桂路，古市康祐，植村宙夢，桂井宏明・中野慎介・野坂秀之・野河正史
- Organizer
  電子情報通信学会総合大会
- Place of Presentation
  名城大学　天白キャンパス（名古屋市）
- Year and Date
  2017-03-22
- Data Source
  KAKENHI-PROJECT-26420364
[Presentation] FPGAによるフレーム信号変調システムの検討2017
- Author(s)
  野村幸平，植村宙夢，古市康祐，岸根桂路
- Organizer
  電子情報通信学会総合大会
- Place of Presentation
  名城大学　天白キャンパス（名古屋市）
- Year and Date
  2017-03-22
- Data Source
  KAKENHI-PROJECT-26420364
[Presentation] Compact Implementation IIR filter in FPGA for Noise Reduction of Sensor Signal2017
- Author(s)
  Koki Arauchi, Shohei Maki,Toshiyuki Inoue, Akira Tsuchiya, and Keiji Kishine
- Organizer
  2017 IEEE International SoC Design Conference
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26420364
[Presentation] FPGAを用いたFIRフィルタによる脈拍センサ信号の雑音除去2017
- Author(s)
  荒内航貴，森本安紀，作田健，植村宙夢，香田夏幸，岸根桂路
- Organizer
  電子情報通信学会総合大会
- Place of Presentation
  名城大学　天白キャンパス（名古屋市）
- Year and Date
  2017-03-22
- Data Source
  KAKENHI-PROJECT-26420364
[Presentation] 25-Gb/s Clock and Data Recovery IC Using Latch Load Combined with CML Buffer Circuit for Delay Generation with 65-nm CMOS2017
- Author(s)
  Tomonori Tanaka, Kosuke Furuichi, Hiromu Uemura, Ryosuke Noguchi, Natsuyuki Koda, Koki Arauchi, 　Daichi Omoto, Hiromi Inaba, Shinsuke Nakano, Masafumi Nogawa, Hideyuki Nosaka and Keiji Kishine
- Organizer
  2017 IEEE International Symposium on Circuits and Systems
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26420364
[Presentation] Design Method for Inductorless Low-Noise Amplifiers with Active Shunt-Feedback in 65-nm CMOS2017
- Author(s)
  Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine, and Makoto Nakamura： “Design Method for Inductorless Low-Noise Amplifiers with Active Shunt-Feedback in 65-nm CMOS
- Organizer
  2017 IEEE International SoC Design Conference
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26420364
[Presentation] エンファシス回路によるハーフレート識別回路の広帯域化に関する検討2016
- Author(s)
  寺本慎也，古市康祐，植村宙夢，岸根桂路
- Organizer
  電気関係学会関西連合大会
- Place of Presentation
  大阪府　大阪府立大学　中百舌鳥キャンパス
- Year and Date
  2016-11-22
- Data Source
  KAKENHI-PROJECT-26420364
[Presentation] 36-Gb/s CDR IC using simple passive loop filter combined with a passive load in phase detector2016
- Author(s)
  Kosuke Furuichi, Hiromu Uemura, Natsuyuki Koda, Hiromi Inaba, and Keiji Kishine
- Organizer
  International SoC Design Conference (ISOCC2016)
- Place of Presentation
  Jeju, South Korea
- Year and Date
  2016-10-23
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26420364
[Presentation] ラベリング信号伝送システムにおける検波回路構成簡易化の検討2016
- Author(s)
  香田夏幸，岸根桂路，稲葉博美，尾本大地，田中友規
- Organizer
  電子情報通信学会総合大会
- Place of Presentation
  九州　福岡
- Year and Date
  2016-03-15
- Data Source
  KAKENHI-PROJECT-26420364
[Presentation] Cross Current Suppression Control for Parallel Operation System Contructed with Two Electric Power 　Converters under Different Output2016
- Author(s)
  Ryota Fujisawa, Hiromi Inaba, Keiji Kishine, Keisuke Ishikura, and Kazuki Ikebata
- Organizer
  The 19th International Conference on Electrical Machines and Systems (ICEMS2016)
- Place of Presentation
  Chiba, Japan
- Year and Date
  2016-11-13
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26420364
[Presentation] Design of High-Linearity Delay Detection Circuit for 10-Gb/s Communication System in 65-nm CMOS2016
- Author(s)
  Natsuyuki Koda, Kosuke Furuichi, Hiromu Uemura, Hiromi Inaba, and Keiji Kishine
- Organizer
  International SoC Design Conference (ISOCC2016)
- Place of Presentation
  Jeju, South Korea
- Year and Date
  2016-10-23
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26420364
[Presentation] FPGAを用いた変調回路に関する検討2016
- Author(s)
  野村幸平，植村宙夢，古市康祐，岸根桂路
- Organizer
  電気関係学会関西連合大会
- Place of Presentation
  大阪府　大阪府立大学　中百舌鳥キャンパス
- Year and Date
  2016-11-22
- Data Source
  KAKENHI-PROJECT-26420364
[Presentation] Simple routing contorol system for 10-Gb/s data toransmission using a frequency modulation technique2016
- Author(s)
  Daichi Omoto, Keiji Kishine, Hiromi Inaba, and Tomoki Tanaka
- Organizer
  International Conference on Electronics, Information, and Communication (ICEIC2016)
- Place of Presentation
  Danang, Vietnam
- Year and Date
  2016-01-27
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26420364
[Presentation] FPGAを用いたFIRフィルタによる生体センサ信号の雑音除去の検討2016
- Author(s)
  荒内航貴，森本安紀，作田建，岸根桂路
- Organizer
  電気関係学会関西連合大会
- Place of Presentation
  大阪府　大阪府立大学　中百舌鳥キャンパス
- Year and Date
  2016-11-22
- Data Source
  KAKENHI-PROJECT-26420364
[Presentation] ラベリング信号伝送システムにおける高周波変調回路の設計2016
- Author(s)
  植村宙夢，岸根桂路，稲葉博美，尾本大地，田中友規
- Organizer
  電子情報通信学会総合大会
- Place of Presentation
  九州　福岡
- Year and Date
  2016-03-15
- Data Source
  KAKENHI-PROJECT-26420364
[Presentation] Proposal for sensitive frequency demodulator for 10-Gb/s transmission labeling signal system2016
- Author(s)
  Tomoki Tanaka, Keiji Kishine, Akira Tsuchiya, Hiromi Inaba, and Daichi Omoto
- Organizer
  International SoC Design Conference (ISOCC2016)
- Place of Presentation
  Jeju, South Korea
- Year and Date
  2016-10-23
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26420364
[Presentation] A 32-Gb/s output buffer circuit with doubled pre-emphasis in 65-nm CMOS2016
- Author(s)
  Tomoki Tanaka, Keiji Kishine, Daichi Omoto, Hiromi Inaba, and Akira Tsuchiya
- Organizer
  International Conference on Electronics, Information, and Communication (ICEIC2016)
- Place of Presentation
  Danang, Vietnam
- Year and Date
  2016-01-27
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26420364
[Presentation] 群遅延特性を考慮した遅延検波回路の高性能化検討2016
- Author(s)
  古市康祐，岸根桂路，稲葉博美，尾本大地，田中友規
- Organizer
  電子情報通信学会総合大会
- Place of Presentation
  九州　福岡
- Year and Date
  2016-03-15
- Data Source
  KAKENHI-PROJECT-26420364
[Presentation] エンファシス回路による遅延検波回路の広帯域化2015
- Author(s)
  古市康祐，岸根桂路，稲葉博美，尾本大地，田中友規
- Organizer
  電子情報通信学会ソサイエティ大会
- Place of Presentation
  宮城
- Year and Date
  2015-09-09
- Data Source
  KAKENHI-PROJECT-26420364
[Presentation] ジッタ検出回路に関する検討2015
- Author(s)
  沖中正季，岸根桂路，稲葉博美，尾本大地，田中友規
- Organizer
  電気・電子・情報関係学会東海支部連合大会
- Place of Presentation
  愛知
- Year and Date
  2015-09-08
- Data Source
  KAKENHI-PROJECT-26420364
[Presentation] ラベリング信号伝送システムにおける送信回路に関する検討2015
- Author(s)
  植村宙夢，岸根桂路，稲葉博美，尾本大地，田中友規
- Organizer
  電気関係学会関西連合大会
- Place of Presentation
  大阪
- Year and Date
  2015-11-14
- Data Source
  KAKENHI-PROJECT-26420364
[Presentation] 65nm-CMOSを用いたインダクティブピーキング型低雑音VCO2014
- Author(s)
  井上洋，稲葉博美，岸根桂路，土谷亮
- Organizer
  電子情報通信学会総合大会
- Place of Presentation
  新潟
- Data Source
  KAKENHI-PROJECT-23560462
[Presentation] 25Gbit/s動作に向けたプリエンファシス機能付き65nm-CMOS出力バッファ回路の検討2014
- Author(s)
  田中友規,桂井宏明,井上洋,岸根桂路,野河正史,稲葉博美
- Organizer
  2014年電子情報通信学会総合大会
- Place of Presentation
  (C-12-5)
- Data Source
  KAKENHI-PROJECT-23560462
[Presentation] 5Gbit/s動作に向けたプリエンファシス機能付き65nm-CMOS出力バッファ回路の検討2014
- Author(s)
  田中友規，井上洋，稲葉博美，岸根桂路，桂井宏明・野河正史
- Organizer
  電子情報通信学会総合大会
- Place of Presentation
  新潟
- Data Source
  KAKENHI-PROJECT-23560462
[Presentation] 65nm-CMOSを用いたインダクティブピーキング型低雑音VCO2014
- Author(s)
  井上洋,岸根桂路,土谷亮,稲葉博美
- Organizer
  2014年電子情報通信学会総合大会
- Place of Presentation
  (C-12-39)
- Data Source
  KAKENHI-PROJECT-23560462
[Presentation] インダクティブピーキングを利用したリング型VCOの低ジッタ化に関する研究2013
- Author(s)
  井上洋,浜田泰輔,岸根桂路,中野慎介・中村誠,土谷亮,久保木猛,稲葉博美
- Organizer
  2013年電子情報通信学会総合大会
- Place of Presentation
  (C-12-65)
- Data Source
  KAKENHI-PROJECT-23560462
[Presentation] A 25-Gb/s LD Driver with Area-Efficient Inductor in a 0.18μm CMOS2013
- Author(s)
  Takeshi Kuboki, Yusuke Ohtomo, Akira Tsuchiya, Keiji Kishine, Hidetoshi Onodera
- Organizer
  The 18th Asia and South Pacific Design Automation Conference
- Place of Presentation
  横浜
- Data Source
  KAKENHI-PROJECT-23560462
[Presentation] Small-signal equivalent circuit analysis for designing an around 10GHz CMOS ring VCO2013
- Author(s)
  Keiji Kishine, Hiromi Inaba, Yusuke Ohtomo, Hiroshi Koizumi, Makoto Nakamura and Mitsuo Nakamura
- Organizer
  IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS 2013)
- Place of Presentation
  U.S.A. OHIO
- Data Source
  KAKENHI-PROJECT-23560462
[Presentation] Simulation Analysis of Control Methods for Parallel Multi-Operating System Constructed by the Same Output Power Convereters2013
- Author(s)
  K. Ishikura, H. Inaba, K. Kishine and M. Nakai
- Organizer
  International Conference on Electrical Machines and Systems (ICEMS 2013)
- Place of Presentation
  KOREA
- Data Source
  KAKENHI-PROJECT-23560462
[Presentation] トランジスタサイズに着目した微細CMOS D-FF回路の高速化設計手法2013
- Author(s)
  浜田泰輔，井上　洋，岸根桂路，土谷　亮，久保木　猛，・稲葉博美
- Organizer
  電子情報通信学会　2013年総合大会
- Place of Presentation
  岐阜大学
- Data Source
  KAKENHI-PROJECT-23560462
[Presentation] トランジスタサイズに着目した微細CMOS D-FF回路の高速化設計2013
- Author(s)
  浜田泰輔,井上洋,岸根桂路,土谷亮,久保木猛,稲葉博美
- Organizer
  2013年電子情報通信学会総合大会
- Place of Presentation
  (C-12-8)
- Data Source
  KAKENHI-PROJECT-23560462
[Presentation] Small-signal equival-ent circuit analysis for designing an around 10GHz CMOS ring VCO2013
- Author(s)
  Keiji Kishine, Hiromi Inaba, Yusuke Ohtomo, Hiroshi Koizumi, Makoto Nakamura and Mitsuo Nakamura
- Organizer
  IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS 2013)
- Place of Presentation
  (査読あり)
- Data Source
  KAKENHI-PROJECT-23560462
[Presentation] The Parallel Multiple Electric Power Conversion System Constructed by Connecting Three Power Converters2013
- Author(s)
  M. Nakai, H. Inaba, K. Kishine and K. Ishikura
- Organizer
  International Conference on Electrical Machines and Systems (ICEMS 2013)
- Place of Presentation
  KOREA
- Data Source
  KAKENHI-PROJECT-23560462
[Presentation] Method Controlling Two or More Sets of PMSMby One Inverter on a Railway Vehicle2013
- Author(s)
  T. Ito, H. Inaba, K. Kishine, M. Nakai and K. Ishikura
- Organizer
  International Conference on Electrical Machines and Systems (ICEMS 2013)
- Place of Presentation
  KOREA
- Data Source
  KAKENHI-PROJECT-23560462
[Presentation] インダクティブピーキングを利用したリング型VCOの低ジッタ化に関する研究2013
- Author(s)
  井上　洋，浜田泰輔，岸根桂路，土谷　亮，久保木　猛，・稲葉博美
- Organizer
  電子情報通信学会　2013年総合大会
- Place of Presentation
  岐阜大学
- Data Source
  KAKENHI-PROJECT-23560462
[Presentation] 複合インダクタ搭載VCSELドライバ回路のS-パラメータ評価結果2012
- Author(s)
  久保木猛, 大友祐輔，　土谷亨，　岸根桂路，　小野寺秀俊
- Organizer
  シリコンアナログRF研究会
- Place of Presentation
  会津大学
- Data Source
  KAKENHI-PROJECT-23560462
[Presentation] 奇数台の電力変換による並列多重電力変換装置2012
- Author(s)
  中井満貴 , 稲葉博美, 岸根桂路
- Organizer
  電気学会産業応用部門大会
- Place of Presentation
  千葉工業大学
- Data Source
  KAKENHI-PROJECT-23560462
[Presentation] An electric power conversion system composed of two parallel-connected converters providing different output currents2012
- Author(s)
  Hiromi Inaba, Keiji Kishine and Yasufumi Igura
- Organizer
  The 15th International Conference on Electrical Machines and Systems (ICEMS 2012 )
- Place of Presentation
  札幌
- Data Source
  KAKENHI-PROJECT-23560462
[Presentation] Design method for an over-10-Gb/s CMOS CML buffer circuit for delay control2012
- Author(s)
  Keiji Kishine，Yusuke Ohtomo, Makoto Nakamura, Mitsuo Nakamura and Hiromi Inaba
- Organizer
  The 55th International Midwest Symposium on Circuits and systems (IEEE MWSCAS 2012)
- Place of Presentation
  Boise, Idaho, U.S.A.
- Data Source
  KAKENHI-PROJECT-23560462
[Presentation] Design method for an over-10-Gb/s CMOS CML buffer circuit for delay control2012
- Author(s)
  Keiji Kishine, Hiromi Inaba, Yusuke Ohtomo, Makoto Nakamura, Mitsuo Nakamura
- Organizer
  IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS)
- Place of Presentation
  (査読あり)
- Data Source
  KAKENHI-PROJECT-23560462
[Presentation] 完全差動回路構成GVCOの高速化設計2012
- Author(s)
  川中啓敬、岸根桂路、土谷亨、小野寺秀俊
- Organizer
  2012年　電子情報通信学会総合大会2012
- Place of Presentation
  岡山大学
- Data Source
  KAKENHI-PROJECT-23560462
[Presentation] 高ビットエラー環境下におけるバーストACK通信方式の提案2012
- Author(s)
  河村　拓真、岸根桂路、稲葉博美
- Organizer
  平成24年電気学会全国大会
- Place of Presentation
  広島工業大学
- Data Source
  KAKENHI-PROJECT-23560462
[Presentation] 複合インダクタを用いたVCSELドライバの設計2011
- Author(s)
  久保木猛、大友祐輔、土谷亨、岸根桂路、小野寺秀俊
- Organizer
  シリコンアナログRF研究会
- Place of Presentation
  キャンパスプラザ京都
- Data Source
  KAKENHI-PROJECT-23560462
[Presentation] Bandwidth Enhancement for High Speed Amplifier Utilizing Mutually Coupled On-Chip Inductors2011
- Author(s)
  Akira Tsuchiya, Takeshi Kuboki, Yusuke Ohtomo, Keiji Kishine, Shigekazu Miyawaki, Makoto Nakamura and Hidetoshi Onodera
- Organizer
  International SoC Design Conference　2011
- Place of Presentation
  Ramada plaza hotel,　韓国, jeju
- Data Source
  KAKENHI-PROJECT-23560462
[Presentation] A 10.3Gbps TransImpedance Amplifier with Mutually Coupled Inductors in 0.18-μm CMOS2011
- Author(s)
  Shigekazu Miyawaki, Makoto Nakamura, Akira Tsuchiya, Keiji Kishine and Hidetoshi Onodera
- Organizer
  International SoC Design Conference　2011
- Place of Presentation
  Ramada plaza hotel,　韓国, jeju
- Data Source
  KAKENHI-PROJECT-23560462
[Presentation] 25-Gb/s inductorless output buffer circuit with a pre-emphasis in 65-nm CMOS
- Author(s)
  Tomoki Tanaka, Keiji Kishine, Hiromi Inaba, and Akira Tsuchiya
- Organizer
  International SoC Design Conference (ISOCC2014)
- Place of Presentation
  Jeju, Korea
- Year and Date
  2014-11-03 – 2014-11-06
- Data Source
  KAKENHI-PROJECT-26420364
[Presentation] ラべリング信号検出回路におけるFM遅延検波回路の高分解能化検討
- Author(s)
  尾本大地，稲葉博美，岸根桂路，田中友規
- Organizer
  電子情報通信学会総合大会
- Place of Presentation
  滋賀
- Year and Date
  2015-03-10 – 2015-03-13
- Data Source
  KAKENHI-PROJECT-26420364
[Presentation] プリエンファシス機能付き25Gb/s動作出力バッファ回路の試作評価
- Author(s)
  田中友規，岸根桂路，土谷亮（京大），尾本大地，稲葉博美
- Organizer
  電子情報通信学会総合大会
- Place of Presentation
  滋賀
- Year and Date
  2015-03-10 – 2015-03-13
- Data Source
  KAKENHI-PROJECT-26420364
[Presentation] A 65-nm CMOS burst-mode CDR based on a GVCO with symmetric loops
- Author(s)
  Keiji Kishine, Hiroshi Inoue, Hiromi Inaba,Makoto Nakamura, Akira Tsuchiya, Hidetoshi Onodera, Hiroaki Katsurai
- Organizer
  The 2014 IEEE International Symposium on Circuits and Systems (ISCAS)
- Place of Presentation
  Melbourne, Australia
- Year and Date
  2014-06-01 – 2014-06-05
- Data Source
  KAKENHI-PROJECT-26420364

1. 井上敏之

# of Collaborated Projects: 0 results

# of Collaborated Products: 1 results

KISHINE Keiji 岸根 桂路

Research Projects

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Co-Researchers

Add-on technique of Monitoring data for 4-Level PAM4 transmission systemPrincipal Investigator

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The research on single-channel multi-port control interface circuitPrincipal Investigator

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Development of an Additional-data-wrapping Circuit for a Network MonitoringPrincipal Investigator

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The robust clock and data recovery circuit for high-speed communication systemPrincipal Investigator

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[Journal Article] FPGA-based binary labeling signal transmission system2019

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[Journal Article] 10-Gb/s Data Frame Generation Circuit with Frequency Modulation in 65-nm CMOS2018

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[Journal Article] Design of High-linearity Delay Detection Circuit for 10-Gb/s Communication System in 65-nm CMOS2017

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[Journal Article] Simple and Low Power Highly Sensitive Frequency Demodulator Circuit for 10-Gb/s Transmission System for Labeling Signal2017

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[Journal Article] Simple Routing Control System for 10 Gb/s Data Transmission Using a Frequency Modulation Technique2016

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[Journal Article] A 32-Gb/s Inductorless Output Buffer Circuit with Adjustable Pre-emphasis in 65-nm CMOS2016

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[Journal Article] A Multi-Rate Burst-Mode CDR Using a GVCO With Symmetric Loops for Instantaneous Phase Locking in 65-nm CMOS2015

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[Journal Article] Area effective inductive peaking with interwoven inductor for high speed Laser Diode Driver for Optical Communication System2012

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NAID

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[Journal Article] Area-effective inductive peaking with interwoven inductor for high-speed Laser-Diode Driver for Optical Communication System2012

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[Presentation] 周波数変調によるデータ管理情報重畳PAM4伝送システムにおける付加情報抽出のための受信回路の検討2024

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[Presentation] A preamplifier circuit with offset-voltage control technique for 50-Gb/s CMOS PAM4 receiver2022

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KISHINE Keiji 岸根桂路

[Journal Article] Simple and Low Power Highly Sensitive Frequency Demodulator Circuit for 10-Gb/s Transmission System　for Labeling Signal2017

[Presentation] Processing Time Reduction for JPEG Compression　Using Pixel Array Conversion2020