TANAKA Koichiro 田中康一郎

… Alternative Names

Researcher Number	40253570
Other IDs
External Links
Affiliation (Current)	2020: 九州産業大学, 理工学部, 教授
Affiliation (based on the past Project Information) *help	2012: 九州産業大学, 情報科学部知能情報科, 教授 2009 – 2011: 九州産業大学, 情報工学部, 准教授 2005 – 2006: 九州工業大学, マイクロ化総合技術センター, 助手 2001 – 2002: 九州工業大学, マイクロ化総合技術センター, 助手 1996 – 1998: 九州工業大学, マイクロ化総合技術センター, 助手 1994: Center for Microelectronic Systems, Kyushu Institute of Technology, Res.Assist., マイクロ化総合技術センター, 助手
Review Section/Research Field	Principal Investigator 電子デバイス・機器工学 / Computer system/Network Except Principal Investigator Electron device/Electronic equipment / 計算機科学 / 電子デバイス・機器工学
Keywords	Principal Investigator FPGA / DSP / 論理エミュレータ / 回路分割 / ハードウエア記述言語 / 論理合成 / ディジタル / アナログ混在 / プログラマブルアナログアレイ / HDL … More Except Principal Investigator FPGA / TFT / FPAA / 電子デバイス・集積回路 / インターコネクト・パッケージのシステム化応用 / センシングデバイス / 三次元集積回路 / 3D-LSI / インターコネクト / マイクロ接合 / 常温接合 / プリンティッドエレクトロニクス / フレキシブルエレクトロニクス / 超音波接合 / クロコン酸 / バンプ / 先鋭バンプ / ヘテロ集積 / 並列計算機 / 相互結合網 / 可変構造 / プロセッサアレイ / ハードマクロ / Parallel computer / Interconnection network / Reconfigurable / Processor array / Hard macro / 薄膜トランジスタ / 多結晶シリコン / 固相成長 / 固相再結晶化 / アナログ / ディジタル混在回路 / デイジタル混在回路 / 固相結晶化 / 結晶化制御 / プラズマ処理 / 微小電子源 / シリコン / 異方性エッチング / thin film transistor / polycrystalline silicon / solid phase crystallization / solid phase recrytallization / mixed signal circuit Less

Creation of Nano-device/CMOS Merged Three Dimensional Integrated Circuits Using Shape-Functionalized Micro-interconnect
- Principal Investigator
  
  ASANO Tanemasa
- Project Period (FY)
  2009 – 2012
- Research Category
  
  Grant-in-Aid for Scientific Research (A)
- Research Field
  
  Electron device/Electronic equipment
- Research Institution
  Kyushu University
コンピュータソフトウェアの著作権保護を可能とする計算機システムの実現Principal Investigator
- Principal Investigator
  
  田中康一郎
- Project Period (FY)
  2005 – 2006
- Research Category
  
  Grant-in-Aid for Young Scientists (B)
- Research Field
  
  Computer system/Network
- Research Institution
  Kyushu Institute of Technology
再構成型デバイスと信号処理向けプロセッサによるリコンフィギャブルシステムの開発Principal Investigator
- Principal Investigator
  
  田中康一郎
- Project Period (FY)
  2001 – 2002
- Research Category
  
  Grant-in-Aid for Young Scientists (B)
- Research Field
  
  電子デバイス・機器工学
- Research Institution
  Kyushu Institute of Technology
自動回路分割機能を備えた論理エミュレータシステムの研究開発Principal Investigator
- Principal Investigator
  
  田中康一郎
- Project Period (FY)
  1997 – 1998
- Research Category
  
  Grant-in-Aid for Encouragement of Young Scientists (A)
- Research Field
  
  電子デバイス・機器工学
- Research Institution
  Kyushu Institute of Technology
Thin-Film-Transistor and Its Layr-Structured Circuitry for Signal Prosessing Based on Probability
- Principal Investigator
  
  ASANO Tanemasa
- Project Period (FY)
  1996 – 1997
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  電子デバイス・機器工学
- Research Institution
  Kyusyu Institute of Technology
Study on Interconnection Networks Towards Realization of a Reconfigurable Parallel Computer
- Principal Investigator
  
  SUEYOSHI Toshinori
- Project Period (FY)
  1993 – 1994
- Research Category
  
  Grant-in-Aid for General Scientific Research (C)
- Research Field
  
  計算機科学
- Research Institution
  Kyushu Institute of Technology

All 2010 2009 2006 2005

All Journal Article

[Journal Article] Fabrication of Back-Side Illuminated Complementary Metal Oxide Semiconductor Image Sensor Using Compliant Bump2010
- Author(s)
  N. Watanabe, I. Tsunoda, T. Takao, K. Tanaka, and T, Asano
- Journal Title
  
  Jpn. J. Appl. Phys.
  
  Volume: 49 Issue: 4 Pages: 04DB01-04DB01
- DOI
  10.1143/jjap.49.04db01
- NAID
  210000068182
- ISSN
  0021-4922, 1347-4065
- Data Source
  KAKENHI-PROJECT-21246061
[Journal Article] Fabrication of Back-Side Illuminated Complementary Metal Oxide Semiconductor Image Sensor Using Compliant Bump2010
- Author(s)
  N.Watanabe, I.Tsunoda, T.Takao, K.Tanaka, T.Asano
- Journal Title
  
  Japanese Journal of Applied Physics
  
  Volume: 49
- NAID
  210000068182
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-21246061
[Journal Article] Compliant Bump Technology for Back-Side Illuminated CMOS Image Sensor2009
- Author(s)
  T.Asano, N.Watanabe, I.Tsunoda, Y.Kimiya, K.Fukunaga, M.Handa, H.Arao, Y.Yamaji, M.Aoyagi, T.Higashimachi, K.Tanaka, T.Takao, K.Matsumura, A.Ikeda, Y.Kuroki, T.Tsurushima
- Journal Title
  
  Proc. 2009 Int. Electronic Components and Techn ology Conference"
  
  Pages: 40-45
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-21246061
[Journal Article] Back-Side Illuminated CMOS Image Sensor Fabricated using Compliant Bump"2009
- Author(s)
  N.Watanabe, I.Tsunoda, T.Takao, K.Tanaka, T.Asano
- Journal Title
  
  Extended Abstracts of the 2009 International Conference on Solid State Devices and Materials
  
  Pages: 90-91
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-21246061
[Journal Article] Integration of Compliant Bump with Through-Si-Via Technology andn It s Application to Backside Illuminated CMOS Image Sensor2009
- Author(s)
  T.Asano, N.Watanabe, I.Tsunoda, T.Takao, K.Tanaka, T.Hiagashimachi, Y.Yamaji, M Aoyagi, T.Kyotani, H.Arao, Y .Kimiya, K.Fukunaga, A.Ikeda, Y.Kuroki, T.Tsurushima
- Journal Title
  
  Proc. 2009 Int. Conf. Electronics Packaging
  
  Pages: 185-190
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-21246061
[Journal Article] High-Density Room-Temperature 3D Chip-Stacking Using Mechanical Caulking With Compliant Bump andThrough-Hole-Electrode2009
- Author(s)
  N.Watanabe, M.Kawashita, Y.Yoshimura, N.Tanaka, T.A sano
- Journal Title
  
  Proceedings of ASME 2009 InterPACK Conference
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-21246061
[Journal Article] An FPGA Implementation of Partial Dynamic Reconfiguration Controller and Processor Interfaces for a Processor-Based System with Reconfigurable Logics2006
- Author(s)
  Koichiro Tanaka
- Journal Title
  
  Proceedings of International Technical Conference on Circuits/Systems, Computers and Communications 2
  
  Pages: 157-160
- Data Source
  KAKENHI-PROJECT-17700069
[Journal Article] リコンフィギャラブルシステムRICEとSystemCによる設計環境2006
- Author(s)
  田中康一郎ほか
- Journal Title
  
  Electronic Design and Solution Fair 2006 University Plaza 資料集
  
  Pages: 21-32
- NAID
  120006655354
- Data Source
  KAKENHI-PROJECT-17700069
[Journal Article] 動的部分再構成可能なFPGAを搭載したFPGA/DSPプラットフォームRICEのためのコンフィギュレーション・コントローラの実装2006
- Author(s)
  川原崇宏, 田中康一郎, 佐藤寿倫
- Journal Title
  
  FPGA/PLD Design Conferenceユーザ・プレゼンテーション論文集
  
  Pages: 1-8
- NAID
  120006655353
- Data Source
  KAKENHI-PROJECT-17700069
[Journal Article] Development of a Dynamically Reconfigurable Hardware Platform Using General-Purpose FPGAs2005
- Author(s)
  Koichiro Tanaka
- Journal Title
  
  Proceedings of the 20th Commemorative International Technical Conference on Circuit/Systems, Computers and Communications 2
  
  Pages: 565-566
- Data Source
  KAKENHI-PROJECT-17700069
[Journal Article] リコンフィギュラブル・システムRICEにおける再構成時間の短縮2005
- Author(s)
  川原崇宏, 田中康一郎, 佐藤寿倫
- Journal Title
  
  第13回電子情報通信学会九州支部学生会講演会
  
  Pages: 96-96
- Data Source
  KAKENHI-PROJECT-17700069

1. ASANO Tanemasa (50126306)

# of Collaborated Projects: 2 results

# of Collaborated Products: 5 results
2. HIGASHMACHI Takao (50461611)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
3. IKEDA Akihiro (60315124)

# of Collaborated Projects: 1 results

# of Collaborated Products: 2 results
4. SUEYOSHI Toshinori (00117136)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
5. APDUHAN Bernady (60238714)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
6. KUGA Morihiro (80243989)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
7. AOKI Satoshi (40231758)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results

TANAKA Koichiro 田中 康一郎

田中 康一郎 タナカ コウイチロウ

Research Projects

Research Products

Co-Researchers

Creation of Nano-device/CMOS Merged Three Dimensional Integrated Circuits Using Shape-Functionalized Micro-interconnect

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

コンピュータソフトウェアの著作権保護を可能とする計算機システムの実現Principal Investigator

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

再構成型デバイスと信号処理向けプロセッサによるリコンフィギャブルシステムの開発Principal Investigator

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

自動回路分割機能を備えた論理エミュレータシステムの研究開発Principal Investigator

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

Thin-Film-Transistor and Its Layr-Structured Circuitry for Signal Prosessing Based on Probability

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

Study on Interconnection Networks Towards Realization of a Reconfigurable Parallel Computer

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

[Journal Article] Fabrication of Back-Side Illuminated Complementary Metal Oxide Semiconductor Image Sensor Using Compliant Bump2010

Author(s)

Journal Title

DOI

NAID

ISSN

Data Source

[Journal Article] Fabrication of Back-Side Illuminated Complementary Metal Oxide Semiconductor Image Sensor Using Compliant Bump2010

Author(s)

Journal Title

NAID

Data Source

[Journal Article] Compliant Bump Technology for Back-Side Illuminated CMOS Image Sensor2009

Author(s)

Journal Title

Data Source

[Journal Article] Back-Side Illuminated CMOS Image Sensor Fabricated using Compliant Bump"2009

Author(s)

Journal Title

Data Source

[Journal Article] Integration of Compliant Bump with Through-Si-Via Technology andn It s Application to Backside Illuminated CMOS Image Sensor2009

Author(s)

Journal Title

Data Source

[Journal Article] High-Density Room-Temperature 3D Chip-Stacking Using Mechanical Caulking With Compliant Bump andThrough-Hole-Electrode2009

Author(s)

Journal Title

Data Source

[Journal Article] An FPGA Implementation of Partial Dynamic Reconfiguration Controller and Processor Interfaces for a Processor-Based System with Reconfigurable Logics2006

Author(s)

Journal Title

Data Source

[Journal Article] リコンフィギャラブルシステムRICEとSystemCによる設計環境2006

Author(s)

Journal Title

NAID

Data Source

[Journal Article] 動的部分再構成可能なFPGAを搭載したFPGA/DSPプラットフォームRICEのためのコンフィギュレーション・コントローラの実装2006

Author(s)

TANAKA Koichiro 田中康一郎

田中康一郎タナカコウイチロウ