Ito Yasuaki 伊藤靖朗

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ITO Yasuaki 伊藤靖朗

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Researcher Number	40397964
Other IDs
Affiliation (Current)	2025: 広島大学, 先進理工系科学研究科(工), 教授
Affiliation (based on the past Project Information) *help	2022 – 2024: 広島大学, 先進理工系科学研究科(工), 教授 2020 – 2021: 広島大学, 先進理工系科学研究科(工), 准教授 2017 – 2018: 広島大学, 工学研究科, 准教授 2016: 広島大学, 工学研究院, 准教授 2013 – 2016: 広島大学, 工学(系)研究科(研究院), 准教授 … More 2015: 広島大学, 大学院工学研究院, 准教授 2012: 広島大学, 工学(系)研究科(研究院), 助教 2010 – 2012: Hiroshima University, 大学院・工学研究院, 助教 2007 – 2009: 広島大学, 大学院・工学研究科, 助教 2005 – 2006: 広島大学, 大学院工学研究科, 助手 2005: 広島大学, 大学院・工学研究科, 助手 Less
Review Section/Research Field	Principal Investigator Software / Basic Section 60010:Theory of informatics-related / Basic Section 60040:Computer system-related / High performance computing Except Principal Investigator Software / Basic Section 60050:Software-related / Theory of informatics / Fundamental theory of informatics / Software / Computer system/Network
Keywords	Principal Investigator 並列計算 / GPU / 超並列 / 回路シミュレーション / 並列処理 / FPGA / 量子計算 / ネットワークプールーニング / 機械学習 / ビットレベル並列化 … More / CKYパージング / Smith-Watermanアルゴリズム / ハイスループット計算 / GPGPU / 高スループット計算 / ビット演算 / 専用回路 / サポートベクターマシン / Block RAM / DSP block / メニーコア / 組込みブロックRAM / 組込みDSPブロック / 多倍長演算 / マルチコアプロセッサ / ハフ変換 / ブロックRAM / DSPブロック / ハード・ソフト協調設計 … More Except Principal Investigator FPGA / 並列処理 / ハードウェアアルゴリズム / 計算機システム / 並列アルゴリズム / 機械学習 / 組み合わせ最適化 / ビッグデータ処理 / データ圧縮 / ヘテロ計算システム / GPU / 計算モデル / ハイパフォーマンス・コンピューティング / 並列計算機 / 理論計算モデル / Memory Machine Models / GPGPU / Parallel Algorithms / ハードウェアアルゴリズ / 開発環境 / FGPA / 暗号化 / 多倍長演算 / ブロックRAM / 組込みハードウェア / アルゴリズム / 論理設計 / 組合せ最適化 / 組み込みシステム / CPU / 分散アルゴリズム / 指向性アンテナ / 省電力 / ルーティングアルゴリズム / センサーネットワーク / アドホックネットワーク / 通信プロトコル / 無線ネットワーク Less

Massively Parallel GPU Simulation for Quantum ComputingPrincipal Investigator
- Principal Investigator
  
  伊藤靖朗
- Project Period (FY)
  2024 – 2026
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Review Section
  
  Basic Section 60010:Theory of informatics-related
- Research Institution
  Hiroshima University
超並列システム向け可逆データ圧縮法の提案と実用化
- Principal Investigator
  
  中野浩嗣
- Project Period (FY)
  2021 – 2024
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Review Section
  
  Basic Section 60050:Software-related
- Research Institution
  Hiroshima University
Development of a Massively Parallel Machine Learning Environment for GPUs using Circuit SimulationPrincipal Investigator
- Principal Investigator
  
  Ito Yasuaki
- Project Period (FY)
  2020 – 2022
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Review Section
  
  Basic Section 60040:Computer system-related
- Research Institution
  Hiroshima University
Ultra high-throughput computation using bit-level parallelization for the GPUPrincipal Investigator
- Principal Investigator
  
  Ito Yasuaki
- Project Period (FY)
  2016 – 2018
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  High performance computing
- Research Institution
  Hiroshima University
Low-power and super-linear speed-up computation by heterogeneous parallel computing systems with development environment
- Principal Investigator
  
  Nakano Koji
- Project Period (FY)
  2016 – 2017
- Research Category
  
  Grant-in-Aid for Challenging Exploratory Research
- Research Field
  
  Software
- Research Institution
  Hiroshima University
Parallel Computation Theory for Memory Machine Models and Next Generation GPGPU Architecture
- Principal Investigator
  
  Nakano Koji
- Project Period (FY)
  2014 – 2018
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  Theory of informatics
- Research Institution
  Hiroshima University
Development tools and environment for General-Purpose computing on FPGA (GPFPGA)
- Principal Investigator
  
  Nakano Koji
- Project Period (FY)
  2013 – 2015
- Research Category
  
  Grant-in-Aid for Challenging Exploratory Research
- Research Field
  
  Software
- Research Institution
  Hiroshima University
Accelerating computations using many-core architecture for FPGAsPrincipal Investigator
- Principal Investigator
  
  Yasuaki Ito
- Project Period (FY)
  2012 – 2015
- Research Category
  
  Grant-in-Aid for Young Scientists (B)
- Research Field
  
  Software
- Research Institution
  Hiroshima University
Research on abstract modelsof FPGAs and evaluation of hardware algorithms
- Principal Investigator
  
  NAKANO Koji
- Project Period (FY)
  2009 – 2012
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  Fundamental theory of informatics
- Research Institution
  Hiroshima University
A study on establishment of a theory for accelerating computation based on partial-computation using FPGAsPrincipal Investigator
- Principal Investigator
  
  ITO Yasuaki
- Project Period (FY)
  2008 – 2011
- Research Category
  
  Grant-in-Aid for Young Scientists (B)
- Research Field
  
  Software
- Research Institution
  Hiroshima University
アドホックネットワークの実用化に向けた省電力通信プロトコルの研究
- Principal Investigator
  
  NAKANO Koji
- Project Period (FY)
  2005 – 2008
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  Computer system/Network
- Research Institution
  Hiroshima University
リコンフィギュラブルコンピューティング向け簡易開発環境の構築
- Principal Investigator
  
  中野浩嗣
- Project Period (FY)
  2005 – 2007
- Research Category
  
  Grant-in-Aid for Exploratory Research
- Research Field
  
  Software
- Research Institution
  Hiroshima University

[Journal Article] Efficient parallel implementations to compute the diameter of a graph2023
- Author(s)
  Takafuji Daisuke、Nakano Koji、Ito Yasuaki
- Journal Title
  
  Concurrency and Computation: Practice and Experience
  
  Volume: 35 Issue: 11
- DOI
  10.1002/cpe.5963
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23K21655
[Journal Article] Dual-Matrix Domain Wall: A Novel Technique for Generating Permutations by QUBO and Ising Models with Quadratic Sizes2023
- Author(s)
  Nakano Koji、Tsukiyama Shunsuke、Ito Yasuaki、Yazane Takashi、Yano Junko、Kato Takumi、Ozaki Shiro、Mori Rie、Katsuki Ryota
- Journal Title
  
  Technologies
  
  Volume: 11 Issue: 5 Pages: 143-143
- DOI
  10.3390/technologies11050143
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23K21655
[Journal Article] GPU implementations of deflate encoding and decoding2022
- Author(s)
  Takafuji Daisuke、Nakano Koji、Ito Yasuaki、Kasagi Akihiko
- Journal Title
  
  Concurrency and Computation: Practice and Experience
  
  Volume: Early View Issue: 19
- DOI
  10.1002/cpe.7454
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23K21655
[Journal Article] Graphics processing unit‐accelerated high‐quality watercolor painting image generation2022
- Author(s)
  Huang Jiamian、Ito Yasuaki、Nakano Koji
- Journal Title
  
  Concurrency and Computation: Practice and Experience
  
  Volume: Early View Issue: 19
- DOI
  10.1002/cpe.7471
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23K21655
[Journal Article] Acceleration of Deflate Encoding and Decoding with GPU implementations2021
- Author(s)
  Daisuke Takafuji, Koji Nakano, Yasuaki Ito, Akihiko Kasagi:
- Journal Title
  
  Proc. of CANDAR Workshops
  
  Volume: 1 Pages: 180-186
- DOI
  10.1109/candarw53999.2021.00036
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23K21655
[Journal Article] A GPU Implementation of Watercolor Painting Image Generation2021
- Author(s)
  Jiamian Huang, Yasuaki Ito, Koji Nakano
- Journal Title
  
  Proc. of CANDAR Workshops
  
  Volume: 1 Pages: 145-151
- DOI
  10.1109/candarw53999.2021.00031
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23K21655
[Journal Article] A novel structured sparse fully connected layer in convolutional neural networks2021
- Author(s)
  Matsumura Naoki、Ito Yasuaki、Nakano Koji、Kasagi Akihiko、Tabaru Tsuguchika
- Journal Title
  
  Concurrency and Computation: Practice and Experience
  
  Volume: － Issue: 11
- DOI
  10.1002/cpe.6213
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20K11735, KAKENHI-PROJECT-23K21655
[Journal Article] Tile art image generation using parallel greedy algorithm on the GPU and its approximation with machine learning2021
- Author(s)
  Matsumura Naoki、Tokura Hiroki、Kuroda Yuki、Ito Yasuaki、Nakano Koji
- Journal Title
  
  Concurrency and Computation: Practice and Experience
  
  Volume: 33,12 Issue: 12 Pages: 1-20
- DOI
  10.1002/cpe.5623
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-19H01106, KAKENHI-PROJECT-23K21655
[Journal Article] GPU implementation of the fast Smith-Waterman algorithm using BPBC technique2019
- Author(s)
  Takahiro Nishimura, Jacir L. Bordim, Yasuaki Ito, Koji Nakano
- Journal Title
  
  Bulletin of Networking, Computing, Systems, and Software
  
  Volume: 8 Pages: 50-53
- Open Access / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-16K00171
[Journal Article] Almost Optimal Column-wise Prefix-sum Computation on the GPU2018
- Author(s)
  Tokura Hiroki、Fujita Toru、Nakano Koji、Ito Yasuaki
- Journal Title
  
  The Journal of Supercomputing
  
  Volume: 74 Pages: 224-233
- DOI
  10.1007/978-3-319-78054-2_21
- ISBN
  9783319780535, 9783319780542
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-26280002
[Journal Article] C2CU: a CUDA C program generator for bulk execution of a sequential algorithm2017
- Author(s)
  Daisuke Takafuji, Koji Nakano, Yasuaki Ito, Jacir Luiz Bordim
- Journal Title
  
  Concurrency and Computation: Practice and Experience
  
  Volume: 29 Issue: 17
- DOI
  10.1002/cpe.4022
- NAID
  110009971685
- Peer Reviewed / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26280002, KAKENHI-PROJECT-16K12413
[Journal Article] Accelerating digital halftoning using the local exhaustive search on the GPU2017
- Author(s)
  Hiroaki Kouge, Takumi Honda, Toru Fujita, Yasuaki Ito, Koji Nakano, Jacir Luiz Bordim
- Journal Title
  
  Concurrency and Computation: Practice and Experience
  
  Volume: 29 Issue: 2
- DOI
  10.1002/cpe.3781
- Peer Reviewed / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26280002
[Journal Article] GPU-accelerated Exhaustive Verification of the Collatz Conjecture2017
- Author(s)
  Takumi Honda, Yasuaki Ito, Koji Nakano
- Journal Title
  
  International Journal of Networking and Computing
  
  Volume: 7 Issue: 1 Pages: 69-85
- DOI
  10.15803/ijnc.7.1_69
- NAID
  130005331502
- ISSN
  2185-2839, 2185-2847
- Language
  English
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-26280002
[Journal Article] Adaptive loss-less data compression method optimized for GPU decompression2017
- Author(s)
  Shunji Funasaka, Koji Nakano, Yasuaki Ito:
- Journal Title
  
  Concurrency and Computation: Practice and Experience
  
  Volume: 29 Issue: 24
- DOI
  10.1002/cpe.4283
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-26280002
[Journal Article] An Efficient GPU Implementation of CKY Parsing Using the Bitwise Parallel Bulk Computation Technique2017
- Author(s)
  Toru Fujita, Koji Nakano, Yasuaki Ito, Daisuke Takafuji
- Journal Title
  
  IEICE Trans. Inf. & Syst.
  
  Volume: E100.D Issue: 12 Pages: 2857-2865
- DOI
  10.1587/transinf.2017PAP0018
- NAID
  130006236562
- ISSN
  0916-8532, 1745-1361
- Language
  English
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-16K00171, KAKENHI-PROJECT-26280002, KAKENHI-PROJECT-16K12413
[Journal Article] An Efficient GPU Implementation of Bulk Computation of the Eigenvalue Problem for Many Small Real Non-symmetric Matrices2017
- Author(s)
  Hiroki Tokura, Takumi Honda, Yasuaki Ito, Koji Nakano, Mitsuya Nishino, Yushiro Hirota, Masami Saeki
- Journal Title
  
  International Journal of Networking and Computing
  
  Volume: 7 Issue: 2 Pages: 227-247
- DOI
  10.15803/ijnc.7.2_227
- NAID
  130006135389
- ISSN
  2185-2839, 2185-2847
- Language
  English
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-26280002
[Journal Article] Fast Simulation of Conway's Game of Life using Bitwise Parallel Bulk Computation on a GPU2016
- Author(s)
  Toru Fujita, Koji Nakano, and Yasuaki Ito
- Journal Title
  
  International Journal of Foundations of Computer Science
  
  Volume: 27 Issue: 08 Pages: 981-1003
- DOI
  10.1142/s0129054116500404
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-26280002
[Journal Article] Photomosaic Generation by Rearranging Divided Images2016
- Author(s)
  Yi Yang, Yasuaki Ito, Koji Nakano
- Journal Title
  
  Bulletin of Networking, Computing, Systems, and Software
  
  Volume: 6 Pages: 22-27
- Data Source
  KAKENHI-PROJECT-16K12413
[Journal Article] Efficient Implementation of FDFM Approach for Euclidean Algorithms on the FPGA2016
- Author(s)
  Xin Zhou, Koji Nakano, Yasuaki Ito
- Journal Title
  
  International Journal of Networking and Computing
  
  Volume: 6 Issue: 2 Pages: 420-435
- DOI
  10.15803/ijnc.6.2_420
- NAID
  130005475310
- ISSN
  2185-2839, 2185-2847
- Language
  English
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-16K12413
[Journal Article] An FPGA Implementation for a Flexible-Length-Arithmetic Processor Employing the FDFM Processor Core Approach2016
- Author(s)
  Tatsuya Kawamoto, Xin Zhou, Jacir L. Bordim, Yasuaki Ito, and Koji Nakano
- Journal Title
  
  IEICE Trans. Inf. & Syst.
  
  Volume: E99.D Issue: 12 Pages: 2901-2910
- DOI
  10.1587/transinf.2016PAP0029
- NAID
  130005170989
- ISSN
  0916-8532, 1745-1361
- Language
  English
- Peer Reviewed / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-16K12413
[Journal Article] A Memory-Access-Efficient Implementation for Computing the Approximate String Matching Algorithm on GPUs2016
- Author(s)
  Lucas Saad Nogueira Numes, Jacir Luiz Bordim, Koji Nakano, and Yasuaki Ito
- Journal Title
  
  IEICE Trans. Inf. & Syst.
  
  Volume: E99.D Issue: 12 Pages: 2995-3003
- DOI
  10.1587/transinf.2016PAP0024
- NAID
  130005171004
- ISSN
  0916-8532, 1745-1361
- Language
  English
- Peer Reviewed / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26280002
[Journal Article] Bulk execution of Euclidean algorithms on the CUDA-enabled GPU2016
- Author(s)
  Toru Fujita, Koji Nakano, Yasuaki Ito
- Journal Title
  
  International Journal of Networking and Computing
  
  Volume: 6 Issue: 1 Pages: 42-63
- DOI
  10.15803/ijnc.6.1_42
- NAID
  130005123823
- ISSN
  2185-2839, 2185-2847
- Language
  English
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-26280002
[Journal Article] A character art generator using the local exhaustive search, with GPU acceleration2016
- Author(s)
  Yuji Takeuchi, Koji Nakano, Daisuke Takafuji, Yasuaki Ito
- Journal Title
  
  International Journal of Parallel, Emergent and Distributed Systems
  
  Volume: 31 Issue: 1 Pages: 3063-3071
- DOI
  10.1080/17445760.2014.962026
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-26280002
[Journal Article] GPU-Accelerated Bulk Execution of Multiple-Length Multiplication with Warp-Synchronous Programming Technique2016
- Author(s)
  Takumi Honda, Yasuaki Ito, and Koji Nakano
- Journal Title
  
  IEICE Trans. Inf. & Syst.
  
  Volume: E99.D Issue: 12 Pages: 3004-3012
- DOI
  10.1587/transinf.2016PAP0027
- NAID
  130005170988
- ISSN
  0916-8532, 1745-1361
- Language
  English
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-26280002
[Journal Article] An Optimal Implementation of the Approximate String Matching on the Hierarchical Memory Machine, with Performance Evaluation on the GPU2014
- Author(s)
  Duhu MAN, Koji NAKANO, Yasuaki ITO
- Journal Title
  
  IEICE Trans. Inf. & Syst.
  
  Volume: E97.D Issue: 12 Pages: 3063-3071
- DOI
  10.1587/transinf.2014PAP0011
- NAID
  130004841764
- ISSN
  0916-8532, 1745-1361
- Language
  English
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-26280002
[Journal Article] An Efficient Implementation of the Gradient-based Hough Transform using DSP slices and block RAMs on the FPGA2014
- Author(s)
  Xin Zhou, Yasuaki Ito, Koji Nakano
- Journal Title
  
  Proc. of International Parallel and Distributed Processing Symposium Workshops
  
  Volume: 1 Pages: 762-770
- DOI
  10.1109/ipdpsw.2014.88
- NAID
  110009947081
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-24700033
[Journal Article] Offline Permutation on the CUDA-enabled GPU2014
- Author(s)
  Akihiko KASAGI, Koji NAKANO, Yasuaki ITO
- Journal Title
  
  IEICE Trans. Inf. & Syst.
  
  Volume: E97.D Issue: 12 Pages: 3052-3062
- DOI
  10.1587/transinf.2014PAP0010
- NAID
  130004841763
- ISSN
  0916-8532, 1745-1361
- Language
  English
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-26280002
[Journal Article] An Efficient Implementation of the One-Dimensional Hough Transform Algorithm for Circle Detection on the FPGA2014
- Author(s)
  Xin Zhou, Yasuaki Ito, and Koji Nakano
- Journal Title
  
  Proc. of International Symposium on Computing and Networking
  
  Volume: 1 Pages: 447-452
- DOI
  10.1109/candar.2014.32
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-24700033
[Journal Article] Implementations of the Hough Transform on the Embedded Multicore Processors2014
- Author(s)
  Xin Zhou, Norihiro Tomagou, Yasuaki Ito, and Koji Nakano
- Journal Title
  
  International Journal of Networking and Computing
  
  Volume: 4 Pages: 174-188
- NAID
  130005475352
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-25540024
[Journal Article] Implementations of the Hough Transform on the Embedded Multicore Processors2014
- Author(s)
  Xin Zhou, Norihiro Tomagou, Yasuaki Ito, and Koji Nakano
- Journal Title
  
  International Journal of Networking and Computing
  
  Volume: 4 Pages: 174-188
- NAID
  130005475352
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-24700033
[Journal Article] Accelerating ant colony optimisation for the travelling salesman problem on the GPU2014
- Author(s)
  Akihiro Uchida, Yasuaki Ito, Koji Nakano
- Journal Title
  
  International Journal of Parallel, Emergent and Distributed Systems
  
  Volume: 29 Issue: 4 Pages: 401-420
- DOI
  10.1080/17445760.2013.842568
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-26280002
[Journal Article] An FPGA implementation for neural networks with the FDFM processor core approach2013
- Author(s)
  Yuki Ago, Yasuaki Ito, Koji Nakano
- Journal Title
  
  International Journal of Parallel, Emergent and Distributed Systems, to appear
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-21500016
[Journal Article] An FPGA implementation for neural networks with the FDFM processor core approach2013
- Author(s)
  Yuki Ago, Yasuaki Ito, Koji Nakano
- Journal Title
  
  International Journal of Parallel, Emergent and Distributed Systems
  
  Volume: 28 Issue: 4 Pages: 1-13
- DOI
  10.1080/17445760.2012.684686
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-21500016
[Journal Article] A Classification Processor for a Support Vector Machine with embedded DSP slices and block RAMs in the FPGA2013
- Author(s)
  Yuki Ago, Koji Nakano and Yasuaki Ito
- Journal Title
  
  Proc. of the IEEE 7th International Symposium on Embedded Multicore SoCs
  
  Volume: 1 Pages: 91-96
- DOI
  10.1109/mcsoc.2013.30
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-24700033
[Journal Article] An Efficient Implementation of the Hough Transform using DSP slices and block RAMs on the FPGA2013
- Author(s)
  Xin Zhou, Yasuaki Ito and Koji Nakano
- Journal Title
  
  Proc. of the IEEE 7th International Symposium on Embedded Multicore SoCs
  
  Volume: 1 Pages: 85-90
- DOI
  10.1109/mcsoc.2013.29
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-24700033
[Journal Article] The Parallel FDFM Processor Core Approach for CRT-based RSA Decryption2012
- Author(s)
  Yasuaki Ito, Koji Nakano, Song Bo
- Journal Title
  
  International Journal of Networking and Computing
  
  Volume: Vol.1, No.1 Pages: 79-96
- NAID
  130005475309
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20700030
[Journal Article] A Rewriting Approach to Replace Asynchronous ROMs with Synchronous Ones for the Circuits with Cycles2012
- Author(s)
  Md. Nazrul Islam Mondal, Koji Nakano, Yasuaki Ito
- Journal Title
  
  International Journal of Networking and Computing
  
  Volume: Vol. 2, No. 1 Pages: 269-290
- NAID
  130005475365
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-24700033
[Journal Article] A Rewriting Approach to Replace Asynchronous ROMs with Synchronous Ones for the Circuits with Cycles2012
- Author(s)
  Md. Nazrul Islam Mondal, Koji Nakano, Yasuaki Ito
- Journal Title
  
  International Journal of Networking and Computing
  
  Volume: Vol. 2, No. 2 Pages: 269-290
- NAID
  130005475365
- URL
  http://www.ijnc.org/
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-21500016
[Journal Article] The Parallel FDFM Processor Core Approach for CRT-based RSA Decryption2012
- Author(s)
  Yasuaki Ito, Koji Nakano and Song Bo
- Journal Title
  
  International Journal of Networking and Computing
  
  Volume: Vol. 2, No. 1 Pages: 79-96
- NAID
  130005475309
- URL
  http://www.ijnc.org/
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-21500016
[Journal Article] The Parallel FDFM Processor Core Approachfor CRT-based RSA Decryption2012
- Author(s)
  Yasuaki Ito, Koji Nakano and Song Bo
- Journal Title
  
  International Journal of Networking and Computing
  
  Volume: Vol.2, No.1 Pages: 79-96
- NAID
  130005475309
- URL
  http://www.ijnc.org/index.php/ijnc/article/view/35
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20700030
[Journal Article] An Algorithm to Obtain Circuits with Synchronous RAMs2012
- Author(s)
  Md. Nazrul Islam Mondal, Koji Nakano and Yasuaki Ito
- Journal Title
  
  Journal of Communication and Computer
  
  Volume: Volume 9, Number 5 Pages: 547-559
- URL
  http://www.davidpublishing.com/
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-21500016
[Journal Article] A Graph Rewriting Approach for Converting Asynchronous ROMs into Synchronous Ones2011
- Author(s)
  Md.Nazrul Islam Mondal, Koji Nakano, Yasuaki Ito
- Journal Title
  
  IEICE TRANSACTIONS on Information and Systems
  
  Volume: E94-D Pages: 2378-2388
- NAID
  10030538006
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-21500016
[Journal Article] Efficient Exhaustive Verification of the Collatz Conjecture using DSP blocks of XilinxFPGAs2011
- Author(s)
  Yasuaki Ito, Koji Nakano
- Journal Title
  
  International Journal ofNet working and Computing
  
  Volume: Vol.1, No.1 Pages: 49-62
- NAID
  130005091729
- URL
  http://www.ijnc.org/index.php/ijnc/article/view/13
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20700030
[Journal Article] A Graph Rewriting Approach for Converting Asynchronous ROMs into Synchronous Ones2011
- Author(s)
  Bo Song, Yasuaki Ito, Koji Nakano
- Journal Title
  
  IEICE Trans. Inf. & Syst.
  
  Volume: E94-D Issue: 12 Pages: 2378-2388
- DOI
  10.1587/transinf.E94.D.2378
- NAID
  10030538006
- ISSN
  0916-8532, 1745-1361
- Language
  English
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20700030
[Journal Article] A Graph Rewriting Approach for Converting Asynchronous ROMs into Synchronous Ones2011
- Author(s)
  Md. Nazrul Islam Mondal, Koji Nakano, Yasuaki Ito
- Journal Title
  
  IEICE TRANSACTIONS on Information and Systems
  
  Volume: Vol.E94-D No.12 Pages: 2378-2388
- NAID
  10030538006
- URL
  http://dx.DOI:.org/10.1587/transinf.E94.D.2378
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-21500016
[Journal Article] Efficient Exhaustive Verification of the Collatz Conjecture using DSP blocks of Xilinx FPGAs2011
- Author(s)
  Yasuaki Ito, Koji Nakano
- Journal Title
  
  International Journal of Networking and Computing
  
  Volume: Vol. 1, No.1 Pages: 49-62
- NAID
  130005091729
- URL
  http://www.ijnc.org
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-21500016
[Journal Article] An RSA Encryption Hardware Algorithm using a Single DSP Block and a Single Block RAM on the FPGA International Journal of Networking and Computing2011
- Author(s)
  Song Bo Kensuke Kawaka mi, Koji Nakano, Yasuaki Ito
- Journal Title
  
  International Journal of Networking and Computing
  
  Volume: 1 Pages: 277-289
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-21500016
[Journal Article] Efficient Exhaustive Verification of the Collatz Conjecture using DSP blocks of Xilinx FPGAs2011
- Author(s)
  Yasuaki Ito, Koji Nakano
- Journal Title
  
  International Journal of Networking and Computing
  
  Volume: Vol.1, No.1 Pages: 49-62
- NAID
  130005091729
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20700030
[Journal Article] An RSA Encryption Hardware Algorithm using a Single DSP Block and a Single Block RAM on the FPGA2011
- Author(s)
  Song Bo, Kensuke Kawakami, Koji Nakano, Yasuaki Ito
- Journal Title
  
  International Journal of Networking and Computing
  
  Volume: Vol. 1, No.2 Pages: 277-289
- NAID
  130005475260
- URL
  http://www.ijnc.org/
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-21500016
[Journal Article] Efficient Exhaustive Verification of the Collatz Conjecture using DSP blocks of Xilinx FPGAs2011
- Author(s)
  Yasuaki Ito, Koji Nakano
- Journal Title
  
  International Journal of Networking and Computing Vol.1, No.1
  
  Pages: 49-62
- NAID
  130005091729
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20700030
[Journal Article] An RSA Encryption Hardware Algorithm using a Single DSPBlock and a Single Block RAM on the FPGA2011
- Author(s)
  Song Bo, Kensuke Kawakami, Koji Nakanoand Yasuaki Ito
- Journal Title
  
  International Journal of Networking and Computing
  
  Volume: Vol.1, No.2 Pages: 277-289
- NAID
  130005475260
- URL
  http://www.ijnc.org/index.php/ijnc/article/view/29
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20700030
[Journal Article] Efficient Exhaustive Verification of the Collatz Conjecture using DSP48E blocks of Xilinx Virtex-5 FPGAs2010
- Author(s)
  Yasuaki Ito, Koji Nakano
- Journal Title
  
  Proc.of Workshop on Advances in Parallel and Distributed Computational Models
  
  Pages: 1-8
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20700030
[Journal Article] Low-latency Connected Component Labeling Using an FPGA2010
- Author(s)
  Yasuaki Ito, Koji Nakano
- Journal Title
  
  International Journal on Foundations of Computer Science
  
  Volume: 21 Pages: 405-425
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-21500016
[Journal Article] An RSA Encryption Hardware Algorithm Using a Single DSP Block and a Single Block RAM on the FPGA2010
- Author(s)
  Bo Song, Kensuke Kawakami, Koji Nakano, Yasuaki Ito
- Journal Title
  
  Proc.of International Conference on Networking and Computing
  
  Pages: 140-147
- NAID
  130005475260
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-21500016
[Journal Article] Low-Latency Connected Component Labeling Using an FPGA2010
- Author(s)
  Yasuaki Ito, Koji Nakano
- Journal Title
  
  International Journal on Foundations of Computer Science
  
  Volume: Vol.21, No.3 Pages: 405-426
- URL
  http://dx.doi.org/10.1142/S0129054110007337
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20700030
[Journal Article] A Rewriting Algorithm to Generate AROM-free Fully Synchronous Circuits2010
- Author(s)
  Md.Nazrul Islam Mondal, Koji Nakano, Yasuaki Ito
- Journal Title
  
  Proc.of International Conference on Networking and Computing
  
  Pages: 148-157
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-21500016
[Journal Article] Low-Latency Connected Component Labeling Using an FPGA2010
- Author(s)
  Yasuaki Ito, Koji Nakano
- Journal Title
  
  International journal on Foundations of Computer Science Vol.21, No.3
  
  Pages: 405-426
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20700030
[Journal Article] Low-latency Connected Component Labeling Using an FPGA2010
- Author(s)
  Yasuaki Ito and Koji Nakano
- Journal Title
  
  International Journal on Foundations of Computer Science
  
  Volume: Vol.21, No. 3 Issue: 03 Pages: 405-425
- DOI
  10.1142/s0129054110007337
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-21500016
[Journal Article] Efficient Exhaustive Verification of the Collatz Conjecture using DSP48E blocks of Xilinx Virtex-5 FPGAs2010
- Author(s)
  Yasuaki Ito, Koji Nakano
- Journal Title
  
  Proc.of IPDPS Workshops
  
  Pages: 1-8
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-21500016
[Journal Article] A Hardware-Software Cooperative Approach for the Exhaustive Verification of the Collatz Cojecture2009
- Author(s)
  Yasuaki Ito, Koji Nakano
- Journal Title
  
  Proc.IEEE International Symposium on Parallel and Dsitributed Processing with Applications
  
  Pages: 63-70
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-21500016
[Journal Article] A Hardware-Software Cooperative Approach for the Exhaustive Verification of the Collatz Conjecture2009
- Author(s)
  Yasuaki Ito, Koji Nakano
- Journal Title
  
  Proc. of International Symposium on Parallel and Distributed Processing with Applications
  
  Pages: 63-70
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20700030
[Journal Article] Hierarchical composition of self-stabilizing protocols preserving the fault-containment property2009
- Author(s)
  Yukiko Yamauchi, Sayaka Kamei, Fukuhito Ooshita, Yoshiaki Katayama, Hirotsugu Kakugawa, Toshimitsu Masuzawa
- Journal Title
  
  IEICE Transaction on Information and Systerns E92・D
  
  Pages: 451-459
- NAID
  10026807985
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-17300020
[Journal Article] Maximum Connected Domatic Partition of Directed Path Graphswith Single Junction2008
- Author(s)
  Masaya Mito, Satoshi Fujita
- Journal Title
  
  Computing and Combinatorics 5092
  
  Pages: 425-433
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-17300020
[Journal Article] A New FM Screening Method to Generate Cluster-Dot Binary Images Using the Local Exhaustive Search with FPGA Acceleration2008
- Author(s)
  Yasuaki Ito, Koji Nakano
- Journal Title
  
  International journal on Foundations of Computer Science Vol.19, No.6
  
  Pages: 1373-1386
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20700030
[Journal Article] A New FM Screening Method to Generate Cluster-Dot Binary Images Using the Local Exhaustive Search with FPGA Acceleration2008
- Author(s)
  Yasuaki Ito, Koji Nakano
- Journal Title
  
  International Journal on Foundations of Computer Science
  
  Volume: Vol.19, No.6 Pages: 1373-1386
- URL
  http://dx.doi.org/10.1142/S0129054108006339
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20700030
[Journal Article] Move-optimal Gossiping among Mobile Agents2008
- Author(s)
  Tomoko Suzuki, Taisuke Izumi, Fukuhito Ooshita
- Journal Title
  
  Theoretical Computer Science 393・1-3
  
  Pages: 99-101
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-17300020
[Journal Article] A New FM Screening Method to Generate Cluster-Dot Binary Images Using the Local Exhaustive Search with FPGA Accel eration2008
- Author(s)
  Yasuaki Ito
- Journal Title
  
  International Journal on Foundations of Computer Science 19・6
  
  Pages: 1373-1386
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20700030
[Journal Article] Optimized Component Labeling Algorithm for using in Medium Sized FPGAs2008
- Author(s)
  Yasuaki Ito
- Journal Title
  
  Proc. of International Conference on Parallel and Distributed Computing, Applications and Technologies
  
  Pages: 171-176
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20700030
[Journal Article] A Robustness Based Ant Colony Optimization Routing for Ad Hoc Networks with GPSs2008
- Author(s)
  Daisuke Kadono, Tomoko Suzuki, Fukuhito Ooshita, Hirotsugu Kakugawa, Toshimitsu Masuzawa
- Journal Title
  
  Proc. of International Conference on Wireless Networks
  
  Pages: 360-366
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-17300020
[Journal Article] Component Labeling for k-Concave Binary Images Using an FPGA2008
- Author(s)
  Yasuaki Ito
- Journal Title
  
  Proc. of Workshop on Advances in Parallel and Distributed Computational Models (CDROM)
- NAID
  110006549190
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20700030
[Journal Article] Efficient Hardware Algorithms for N Choose K Counters Using the Bitonic Merger2007
- Author(s)
  Yasuaki Ito, Koij Nakano, Youhei Yamagishi
- Journal Title
  
  International Journal on Foundations of Computer Science 18・3
  
  Pages: 517-528
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-17650009
[Journal Article] Optimal Moves for Gossiping among Mobile Agents2007
- Author(s)
  Tomoko Suzuki, Taisuke Izumi, Fukuhito Ooshita, Hirotsugu Kakugawa, Toshimitsu Masuzawa
- Journal Title
  
  Proc. of the 14th Colloquium on Structual Information and Communication Complexity
  
  Pages: 151-165
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-17300020
[Journal Article] Efficient Hardware Algorithms for n Choose k Counters using the Bitonic Merge2007
- Author(s)
  Yasuaki Ito, Koji Nakano, Youhei Yamagishi
- Journal Title
  
  International Journal of Foundations of Computer Science (採録決定)
- Data Source
  KAKENHI-PROJECT-17650009
[Journal Article] Extended Skip Graphs for Efficient Key Search in Peer-to-Peer Environment2007
- Author(s)
  S. Fujita, A. Ohtsubo, M. Mito
- Journal Title
  
  Journal of Interconnection Networks 8・2
  
  Pages: 119-132
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-17300020
[Journal Article] Randomized Leader Election Protocols in Noisy Radio Networks with a Single Transceiver2006
- Author(s)
  J.L.Bordim, Y.Ito, K.Nakano
- Journal Title
  
  Proc. of International Symposium on Parallel and Distributed Processing and Application
  
  Pages: 246-256
- Data Source
  KAKENHI-PROJECT-17300020
[Journal Article] Efficient Hardware Algorithm for N Choose K Counters2006
- Author(s)
  Yasuaki Ito, Koji Nakano, Youhei Yamagishi
- Journal Title
  
  Proceedings of Internatinal of Parallel and Distributed Processing Systems (CD-ROM)
- Data Source
  KAKENHI-PROJECT-17650009
[Journal Article] An Energy Efficient Leader Election Protocol for Radio Network with a Single Transceiver2006
- Author(s)
  Jacir L.Bordim, Yasuaki Ito, Koji Nakano
- Journal Title
  
  IEICE Trans. on Fundamentals E89-A
  
  Pages: 1355-1361
- NAID
  110007502850
- Data Source
  KAKENHI-PROJECT-17300020
[Presentation] Diverse Adaptive Bulk Search: a Framework for Solving QUBO Problems on Multiple GPUs2023
- Author(s)
  Koji Nakano, Daisuke Takafuji, Yasuaki Ito, Takashi Yazane, Junko Yano, Shiro Ozaki, Ryota Katsuki, Rie Mori
- Organizer
  International Symposium on Parallel and Distributed Systems Workshop
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-23K21655
[Presentation] Graph-theoretic Formulation of QUBO for Scalable Local Search on GPUs2022
- Author(s)
  Ryota Yasudo, Koji Nakano, Yasuaki Ito, Yuya Kawamata, Ryota Katsuki, Shiro Ozaki, Takashi Yazane, Kenichiro Hamano
- Organizer
  24th Workshop on Advances in Parallel and Distributed Computational Models
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-23K21655
[Presentation] The Bonsai Hypothesis: an Efficient Network Pruning Technique2022
- Author(s)
  Yasuaki Ito, Koji Nakano, Akihiko Kasagi
- Organizer
  18th International Conference on Artificial Intelligence Applications and Innovations
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-20K11735
[Presentation] Acceleration of Deflate Encoding and Decoding with GPU implementations2021
- Author(s)
  Daisuke Takafuji, Koji Nakano, Yasuaki Ito, Akihiko Kasagi
- Organizer
  International Conference on Networking and Computing
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-23K21655
[Presentation] A GPU Implementation of Watercolor Painting Image Generation2021
- Author(s)
  Jiamian Huang, Yasuaki Ito, Koji Nakano
- Organizer
  International Conference on Networking and Computing
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-23K21655
[Presentation] A Prefix-Sum-Based Rabin-Karp Implementation for Multiple Pattern Matching on GPGPU2018
- Author(s)
  Lucas Saad N. Nunes, Jacir Luiz Bordim, Yasuaki Ito, Koji Nakano
- Organizer
  Sixth International Symposium on Computing and Networking
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] Tile Art Image Generation Using Conditional Generative Adversarial Networks2018
- Author(s)
  Naoki Matsumura, Hiroki Tokura, Yuki Kuroda, Yasuaki Ito, Koji Nakano
- Organizer
  Sixth International Symposium on Computing and Networking Workshops
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] Efficient Byte Stream Pattern Test using Bloom Filter with Rolling Hash Functions on the FPGA2018
- Author(s)
  Takuma Wada, Naoki Matsumura, Koji Nakano, Yasuaki Ito
- Organizer
  Sixth International Symposium on Computing and Networking
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] An Optimal Parallel Algorithm for Computing the Summed Area Table on the GPU2018
- Author(s)
  Yutaro Emoto, Shunji Funasaka, Hiroki Tokura, Takumi Honda, Koji Nakano, Yasuaki Ito
- Organizer
  Workshop on Advances in Parallel and Distributed Computational Models
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] Photomosaic Generation by Rearranging Subimages, with GPU Acceleration2017
- Author(s)
  Yi Yang, Yasuaki Ito, Koji Nakano
- Organizer
  International Parallel and Distributed Processing Symposium Workshops
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] Simple and Fast Parallel Algorithms for the Voronoi Map and the Euclidean Distance Map, with GPU Implementations2017
- Author(s)
  Takumi Honda, Shinnosuke Yamamoto, Hiroaki Honda, Koji Nakano, Yasuaki Ito
- Organizer
  International Conference on Parallel Processing
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] Accelerating the Smith-Waterman Algorithm Using Bitwise Parallel Bulk Computation Technique on GPU2017
- Author(s)
  Takahiro Nishimura, Jacir Luiz Bordim, Yasuaki Ito, Koji Nakano
- Organizer
  International Parallel and Distributed Processing Symposium Workshops
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] Almost Optimal Column-wise Prefix-sum Computation on the GPU2017
- Author(s)
  Hiroki Tokura, Toru Fujita, Koji Nakano, Yasuaki Ito
- Organizer
  International Conference on Parallel Processing and Applied Mathematics
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] A Hybrid Architecture for the Approximate String Matching on an FPGA2017
- Author(s)
  Takuma Wada, Shunji Funasaka, Koji Nakano, and Yasuaki Ito
- Organizer
  International Symposium on Computing and Networking
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-16K12413
[Presentation] Photomosaic Generation by Rearranging Subimages, with GPU Acceleration2017
- Author(s)
  Yi Yang, Yasuaki Ito, Koji Nakano
- Organizer
  International Symposium on Parallel and Distributed Processing Systems Workshops
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-16K12413
[Presentation] Single Kernel Soft Synchronization Technique for Task Arrays on CUDA-enabled GPUs, with Applications2017
- Author(s)
  Shunji Funasaka, Koji Nakano, Yasuaki Ito
- Organizer
  International Symposium on Computing and Networking
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] A Square Pointillism Image Generation, and Its GPU Acceleration2017
- Author(s)
  Hiroki Tokura, Yuki Kuroda, Yasuaki Ito, Koji Nakano
- Organizer
  International Symposium on Computing and Networking
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] A GPU Implementation of Bulk Execution of the Dynamic Programming for the Optimal Polygon Triangulation2017
- Author(s)
  Kohei Yamashita, Yasuaki Ito, Koji Nakano
- Organizer
  International Conference on Parallel Processing and Applied Mathematics
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] Accelerating the Smith-Waterman Algorithm Using Bitwise Parallel Bulk Computation Technique on GPU2017
- Author(s)
  Takahiro Nishimura, Jacir L. Bordim, Yasuaki Ito, Koji Nakano
- Organizer
  International Parallel and Distributed Processing Symposium Workshops
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-16K00171
[Presentation] A hardware sorter for almost sorted sequences, with FPGA implementations2016
- Author(s)
  Naoaki Harada, Koji Nakano and Yasuaki Ito
- Organizer
  International Symposium on Computing and Networking
- Place of Presentation
  広島
- Year and Date
  2016-11-22
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-16K12413
[Presentation] Accelerating Ant Colony Optimization for the Vertex Coloring Problem on the GPU2016
- Author(s)
  Ryouhei Murooka, Yasuaki Ito and Koji Nakano
- Organizer
  International Symposium on Computing and Networking
- Place of Presentation
  広島
- Year and Date
  2016-11-22
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] An Efficient Implementation of LZW Decompression in the FPGA2016
- Author(s)
  Xin Zhou, Yasuaki Ito, Koji Nakano
- Organizer
  International Parallel and Distributed Processing Symposium
- Place of Presentation
  アメリカ合衆国　シカゴ
- Year and Date
  2016-05-23
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-16K12413
[Presentation] Bitwise Parallel Bulk Computation on the GPU, with Application to the CKY Parsing for Context-Free Grammars2016
- Author(s)
  Toru Fujita, Koji Nakano, Yasuaki Ito
- Organizer
  International Parallel and Distributed Processing Symposium Workshops
- Place of Presentation
  アメリカ合衆国シカゴ
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-16K00171
[Presentation] Light Loss-Less Data Compression, with GPU implementation2016
- Author(s)
  Shunji Funasaka, Koji Nakano and Yasuaki Ito
- Organizer
  International Conference on Algorithms and Architectures for Parallel Processing
- Place of Presentation
  スペイン
- Year and Date
  2016-12-14
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] An Efficient Implementation of LZW Decompression in the FPGA2016
- Author(s)
  Xin Zhou, Koji Nakano, and Yasuaki Ito
- Organizer
  International Parallel and Distributed Processing Symposium
- Place of Presentation
  Chicago, USA
- Year and Date
  2016-05-23
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-25540024
[Presentation] A flexible-length-arithmetic processor based on FDFM approach in FPGAs2015
- Author(s)
  Tatsuya Kawamoto, Yasuaki Ito, Koji Nakano
- Organizer
  International Symposium on Computing and Networking
- Place of Presentation
  札幌市
- Year and Date
  2015-12-08
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-24700033
[Presentation] A Warp-synchronous Implementation for Multiple-length Multiplication on the GPU2015
- Author(s)
  Takumi Honda, Yasuaki Ito, Koji Nakano
- Organizer
  International Symposium on Computing and Networking
- Place of Presentation
  Sapporo, Japan
- Year and Date
  2015-12-08
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] Fast LZW compression using a GPU2015
- Author(s)
  Shunji Funasaka, Koji Nakano, Yasuaki Ito
- Organizer
  International Symposium on Computing and Networking
- Place of Presentation
  Sapporo, Japan
- Year and Date
  2015-12-08
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] A Parallel Algorithm for LZW Decompression, with GPU Implementation2015
- Author(s)
  Shunji Funasaka, Koji Nakano, Yasuaki Ito
- Organizer
  International Conference on Parallel Processing and Applied Mathematics
- Place of Presentation
  Krakow, Poland
- Year and Date
  2015-09-06
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] GPU-Accelerated Digital Halftoning by the Local Exhaustive Search2015
- Author(s)
  Hiroaki Kouge, Yasuaki Ito, Koji Nakano
- Organizer
  International Symposium on Parallel and Distributed Computing
- Place of Presentation
  Limassol, Cyprus
- Year and Date
  2015-06-29
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] A flexible-length-arithmetic processor based on FDFM approach in FPGAs2015
- Author(s)
  Tatsuya Kawamoto, Yasuaki Ito, Koji Nakano
- Organizer
  International Symposium on Computing and Networking
- Place of Presentation
  Sapporo, Japan
- Year and Date
  2015-12-08
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] Efficient GPU implementations for the Conway's Game of Life2015
- Author(s)
  Toru Fujita, Daigo Nishikori, Koji Nakano, Yasuaki Ito
- Organizer
  International Symposium on Computing and Networking
- Place of Presentation
  Sapporo, Japan
- Year and Date
  2015-12-08
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] A flexible-length-arithmetic processor based on FDFM approach in FPGAs2015
- Author(s)
  Tatsuya Kawamoto, Yasuaki Ito, Koji Nakano
- Organizer
  International Symposium on Computing and Networking
- Place of Presentation
  札幌
- Year and Date
  2015-12-09
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-25540024
[Presentation] Bulk GCD Computation Using a GPU to Break Weak RSA Keys2015
- Author(s)
  Toru Fujita, Koji Nakano and Yasuaki Ito
- Organizer
  Workshop on Advances in Parallel and Distributed Computational Models
- Place of Presentation
  Hyderabad, India
- Year and Date
  2015-05-25
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] Parallelization Techniques for Error Diffusion with GPU Implementations2015
- Author(s)
  Akihiko Kasagi, Koji Nakano, Yasuaki Ito
- Organizer
  International Symposium on Computing and Networking
- Place of Presentation
  Sapporo, Japan
- Year and Date
  2015-12-08
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] Parallel FDFM Approach for Computing GCDs Using the FPGA2015
- Author(s)
  Xin Zhou, Koji Nakano, and Yasuaki Ito
- Organizer
  International Conference on Parallel Processing and Applied Mathematics
- Place of Presentation
  Krakow, Poland
- Year and Date
  2015-09-06
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-25540024
[Presentation] A Fast Approximate String Matching Algorithm on GPU2015
- Author(s)
  Lucas Saad, Jacir Bordim, Koji Nakano, Yasuaki Ito
- Organizer
  International Symposium on Computing and Networking
- Place of Presentation
  Sapporo, Japan
- Year and Date
  2015-12-08
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] Optimal Parallel Hardware K-Sorter and Top K-Sorter, with FPGA implementations2015
- Author(s)
  Naoyuki Matsumoto, Koji Nakano, Yasuaki Ito
- Organizer
  International Symposium on Computing and Networking
- Place of Presentation
  Limassol, Cyprus
- Year and Date
  2015-12-09
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-25540024
[Presentation] A Flexible-Length-Arithmetic Processor Using Embedded DSP Slices and Block RAMs in FPGAs2013
- Author(s)
  Md. Nazrul Islam Mondal, Kohan Sai, Koji Nakano and Yasuaki Ito
- Organizer
  International Symposium on Computing and Networking
- Place of Presentation
  松山市
- Data Source
  KAKENHI-PROJECT-25540024
[Presentation] TinyCSE: Tiny Computer System for Education2013
- Author(s)
  Ryosuke Nakamura, Yasuaki Ito and Koji Nakano
- Organizer
  International Symposium on Computing and Networking
- Place of Presentation
  松山市
- Data Source
  KAKENHI-PROJECT-25540024
[Presentation] Template Matching using DSP slices on the FPGA2013
- Author(s)
  Kaoru Hashimoto, Yasuaki Ito and Koji Nakano
- Organizer
  International Symposium on Computing and Networking
- Place of Presentation
  松山市
- Data Source
  KAKENHI-PROJECT-25540024
[Presentation] Efficient Hough Transform on the FPGA using DPS slices and Block RAMs2013
- Author(s)
  Xin Zhou, Norihiro Tomagou, Yasuaki Ito, and Koji Nakano
- Organizer
  International Parallel and Distributed Processing Symposium
- Place of Presentation
  アメリカ・ボストン
- Data Source
  KAKENHI-PROJECT-25540024
[Presentation] A Classification Processor for a Support Vector Machine with embedded DSP slices and block RAMs in the FPGA2013
- Author(s)
  Yuki Ago, Koji Nakano and Yasuaki Ito
- Organizer
  IEEE 7th International Symposium on Embedded Multicore SoCs
- Place of Presentation
  東京
- Data Source
  KAKENHI-PROJECT-25540024
[Presentation] An Efficient Implementation of the Hough Transform using DSP slices and block RAMs on the FPGA2013
- Author(s)
  Xin Zhou, Yasuaki Ito and Koji Nakano
- Organizer
  International Parallel and Distributed Processing Symposium
- Place of Presentation
  東京
- Data Source
  KAKENHI-PROJECT-25540024
[Presentation] Efficient Hough Transform on the FPGA using DSP slices and Block RAMs2013
- Author(s)
  Xin Zhou, Norihiro Tomagou, Yasuaki Ito and Koji Nakano
- Organizer
  International Parallel and Distributed Processing Systems
- Place of Presentation
  Boston, USA
- Data Source
  KAKENHI-PROJECT-21500016
[Presentation] An Efficient Implementation of a Support Vector Machine in the FPGA2012
- Author(s)
  Yuki Ago, Yasuaki Ito and Koji Nakano
- Organizer
  The Second International Workshop on Networking, Computing, Systems, and Software
- Place of Presentation
  沖縄県那覇市
- Data Source
  KAKENHI-PROJECT-24700033
[Presentation] An FPGA Implementation of Hough Transform using DSP blocks and block RAMs2012
- Author(s)
  Xin Zhou, Yasuaki Ito and Koji Nakano
- Organizer
  The Second International Workshop on Networking, Computing, Systems, and Software
- Place of Presentation
  沖縄県那覇市
- Data Source
  KAKENHI-PROJECT-24700033
[Presentation] The Parallel FDFM Processor Core Approach for Neural Networks2011
- Author(s)
  Yuki Ago, Atsuo Inoue, Koji Nakano, Yasuaki Ito
- Organizer
  International Conference on Networking and Computing
- Place of Presentation
  大阪
- Year and Date
  2011-11-17
- Data Source
  KAKENHI-PROJECT-21500016
[Presentation] CRT-based Decryption using DSP blocks on the Xilinx Virtex-6 FPGA2011
- Author(s)
  Bo Song, Yasuaki Ito, and Koji Nakano
- Organizer
  Workshop on Advances in Parallel and Distributed Computational Models
- Place of Presentation
  アンカレッジ、米国
- Year and Date
  2011-05-16
- Data Source
  KAKENHI-PROJECT-21500016
[Presentation] An Algorithm to Remove Asynchronous ROMs in Circuits with Cycles, Proc.of International Conference on Networking and Computing2011
- Author(s)
  Md.Nazrul Islam Mondal, Koji Nakano, Yasuaki Ito
- Organizer
  International Conference on Networking and Computing
- Place of Presentation
  大阪
- Year and Date
  2011-11-17
- Data Source
  KAKENHI-PROJECT-21500016
[Presentation] CRT-based Decryption using DSP blocks on the Xilinx Virtex-6 FPGA2011
- Author(s)
  Bo Song, Yasuaki Ito, and Koji Nakano
- Organizer
  Proc. of Workshop on Advances in Parallel and Distributed Computational Modelsand Distributed Computational Models
- Place of Presentation
  U. S. A
- Year and Date
  2011-05-16
- Data Source
  KAKENHI-PROJECT-20700030
[Presentation] CRT-based Decryption using DSP blocks on the Xilinx Virtex-6 FPGA2011
- Author(s)
  Bo Song, Yasuaki Ito, Koji Nakano
- Organizer
  International Parallel and Distributed Processmg Symposium
- Place of Presentation
  アラスカ(米国)
- Year and Date
  2011-05-16
- Data Source
  KAKENHI-PROJECT-21500016
[Presentation] The Parallel FDFM Processor Core Approach for Neural Networks2011
- Author(s)
  Yuki Ago, Atsuo Inoue, Koji Nakano, and Yasuaki Ito
- Organizer
  International Conference on Networking and Computing
- Place of Presentation
  大阪、日本
- Year and Date
  2011-11-30
- Data Source
  KAKENHI-PROJECT-21500016
[Presentation] An Algorithm to Remove Asynchronous ROMs in Circuits with Cycles2011
- Author(s)
  Md. Nazrul Islam Mondal, Koji Nakano, and Yasuaki Ito
- Organizer
  International Conference on Networking and Computing
- Place of Presentation
  大阪、日本
- Year and Date
  2011-11-30
- Data Source
  KAKENHI-PROJECT-21500016
[Presentation] An RSA Encryption Hardware Algorithm Using a Single DSP Block and a Single Block RAM on the FPGA2010
- Author(s)
  Bo Song, Kensuke Kawakami, Koji Nakano, Yasuaki Ito
- Organizer
  Proc.of International Conference on Networking and Computing, pp.140-147
- Place of Presentation
  Hiroshima, Awe
- Year and Date
  2010-11-18
- Data Source
  KAKENHI-PROJECT-20700030
[Presentation] An RSA Encryption Hardware Algorithm Using a Single DSP Block and a Single Block RAM on the FPGA2010
- Author(s)
  Bo Song, Kensuke Kawakami, Koji Nakano, and Yasuaki Ito
- Organizer
  International Conference on Networking and Computing
- Place of Presentation
  広島、日本
- Year and Date
  2010-11-17
- Data Source
  KAKENHI-PROJECT-21500016
[Presentation] Efficient Exhaustive Verification of the CollatzConjecture using DSP48E blocks of XilinxVirtex-5 FPGAs2010
- Author(s)
  Yasuaki Ito, Koji Nakano
- Organizer
  Proc. of Workshop onAdvances in Parallel and DistributedComputational Models(CD-ROM ofInternational Parallel and Distri buted Processing Symposium)
- Place of Presentation
  Atlanta, U. S. A
- Year and Date
  2010-04-19
- Data Source
  KAKENHI-PROJECT-20700030
[Presentation] A Rewriting Algorithm to Generate AROM-free Fully Synchronous Circuits2010
- Author(s)
  Md. Nazrul Islam Mondal, Koji Nakano, and Yasuaki Ito
- Organizer
  International Conference on Networking and Computing
- Place of Presentation
  広島、日本
- Year and Date
  2010-11-17
- Data Source
  KAKENHI-PROJECT-21500016
[Presentation] An RSA EncryptionHardware Algorithm Using a Single DSPBlock and a Single Block RAM on the FPGA2010
- Author(s)
  Bo Song, Kensuke Kawakami, Koji Nakano, and Yasuaki Ito
- Organizer
  Proc. of International Conference on Networking and Computing
- Place of Presentation
  Hiroshima
- Year and Date
  2010-11-18
- Data Source
  KAKENHI-PROJECT-20700030
[Presentation] Efficient Exhaustive Verification of the Collatz Conjecture using DSP48E blocks of Xilinx Virtex-5 FPGAs2010
- Author(s)
  Yasuaki Ito, Koji Nakano
- Place of Presentation
  アトランタ、米国
- Year and Date
  2010-04-19
- Data Source
  KAKENHI-PROJECT-21500016
[Presentation] Efficient Exhaustive Verification of the Collatz Conjecture using DSP48E blocks of Xilinx Virtex-5 FPGAs2010
- Author(s)
  Yasuaki Ito, Koji Nakano
- Organizer
  Proc.of Workshop on Advances in Parallel and Distributed Computational Models (CD-ROM of International Parallel and Distributed Processing Symposium)
- Place of Presentation
  Atlanta, U.S.A
- Year and Date
  2010-04-19
- Data Source
  KAKENHI-PROJECT-20700030
[Presentation] AHardware-Software Cooperative Approach for the Exhaustive Verification of the Collatz Conjecture2009
- Author(s)
  Yasuaki Ito and Koji Nakano
- Organizer
  Proc. ofInternational Symposium on Parallel and Distributed Processing with Applications
- Place of Presentation
  Chengdu, China
- Year and Date
  2009-08-10
- Data Source
  KAKENHI-PROJECT-20700030
[Presentation] A Hardware-Software Cooperative Approach for the Exhaustive Verification of the Collatz Cojecture2009
- Author(s)
  Yasuaki I t o , Ko ji Nakano
- Organizer
  International Symposium on Parallel and Distributed Processing with Applications
- Place of Presentation
  成都、中国
- Year and Date
  2009-08-09
- Data Source
  KAKENHI-PROJECT-21500016
[Presentation] ComponentLabeling for k-Concave Binary Images Usingan FPGA2008
- Author(s)
  Yasuaki Ito, Koji Nakano
- Organizer
  Proc. of Workshop on Advances inParallel and Distributed ComputationalModels(CD-ROM of International Paralleland Distributed Processing Symposium)
- Place of Presentation
  Miami, U. S. A
- Year and Date
  2008-04-14
- Data Source
  KAKENHI-PROJECT-20700030
[Presentation] OptimizedComponent Labeling Algorithm for using in Medium Sized FPGAs, in Proc. Of International Conference on Parallel and Distributed Computing2008
- Author(s)
  Yasuaki Ito, Koji Nakano
- Organizer
  Applications and Technologies
- Place of Presentation
  Dunedin, New Zealand
- Year and Date
  2008-12-03
- Data Source
  KAKENHI-PROJECT-20700030
[Presentation] 同期ブロックRAMの非同期ブロックRAMへの変換について2008
- Author(s)
  伊藤靖朗
- Organizer
  第4回情報科学ワークショップ
- Place of Presentation
  長浜市
- Year and Date
  2008-09-09
- Data Source
  KAKENHI-PROJECT-20700030
[Presentation] Component Labeling for k-Concave Binary Images Using an FPGA2007
- Author(s)
  Yasuaki Ito, Koji Nakano
- Organizer
  電子情報通信学会コンピュテーション研究会
- Place of Presentation
  広島大学
- Year and Date
  2007-12-14
- Data Source
  KAKENHI-PROJECT-17650009
[Presentation] A GPU Implementation of Clipping-Free Halftoning using the Direct Binary Search
- Author(s)
  Hiroaki Kouge, Yasuaki Ito and Koji Nakano
- Organizer
  International Conference on Algorithms and Architectures for Parallel Processing
- Place of Presentation
  中国，大連
- Year and Date
  2014-08-24 – 2014-08-27
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] A CUDA C Program Generator for Bulk Execution of a Sequential Algorithm
- Author(s)
  Daisuke Takafuji, Koji Nakano and Yasuaki Ito
- Organizer
  International Conference on Algorithms and Architectures for Parallel Processing
- Place of Presentation
  中国，大連
- Year and Date
  2014-08-24 – 2014-08-27
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] Random Address Permute Shift Technique for the Shared Memory on GPUs
- Author(s)
  Koji Nakano, Susumu Matsumae, Yasuaki Ito
- Organizer
  International Conference on Parallel Processing
- Place of Presentation
  米国，ミネアポリス
- Year and Date
  2014-09-09 – 2014-09-12
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] Thorough Evaluation of GPU Shared Memory Load and Store Instructions
- Author(s)
  Satoshi Okamoto, Yasuaki Ito, Koji Nakano, Jacir L. Bordim
- Organizer
  International Symposium on Computing and Networking
- Place of Presentation
  静岡
- Year and Date
  2014-12-10 – 2014-12-12
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] An Efficient Implementation of the One-Dimensional Hough Transform Algorithm for Circle Detection on the FPGA
- Author(s)
  Xin Zhou, Yasuaki Ito, Koji Nakano
- Organizer
  International Symposium on Computing and Networking
- Place of Presentation
  静岡
- Year and Date
  2014-12-09 – 2014-12-11
- Data Source
  KAKENHI-PROJECT-25540024
[Presentation] Bulk Execution of Oblivious Algorithms on the Unified Memory Machine, with GPU Implementation
- Author(s)
  Kazuya Tani, Daisuke Takafuji, Koji Nakano, Yasuaki Ito
- Organizer
  International Parallel and Distributed Processing Symposium Workshops
- Place of Presentation
  米国，フェニックス
- Year and Date
  2014-05-19 – 2014-05-23
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] Optimality of Fundamental Parallel Algorithms on the Hierarchical Memory Machine, with GPU implementation
- Author(s)
  Koji Nakano and Yasuaki Ito
- Organizer
  International Conference on Parallel, Distributed and Network-Based Processing
- Place of Presentation
  フィンランド，ツルク
- Year and Date
  2015-03-04 – 2015-03-06
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] Parallel Algorithms for the Summed Area Table on the Asynchronous Hierarchical Memory Machine, with GPU implementations
- Author(s)
  Akihiko Kasagi, Koji Nakano, Yasuaki Ito
- Organizer
  International Symposium on Computing and Networking
- Place of Presentation
  米国，ミネアポリス
- Year and Date
  2014-09-09 – 2014-09-12
- Data Source
  KAKENHI-PROJECT-26280002
[Presentation] An Efficient Implementation of the Gradient-based Hough Transform using DSP slices and block RAMs on the FPGA
- Author(s)
  Xin Zhou, Yasuaki Ito, Koji Nakano
- Organizer
  International Parallel and Distributed Processing Symposium
- Place of Presentation
  Phoenix, USA
- Year and Date
  2014-05-19 – 2014-05-23
- Data Source
  KAKENHI-PROJECT-25540024

1. NAKANO Koji (30281075)

# of Collaborated Projects: 10 results

# of Collaborated Products: 103 results
2. 高藤大介 (00314732)

# of Collaborated Projects: 3 results

# of Collaborated Products: 9 results
3. 角川裕次 (80253110)

# of Collaborated Projects: 1 results

# of Collaborated Products: 3 results
4. 藤田聡 (40228995)

# of Collaborated Projects: 1 results

# of Collaborated Products: 2 results
5. 安戸僚汰 (00846941)

# of Collaborated Projects: 1 results

# of Collaborated Products: 1 results

Ito Yasuaki 伊藤 靖朗

ITO Yasuaki 伊藤 靖朗

Research Projects

Research Products

Co-Researchers

Massively Parallel GPU Simulation for Quantum ComputingPrincipal Investigator

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超並列システム向け可逆データ圧縮法の提案と実用化

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Development of a Massively Parallel Machine Learning Environment for GPUs using Circuit SimulationPrincipal Investigator

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Ultra high-throughput computation using bit-level parallelization for the GPUPrincipal Investigator

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Low-power and super-linear speed-up computation by heterogeneous parallel computing systems with development environment

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Parallel Computation Theory for Memory Machine Models and Next Generation GPGPU Architecture

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Development tools and environment for General-Purpose computing on FPGA (GPFPGA)

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Accelerating computations using many-core architecture for FPGAsPrincipal Investigator

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Research on abstract modelsof FPGAs and evaluation of hardware algorithms

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A study on establishment of a theory for accelerating computation based on partial-computation using FPGAsPrincipal Investigator

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アドホックネットワークの実用化に向けた省電力通信プロトコルの研究

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リコンフィギュラブルコンピューティング向け簡易開発環境の構築

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[Journal Article] Efficient parallel implementations to compute the diameter of a graph2023

Author(s)

Journal Title

Ito Yasuaki 伊藤靖朗

ITO Yasuaki 伊藤靖朗