KOBAYASHI Fuminori 小林史典

… Alternative Names

小林史典コバヤシフミノリ

HAMAGUCHI Eshun

Less

Researcher Number	60134970
Other IDs
External Links
Affiliation (based on the past Project Information) *help	2010: 九州工業大学, システム創成情報工学研究系, 教授 2008 – 2010: Kyushu Institute of Technology, 大学院・情報工学研究院, 教授 2008 – 2010: 九州工業大学, 情報工学研究院, 教授 1997 – 1998: 九州工業大学, 情報工学部, 教授 1995: 九州工業大学, 情報工学部, 助教授 … More 1989: 九州工業大学, 情報工学部, 助教授 1986: Assoc. Prof. of Fac. of Human Sciences, Osaka Univ. 1986: Assistant Professor of Technological University of Nagaoka, 工学部機械系, 助教授 Less
Review Section/Research Field	Principal Investigator 計測・制御工学 / Perception information processing/Intelligent robotics Except Principal Investigator 金属加工(含鋳造) / 社会学(含社会福祉関係) / Microdevices/Nanodevices
Keywords	Principal Investigator FPGA / ASIC / high-order system / logic optimization / H_* control / 論理最適化 / 高次系 / 論理構築化 / H_∞制御 / クロックジッタ … More / CORDIC / クロック・ジッタ / 高調波歪 / ディジタル・オーディオ / 有限整定 / 速度制御 / PLL(Phase-Locked Loop) / ロボット / 軌道制御 / 学習制御 / 繰返し制御 … More Except Principal Investigator FEM / IMAGE-PROCESSING / STAINLESS-STEEL / FORGING / 弾塑性解析 / プラスティシン / 画像処理 / 鍛造 / 有限要素法 / Individualism / Contextualism / Viewpoint of interpersonal relationship / Values / 仕事〔勤労〕観 / 「個人主義」 / 「間人主義」 / 対人関係観 / 価値観 / FPGA / ホログラムメモリ / DLP / MEMS / プログラマブルデバイス / 光再構成ゲートアレイ Less

High-speed optically reconfigurable gate array exploiting a MEMS and a laser array
- Principal Investigator
  
  WATANABE Minoru
- Project Period (FY)
  2008 – 2010
- Research Category
  
  Grant-in-Aid for Scientific Research on Innovative Areas (Research a proposed research project)
- Research Field
  
  Microdevices/Nanodevices
- Research Institution
  Shizuoka University
Circuit-efficient sample-rate convertor by Fourier interpolationPrincipal Investigator
- Principal Investigator
  
  KOBAYASHI Fuminori
- Project Period (FY)
  2008 – 2010
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  Perception information processing/Intelligent robotics
- Research Institution
  Kyushu Institute of Technology
Ultra-fast H_* controllers using ASIC's and their field development environmentPrincipal Investigator
- Principal Investigator
  
  KOBAYASHI Fuminori
- Project Period (FY)
  1997 – 1998
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  計測・制御工学
- Research Institution
  Kyushu Institute of Technology
ASICを用いたFIR-PLL速度制御Principal Investigator
- Principal Investigator
  
  小林史典
- Project Period (FY)
  1995
- Research Category
  
  Grant-in-Aid for General Scientific Research (C)
- Research Field
  
  計測・制御工学
- Research Institution
  Kyushu Institute of Technology
繰返し制御に基づく可変速軌道制御Principal Investigator
- Principal Investigator
  
  小林史典
- Project Period (FY)
  1989
- Research Category
  
  Grant-in-Aid for General Scientific Research (C)
- Research Institution
  Kyushu Institute of Technology
Estimation Method of Metal Deformation by Analytical and Model Simulations
- Principal Investigator
  
  KOBAYASHI Masaru
- Project Period (FY)
  1985 – 1986
- Research Category
  
  Grant-in-Aid for General Scientific Research (B)
- Research Field
  
  金属加工(含鋳造)
- Research Institution
  Technological University of Nagaoka
Research Studies on the Basic Values of the Japanese
- Principal Investigator
  
  HAMAGUCHI Eshun
- Project Period (FY)
  1984 – 1986
- Research Category
  
  Grant-in-Aid for General Scientific Research (B)
- Research Field
  
  社会学(含社会福祉関係)
- Research Institution
  Osaka University

All 2011 2010 2009 2008

All Journal Article Presentation

[Journal Article] Optically reconfigurable gate array with a polymer-dispersed liquid crystal holographic memory2011
- Author(s)
  T.Mabuchi, M.Watanabe, A.Ogiwara, F.Kobayashi
- Journal Title
  
  NASA/ESA Conference on Adaptive Hardware and Systems
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20200027
[Journal Article] Programming Options for an Optical FPGA with Clockwise Dynamic Reconfigurability2011
- Author(s)
  F.Matsusaki, F.Kobayashi, A.Nagino, M.Watanabe
- Journal Title
  
  International Conference on Innovative Computing and Communication and Asia-Pacific Conference on Information Technology and Ocean Engineering
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20200027
[Journal Article] Formation of holographic memory for defect tolerance in optically reconfigurable gate arrays2010
- Author(s)
  A.Ogiwara, M.Watanabe, T.Mabuchi, F.Kobayashi
- Journal Title
  
  Applied Optics
  
  Volume: Vol.49, No.22 Pages: 4255-4261
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20200027
[Journal Article] Formation of holographic memory using subwavelength grating mask for optically reconfigurable gate array2010
- Author(s)
  A.Ogiwara, M.Watanabe, T.Mabuchi, F.Kobayashi
- Journal Title
  
  MICROOPTICS CONFERENCE
  
  Pages: 108-109
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20200027
[Journal Article] Formation of holographic memory for defect tolerance in optically reconfigurable gate arrays2010
- Author(s)
  A.Ogiwara, M.Watanabe, T.Mabuchi, F.Kobayashi
- Journal Title
  
  Applied Optics Vol.49, No.22
  
  Pages: 4255-4261
- Data Source
  KAKENHI-PROJECT-20200027
[Journal Article] Programming Options for an Optical FPGA with Clockwise Dynamic Reconfigurability2010
- Author(s)
  F.Matsusaki, F.Kobayashi, A.Nagino, M.Watanabe
- Journal Title
  
  International Conference on Innovative Computing and Communication and Asia-Pacific Conference on Information Technology and Ocean Engineering
  
  Volume: (CD-ROM)
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20200027
[Journal Article] Formation of volume holographic memory using liquid-crystal composites for optically reconfigurable gate array2009
- Author(s)
  A.Ogiwara, Y.Ochi, M.Miyake, M.Watanabe, T.Mabuchi, F.Kobayashi
- Journal Title
  
  15th MICROOPTICS CONFERENCE
  
  Pages: 194-195
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20200027
[Presentation] Phase-Locked Loops-Principle and some topics2010
- Author(s)
  小林史典
- Organizer
  IEEE APCCAS (Asia-Pacific Conf. on Circuits And Systems)
- Place of Presentation
  Kuala Lumpur, Malaysia
- Year and Date
  2010-12-06
- Data Source
  KAKENHI-PROJECT-20500156
[Presentation] リアルタイムOSによる最短時間PLLの実装2010
- Author(s)
  池田浩平、小林史典
- Organizer
  平成22年度電気関係学会九州支部連合大会
- Place of Presentation
  九州産業大学、福岡市
- Year and Date
  2010-09-26
- Data Source
  KAKENHI-PROJECT-20500156
[Presentation] 偏光依存性ホログラムメモリを用いた光再構成試験2010
- Author(s)
  間渕, 越智, 渡邊, 荻原, 小林
- Organizer
  第57回応用物理学関係連合講演会
- Place of Presentation
  東海大学湘南キャンパス
- Year and Date
  2010-03-17
- Data Source
  KAKENHI-PROJECT-20200027
[Presentation] A Motor Speed Control System Using Dual-Loop PLL and Speed Feed-Forward/Back2010
- Author(s)
  H.Machida, M.Kambara, K.Tanaka, F.Kobayashi
- Organizer
  IEEE ICMA (Int.Conf.on Mechatronics and Automation)
- Place of Presentation
  国際会議場、西安、中国
- Year and Date
  2010-08-06
- Data Source
  KAKENHI-PROJECT-20500156
[Presentation] 偏光依存性ホログラムメモリの偏光スイッチングを用いた光再構成試験2010
- Author(s)
  間渕, 渡邊, 荻原, 小林
- Organizer
  平成22年度電気関係学会東海支部連合大会
- Place of Presentation
  中部大学(CD-ROM)
- Data Source
  KAKENHI-PROJECT-20200027
[Presentation] A Motor Speed Control System Using Dual-Loop PLL and Speed Feed-Forward/Back2010
- Author(s)
  H.Machida, M.Kambara, K.Tanaka, F.Kobayashi
- Organizer
  IEEE ICMA (Int.Conf. on Mechatronics and Automation)
- Place of Presentation
  Xian, China
- Year and Date
  2010-08-06
- Data Source
  KAKENHI-PROJECT-20500156
[Presentation] Phase-Locked Loops---Principle and some topics2010
- Author(s)
  F.Kobayashi
- Organizer
  IEEE APCCAS (Asia-Pacific Conf.on Circuits And Systems)
- Place of Presentation
  ヒルトンホテル、クアラルンプール、マレーシア
- Year and Date
  2010-12-06
- Data Source
  KAKENHI-PROJECT-20500156
[Presentation] 液晶を用いた光再構成型ゲートアレイ用異方性ホログラムメモリの作製2010
- Author(s)
  荻原, 越智, 渡邊, 間渕, 小林
- Organizer
  第57回応用物理学関係連合講演会
- Place of Presentation
  東海大学湘南キャンパス
- Year and Date
  2010-03-17
- Data Source
  KAKENHI-PROJECT-20200027
[Presentation] 液晶を用いた光再構成型ゲートアレイ用異方性ホログラムメモリの作製2010
- Author(s)
  荻原, 越智, 渡邊, 間渕, 小林
- Organizer
  第57回応用物理学関係連合講演会講演予稿集 p.12-232
- Place of Presentation
  東海大学湘南キャンパス
- Data Source
  KAKENHI-PROJECT-20200027
[Presentation] リアルタイムOSによる最短時間PLLの実装2010
- Author(s)
  池田浩平、小林史典
- Organizer
  平成22年度電気関係学会九州支部連合大会
- Place of Presentation
  福岡市
- Year and Date
  2010-09-26
- Data Source
  KAKENHI-PROJECT-20500156
[Presentation] 偏光依存性ホログラムメモリを用いた光再構成試験2010
- Author(s)
  間渕, 越智, 渡邊, 荻原, 小林
- Organizer
  第57回応用物理学関係連合講演会講演予稿集 p.03-087
- Place of Presentation
  東海大学湘南キャンパス
- Data Source
  KAKENHI-PROJECT-20200027
[Presentation] 偏光依存性ホログラムメモリの偏光スイッチングを用いた光再構成試験2010
- Author(s)
  間渕, 渡邊, 荻原, 小林
- Organizer
  平成22年度電気関係学会東海支部連合大会
- Place of Presentation
  中部大学
- Data Source
  KAKENHI-PROJECT-20200027
[Presentation] フーリエ補間によるサンプリング・レート変換 : CORDICアルゴリズムの位相近似2009
- Author(s)
  井上学、小林史典
- Organizer
  平成21年度電気関係学会九州支部連合大会
- Place of Presentation
  九州工業大学情報工学部福岡県飯塚市
- Year and Date
  2009-09-29
- Data Source
  KAKENHI-PROJECT-20500156
[Presentation] 光再構成型ゲートアレイの開発環境2009
- Author(s)
  梛野、小林、渡邊
- Organizer
  平成21年度電気関係学会九州支部連合大会
- Place of Presentation
  九州工業大学情報工学部 (福岡県飯塚市)
- Year and Date
  2009-09-29
- Data Source
  KAKENHI-PROJECT-20200027
[Presentation] A PLL Configuration for Reducing both Incoming and Inherent Jitters2009
- Author(s)
  F.Kobayashi, Y.Egashira H.Kondoh
- Organizer
  IEEE ICECS(Int.Conf.on Electronics, Circuits and Systems)
- Place of Presentation
  Yasmine Hammamet Hotel Hammanet, Tunisia
- Year and Date
  2009-12-14
- Data Source
  KAKENHI-PROJECT-20500156
[Presentation] フーリエ補間によるサンプリング・レート変換:CORDICアルゴリズムの位相近似2009
- Author(s)
  井上学、小林史典
- Organizer
  平成21年度電気関係学会九州支部連合大会
- Place of Presentation
  福岡県飯塚市
- Year and Date
  2009-09-29
- Data Source
  KAKENHI-PROJECT-20500156
[Presentation] A PLL Configuration for Reducing both Incoming and Inherent Jitters2009
- Author(s)
  F.Kobayashi, Y.Egashira, H.Kondoh
- Organizer
  IEEE ICECS (Int.Conf. on Electronics, Circuits and Systems)
- Place of Presentation
  Hammamet, Tunisia
- Year and Date
  2009-12-14
- Data Source
  KAKENHI-PROJECT-20500156
[Presentation] PLL by Interpolate Compensation2008
- Author(s)
  Y.Nakanishi, F.Kobayashi, H.Kondoh, Low-Jitter
- Organizer
  IEEE APCCAS (Asia -Pacific Conf. on Circuits And Sys- tems)
- Place of Presentation
  Macau, China
- Year and Date
  2008-12-02
- Data Source
  KAKENHI-PROJECT-20500156
[Presentation] Low-Jitter PLL by Interpolate Compensation2008
- Author(s)
  Y. Nakanishi, F. Kobayashi, H. Kondoh
- Organizer
  IEEE Asia-Pacific Conf. on Circuitsand Systems
- Place of Presentation
  Venetian Resort Hotel, Macau, China
- Year and Date
  2008-12-02
- Data Source
  KAKENHI-PROJECT-20500156
[Presentation] 光再構成ゲートアレイにおける故障回避2008
- Author(s)
  長藤、小林
- Organizer
  平成20年度電気関係学会九州支部連合大会
- Place of Presentation
  大分大学
- Year and Date
  2008-09-25
- Data Source
  KAKENHI-PROJECT-20200027

1. HAMAGUCHI Eshun (50030036)

# of Collaborated Projects: 2 results

# of Collaborated Products: 0 results
2. WATANABE Minoru (30325576)

# of Collaborated Projects: 2 results

# of Collaborated Products: 14 results
3. OGIWARA Akifumi (00342569)

# of Collaborated Projects: 1 results

# of Collaborated Products: 11 results
4. HIRAKAWA Takuya (30304869)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
5. TSUJINO Taro (00227406)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
6. SUGIMAN Toshio (10135642)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
7. MISHIMA Rinpati (50030044)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
8. OMURA Eisho (30047485)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
9. INOUE Shun (40025044)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
10. KOBAYASHI Masaru (60126472)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
11. SUZUKI Toshio (70115111)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
12. MIYATA Yasunori (50016177)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
13. MATSUDA Jin-ici (30029087)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
14. MIYAGAWA Matsuo (20087167)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results

KOBAYASHI Fuminori 小林 史典

小林 史典 コバヤシ フミノリ

HAMAGUCHI Eshun

Research Projects

Research Products

Co-Researchers

High-speed optically reconfigurable gate array exploiting a MEMS and a laser array

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

Circuit-efficient sample-rate convertor by Fourier interpolationPrincipal Investigator

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

Ultra-fast H_* controllers using ASIC's and their field development environmentPrincipal Investigator

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

ASICを用いたFIR-PLL速度制御Principal Investigator

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

繰返し制御に基づく可変速軌道制御Principal Investigator

Principal Investigator

Project Period (FY)

Research Category

Research Institution

Estimation Method of Metal Deformation by Analytical and Model Simulations

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

Research Studies on the Basic Values of the Japanese

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

[Journal Article] Optically reconfigurable gate array with a polymer-dispersed liquid crystal holographic memory2011

Author(s)

Journal Title

Data Source

[Journal Article] Programming Options for an Optical FPGA with Clockwise Dynamic Reconfigurability2011

Author(s)

Journal Title

Data Source

[Journal Article] Formation of holographic memory for defect tolerance in optically reconfigurable gate arrays2010

Author(s)

Journal Title

Data Source

[Journal Article] Formation of holographic memory using subwavelength grating mask for optically reconfigurable gate array2010

Author(s)

Journal Title

Data Source

[Journal Article] Formation of holographic memory for defect tolerance in optically reconfigurable gate arrays2010

Author(s)

Journal Title

Data Source

[Journal Article] Programming Options for an Optical FPGA with Clockwise Dynamic Reconfigurability2010

Author(s)

Journal Title

Data Source

[Journal Article] Formation of volume holographic memory using liquid-crystal composites for optically reconfigurable gate array2009

Author(s)

Journal Title

Data Source

[Presentation] Phase-Locked Loops-Principle and some topics2010

Author(s)

Organizer

Place of Presentation

Year and Date

KOBAYASHI Fuminori 小林史典

小林史典コバヤシフミノリ