Waidyasooriya Hasitha Muthumala ＷａｉｄｙａｓｏｏｒｉｙａＨａｓｉｔｈａ・Ｍｕｔｈｕｍａｌａ

… Alternative Names

Waidyasooriya Hasitha・Muthumala ウイツデヤスーリヤハシタ・ムトウマラ

Waidyasooriya Hasitha Waidyasooriya Ha

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Researcher Number	60723533
Other IDs
Affiliation (Current)	2025: 東北大学, 情報科学研究科, 准教授
Affiliation (based on the past Project Information) *help	2019 – 2025: 東北大学, 情報科学研究科, 准教授 2015 – 2016: 東北大学, 情報科学研究科, 助教
Review Section/Research Field	Principal Investigator Basic Section 60040:Computer system-related / Basic Section 60100:Computational science-related / Computer system Except Principal Investigator Sections That Are Subject to Joint Review: Basic Section60030:Statistical science-related , Basic Section61030:Intelligent informatics-related / Basic Section 60030:Statistical science-related / Basic Section 61030:Intelligent informatics-related / Basic Section 60100:Computational science-related / Computer system/Network
Keywords	Principal Investigator 並列計算 / 組み合わせ最適化問題 / FPGAアクセラレータ / 量子アニーリング / 組合せ最適化問題 / カスタムアクセラレータ / FPGA / 量子アニーリングシミュレーション / ビッグデーター応用 / ビッギデータ応用 … More / ビッグデータ処理 / 高速ストレージ / 文字列処理 / 簡潔データ構造 … More Except Principal Investigator FPGA / GPU / 並列処理 / 高性能計算 / リコンフィギャラブルコンピューティング / アクセラレータ / 画像処理 / 自然言語処理 / AI / 量子アリーリング / マテリアルインフォマティクス / 組合せ最適化問題 / 大規模固有値問題 / 大規模固有値計算 / 量子コンピューティング / 量子化学計算 / 量子コンピュータ / 量子アニーリング / 量子コンピュータシミュレーション / 量子化学 / ヘテロジニアスコンピューティング / 高位合成 / リコンフィギャラブルシステム / 大規模計算 / ビッグデータ / リコンフギャラブルコンピューティング / OpenCL / ビッグデータ処理 / カスタムアクセラレータ Less

大規模・高精度な流体計算向け高効率テンソルネットワークに基づくFPGA・GPU計算基盤Principal Investigator
- Principal Investigator
  
  Waidyasooriya Hasitha・Muthumala
- Project Period (FY)
  2025 – 2027
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Review Section
  
  Basic Section 60040:Computer system-related
- Research Institution
  Tohoku University
High-efficiency Heterogeneous Custom Accelerator Foundation for Transformer
- Principal Investigator
  
  張山昌論
- Project Period (FY)
  2024 – 2027
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Review Section
  
  Basic Section 61030:Intelligent informatics-related
  Basic Section 60030:Statistical science-related
  Sections That Are Subject to Joint Review: Basic Section60030:Statistical science-related , Basic Section61030:Intelligent informatics-related
- Research Institution
  Tohoku University
Custom Accelerators for Quantum-Annealing-Assisted Material Informatics
- Principal Investigator
  
  Masanori Hariyama
- Project Period (FY)
  2020 – 2023
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Review Section
  
  Basic Section 60100:Computational science-related
- Research Institution
  Tohoku University
High Speed FPGA Simulator for Large Scale Quantum Annealing SimulationsPrincipal Investigator
- Principal Investigator
  
  Waidyasooriya Hasitha
- Project Period (FY)
  2019 – 2022
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Review Section
  
  Basic Section 60100:Computational science-related
- Research Institution
  Tohoku University
Developing a Smart Storage based on a Succinct Data Structure that Processes Compressed DataPrincipal Investigator
- Principal Investigator
  
  Waidyasooriya Hasitha
- Project Period (FY)
  2015 – 2016
- Research Category
  
  Grant-in-Aid for Young Scientists (B)
- Research Field
  
  Computer system
- Research Institution
  Tohoku University
Development of Heterogeneous-Computing Platform with Custom Accelerators for Embedded HPC Applications
- Principal Investigator
  
  Hariyama Masanori
- Project Period (FY)
  2012 – 2015
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  Computer system/Network
- Research Institution
  Tohoku University

All 2022 2021 2020 2019 2017 2016 2015 2014 2013 2012 Other

All Journal Article Presentation

[Journal Article] A Scalable Emulator for Quantum Fourier Transform Using Multiple-FPGAs With High-Bandwidth-Memory2022
- Author(s)
  Waidyasooriya Hasitha Muthumala、Oshiyama Hiroki、Kurebayashi Yuya、Hariyama Masanori、Ohzeki Masayuki
- Journal Title
  
  IEEE Access
  
  Volume: 10 Pages: 65103-65117
- DOI
  10.1109/access.2022.3183993
- Peer Reviewed / Open Access / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-20H04197, KAKENHI-PROJECT-19K11998
[Journal Article] Temporal and spatial parallel processing of simulated quantum annealing on a multicore CPU2022
- Author(s)
  Waidyasooriya Hasitha Muthumala、Hariyama Masanori
- Journal Title
  
  The Journal of Supercomputing
  
  Volume: 78 Issue: 6 Pages: 8733-8750
- DOI
  10.1007/s11227-021-04242-0
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-19K11998, KAKENHI-PROJECT-20H04197
[Journal Article] Design space exploration for an FPGA-based quantum annealing simulator with interaction-coefficient-generators2021
- Author(s)
  Liu Chia-Yin、Waidyasooriya Hasitha Muthumala、Hariyama Masanori
- Journal Title
  
  The Journal of Supercomputing
  
  Volume: 78 Issue: 1 Pages: 1-17
- DOI
  10.1007/s11227-021-03859-5
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-19K11998, KAKENHI-PROJECT-20H04197
[Journal Article] A GPU-Based Quantum Annealing Simulator for Fully-Connected Ising Models Utilizing Spatial and Temporal Parallelism2020
- Author(s)
  Waidyasooriya Hasitha Muthumala、Hariyama Masanori
- Journal Title
  
  IEEE Access
  
  Volume: 8 Pages: 67929-67939
- DOI
  10.1109/access.2020.2985699
- Peer Reviewed / Open Access / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-19K11998, KAKENHI-PROJECT-20H04197
[Journal Article] FPGA-accelerated Searchable Encrypted Database Management Systems for Cloud Services2020
- Author(s)
  Okada Mitsuhiro、Suzuki Takayuki、Nishio Naoya、Waidyasooriya Hasitha、Hariyama Masanori
- Journal Title
  
  IEEE Transactions on Cloud Computing
  
  Volume: - Issue: 2 Pages: 1373-1385
- DOI
  10.1109/tcc.2020.2969655
- Peer Reviewed / Open Access / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-19K11998
[Journal Article] Highly-Parallel FPGA Accelerator for Simulated Quantum Annealing2019
- Author(s)
  Waidyasooriya Hasitha、Hariyama Masanori
- Journal Title
  
  IEEE Transactions on Emerging Topics in Computing
  
  Volume: - Issue: 4 Pages: 2019-2029
- DOI
  10.1109/tetc.2019.2957177
- Peer Reviewed / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-19K11998
[Journal Article] Multi-FPGA Accelerator Architecture for Stencil Computation Exploiting Spacial and Temporal Scalability2019
- Author(s)
  Waidyasooriya Hasitha Muthumala、Hariyama Masanori
- Journal Title
  
  IEEE Access
  
  Volume: 7 Pages: 53188-53201
- DOI
  10.1109/access.2019.2910824
- Peer Reviewed / Open Access / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-19K11998
[Journal Article] An FPGA Accelerator for Molecular Dynamics Simulation Using OpenCL2017
- Author(s)
  Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Kota Kasahara
- Journal Title
  
  International Journal of Networked and Distributed Computing
  
  Volume: Vol.5, No.1 Issue: 1 Pages: 52-61
- DOI
  10.2991/ijndc.2017.5.1.6
- Peer Reviewed / Acknowledgement Compliant / Open Access / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-15K15958, KAKENHI-PROJECT-16K18526
[Journal Article] Hardware-Oriented Succinct-Data-Structure for Text Processing Based on Block-Size-Constrained Compression2016
- Author(s)
  Hasitha Muthumala Waidyasooriya, Daisuke Ono, Masanori Hariyama
- Journal Title
  
  International Journal of Computer Information Systems and Industrial Management Applications
  
  Volume: Vol.8 Pages: 1-11
- Peer Reviewed / Acknowledgement Compliant / Open Access / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-15K15958
[Journal Article] Hardware-Oriented Succinct-Data-Structure for Text Processing Based on Block-Size-Constrained Compression2016
- Author(s)
  Hasitha Muthumala Waidyasooriya, Daisuke Ono and Masanori Hariyama
- Journal Title
  
  International Journal of Computer Information Systems and Industrial Management Applications
  
  Volume: 8 Pages: 1-11
- Peer Reviewed / Acknowledgement Compliant / Open Access
- Data Source
  KAKENHI-PROJECT-24300013
[Journal Article] Data-Transfer-Aware Design of an FPGA-Based Heterogeneous Multicore Platform with Custom Accelerators2015
- Author(s)
  Yasuhiro Takei, Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama
- Journal Title
  
  IEICE Transaction on Fundamentals of Electronics, Communications and Computer Sciences
  
  Volume: Vol.E98-A, No.12 Issue: 5 Pages: 2658-2669
- DOI
  10.1109/tpds.2015.2444376
- Peer Reviewed / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-15K15958
[Journal Article] Data-Transfer-Aware Design of an FPGA-Based Heterogeneous Multicore Platform with Custom Accelerators2015
- Author(s)
  Yasuhiro Takei, Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Michitaka Kameyama
- Journal Title
  
  IEICE Trans. Fundamentals
  
  Volume: E98.A Issue: 12 Pages: 2658-2669
- DOI
  10.1587/transfun.E98.A.2658
- NAID
  130005111969
- ISSN
  0916-8508, 1745-1337
- Language
  English
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-15J04973, KAKENHI-PROJECT-24300013, KAKENHI-PROJECT-25280011
[Journal Article] FDTD Acceleration for Cylindrical Resonator Design Based on the Hybrid of Single and Double Precision Floating-Point Computation2014
- Author(s)
  Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Yasuhiro Takei, and Michitaka Kameyama
- Journal Title
  
  Journal of Computational Engineering
  
  Volume: 2014 Pages: 1-8
- DOI
  10.1155/2014/634269
- Peer Reviewed / Acknowledgement Compliant / Open Access
- Data Source
  KAKENHI-PROJECT-24300013
[Journal Article] Evaluation of an FPGA-Based Heterogeneous Multicore Platform with SIMD/MIMD Custom Accelerators2013
- Author(s)
  Yasuhiro Takei, Hasitha Muthumala WAIDYASOORIYA, Masanori Hariyama, Michitaka Kameyama
- Journal Title
  
  IEICE Transaction on Information and Systems
  
  Volume: E96-A,No.12 Pages: 2576-2586
- NAID
  130003385311
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-24300013
[Presentation] Implementation of an FPGA-Oriented Complex Number Computation Library Using Intel OneAPI DPC++2022
- Author(s)
  Kosiro Obata, Hasitha Muthumala Waidyasooriya and Masanori Hariyama
- Organizer
  IEEE International Midwest Symposium on Circuits and Systems
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-19K11998
[Presentation] A Memory-Bandwidth-Efficient Word2vec Accelerator Using OpenCL for FPGA2019
- Author(s)
  Tomoki Shoji, Taisuke Ono, Hasitha Muthumala Waidyasooriya, Masanori Hariyama. Yuichiro Aoki, Yuki Kondoh, and Yaoko Nakagawa
- Organizer
  7th International Symposium on Computing and Networking (CANDAR)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-19K11998
[Presentation] FPGA-Based Acceleration of Word2vec using OpenCL2019
- Author(s)
  Taisuke Ono, Tomoki Shoji, Hasitha Muthumala Waidyasooriya, Masanori Hariyama. Yuichiro Aoki, Yuki Kondoh, and Yaoko Nakagawa
- Organizer
  International Symposium on Circuits and Systems (ISCAS 2019)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-19K11998
[Presentation] Architecture of an FPGA Accelerator for Molecular Dynamics Simulation Using OpenCL2016
- Author(s)
  Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Kota Kasahara
- Organizer
  15th IEEE/ACIS International Conference on Computer and Information Science (ICIS 2016)
- Place of Presentation
  岡山コンベンションセンター　（岡山市）
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-15K15958
[Presentation] OpenCLを用いた分子動力学用FPGAアクセラレータの設計2016
- Author(s)
  ウィッデヤスーリヤハシタムトゥマラ, 張山昌論, 笠原浩太
- Organizer
  リコンフィギャラブルシステム研究会
- Place of Presentation
  富士通研究所　（川崎市）
- Data Source
  KAKENHI-PROJECT-15K15958
[Presentation] OpenCLを用いたFDTD計算用FPGAプラットフォームの開発2016
- Author(s)
  Waidyasooriya Hasitha Muthumala, 張山昌論, 大寺康夫
- Organizer
  2016年電子情報通信学会ソサイエティ大会
- Place of Presentation
  北海道大学（北海道）
- Data Source
  KAKENHI-PROJECT-15K15958
[Presentation] FPGA-Based Deep-Pipelined Architecture for FDTD Acceleration Using OpenCL2016
- Author(s)
  Hasitha Muthumala Waidyasooriya and Masanori Hariyama
- Organizer
  15th IEEE/ACIS International Conference on Computer and Information Science (ICIS 2016)
- Place of Presentation
  岡山コンベンションセンター　（岡山市）
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-15K15958
[Presentation] OpenCLを用いたFDTD計算向けFPGAプラットフォーム2016
- Author(s)
  ウィッデヤスーリヤハシタムトゥマラ, 張山昌論, 大寺康夫
- Organizer
  エレクトロニクスシミュレーション研究会
- Place of Presentation
  機械振興会館（東京都）
- Data Source
  KAKENHI-PROJECT-15K15958
[Presentation] OpenCLを用いたステンシル計算向けFPGAプラットフォーム2016
- Author(s)
  ウィッデヤスーリヤハシタムトゥマラ, 立見駿介, 張山昌論
- Organizer
  第154回ハイパフォーマンスコンピューティング研究会
- Place of Presentation
  横浜研究所（横浜市）
- Data Source
  KAKENHI-PROJECT-15K15958
[Presentation] OpenCLを用いたビッグデータ応用・高性能計算のためのFPGAアクセラレータ開発2016
- Author(s)
  Hasitha Muthumala Waidyasooriya，張山昌論
- Organizer
  LSIとシステムのワークショップ,06
- Place of Presentation
  東京大学（東京都）
- Data Source
  KAKENHI-PROJECT-15K15958
[Presentation] OpenCLを用いたステンシル計算向けFPGAプラットフォームの設計2016
- Author(s)
  ウィッデヤスーリヤハシタムトゥマラ, 張山昌論
- Organizer
  リコンフィギャラブルシステム研究会
- Place of Presentation
  富士通研究所　（川崎市）
- Data Source
  KAKENHI-PROJECT-15K15958
[Presentation] FPGA architecture for 3-D FDTD acceleration using open CL2016
- Author(s)
  Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Yasuo Ohtera
- Organizer
  Progress in Electromagnetics Research Symposium (PIERS)
- Place of Presentation
  Shanghai International Convention Center, China
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-15K15958
[Presentation] FPGA Architecture for 3-D FDTD Acceleration Using OpenCL2016
- Author(s)
  Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Yasuo Ohtera
- Organizer
  Progress in Electromagnetics Research Symposium (PIERS)
- Place of Presentation
  Shanghai, CHINA
- Year and Date
  2016-08-08
- Data Source
  KAKENHI-PROJECT-24300013
[Presentation] 文字列検索アクセラレータのためのブロックサイズ制約に基づく簡潔データ構造2016
- Author(s)
  張山昌論, ウィッデヤスーリヤハシタムトゥマラ
- Organizer
  リコンフィギャラブルシステム研究会
- Place of Presentation
  富士通研究所　（川崎市）
- Data Source
  KAKENHI-PROJECT-15K15958
[Presentation] An FPGA Architecture for Text Search Using a Wavelet-Tree-Based Succinct-Data-Structure2015
- Author(s)
  Hasitha Muthumala Waidyasooriya, Daisuke Ono, Masanori Hariyama, Michitaka Kameyama
- Organizer
  International Conference on Parallel and Distributed Processing Techniques and Applications(PDPTA)
- Place of Presentation
  Las Vegas, USA
- Year and Date
  2015-07-28
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-24300013
[Presentation] An FPGA Architecture for Text Search Using a Wavelet-Tree-Based Succinct-Data-Structure2015
- Author(s)
  Hasitha Muthumala Waidyasooriya, Daisuke Ono, Masanori Hariyama and Michitaka Kameyama
- Organizer
  International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA)
- Place of Presentation
  Las Vegas, USA
- Year and Date
  2015-07-28
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-15K15958
[Presentation] Hardware-Oriented Succinct-Data-Structure based on Block-Size-Constrained Compression2015
- Author(s)
  Hasitha Muthumala Waidyasooriya, Daisuke Ono, Masanori Hariyama and Michitaka Kameyama
- Organizer
  7th International Conference of Soft Computing and Pattern Recognition (SoCPaR 2015)
- Place of Presentation
  九州大学　（　福岡市）
- Year and Date
  2015-11-15
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-15K15958
[Presentation] FPGA-Oriented Design of an FDTD Accelerator Based on Overlapped Tiling2015
- Author(s)
  Yasuhiro Takei, Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama
- Organizer
  International Conference on Parallel and Distributed Processing Techniques and Applications(PDPTA)
- Place of Presentation
  Las Vegas, USA
- Year and Date
  2015-07-29
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-24300013
[Presentation] FPGA-Oriented Design of an FDTD Accelerator Based on Overlapped Tiling2015
- Author(s)
  Yasuhiro Takei, Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama
- Organizer
  International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA)
- Place of Presentation
  Las Vegas, USA
- Year and Date
  2015-07-29
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-15K15958
[Presentation] Hardware-Oriented Succinct-Data-Structure based on the Block-Size-Constrained Compression2015
- Author(s)
  Hasitha Waidyasooriya, Daisuke Ono and Masanori Hariyama
- Organizer
  Soft computing and Pattern Recognition(SoCPaR)
- Place of Presentation
  Fukuoka, Japan
- Year and Date
  2015-11-15
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-24300013
[Presentation] FPGA-Accelerator for DNA Sequence Alignment Based on an Efficient Data-Dependent Memory Access Scheme2014
- Author(s)
  Hasitha Waidyasooriya, Masanori Hariyama and Michitaka Kameyama
- Organizer
  International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies(HEART)
- Place of Presentation
  Sendai, Japan
- Year and Date
  2014-06-10
- Data Source
  KAKENHI-PROJECT-24300013
[Presentation] Low-Power Heterogeneous Platform for High Performance Computing and Its Application to 2D-FDTD Computation2012
- Author(s)
  Hasitha Muthumala Waidyasooriya
- Organizer
  International Conference on Engineering of Reconfigurable Systems and Algorithms
- Place of Presentation
  Las Vegas, Nevada, USA
- Year and Date
  2012-07-16
- Data Source
  KAKENHI-PROJECT-24300013
[Presentation] Hybrid Single/Double Precision Floating-Point Computation on GPU Accelerators for 2-D FDTD2012
- Author(s)
  Hasitha Muthumala Waidyasooriya
- Organizer
  International Conference on Parallel and Distributed Processing Techniques and Applications
- Place of Presentation
  Las Vegas, Nevada, USA
- Year and Date
  2012-07-16
- Data Source
  KAKENHI-PROJECT-24300013
[Presentation] educing Floating-Point Error Based on Residue-Preservation and Its Evaluation on an FPGA
- Author(s)
  Hasitha Muthumala Waidyasooriya, Hirokazu Takahashi, Yasuhiro Takei, Masanori Hariyama and Michitaka Kameyama
- Organizer
  Proc. International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA)
- Place of Presentation
  Las Vegas, Nevada, USA
- Data Source
  KAKENHI-PROJECT-24300013
[Presentation] Implementation of a Custom Hardware-Accelerator for Short-read Mapping Using Burrows-Wheeler Alignment
- Author(s)
  Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Michitaka Kameyama
- Organizer
  Proc. 35th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBS)
- Place of Presentation
  Osaka, Japan
- Data Source
  KAKENHI-PROJECT-24300013
[Presentation] OpenCLを用いたFPGAベースFDTDアクセラレータの設計
- Author(s)
  武井康浩，ハシタムトゥマラウィシディスーリヤ，張山昌論，亀山充隆
- Organizer
  電子情報通信学会技術報告(信学技報) EST
- Place of Presentation
  東北大学，仙台，日本
- Data Source
  KAKENHI-PROJECT-24300013
[Presentation] Heterogeneous Multicore Platform with Accelerator Templates and Its Implementation on an FPGA with Hard-core CPUs
- Author(s)
  Yasuhiro Takei, Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Michitaka Kameyama
- Organizer
  Proc. International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA)
- Place of Presentation
  Las Vegas, Nevada, USA
- Data Source
  KAKENHI-PROJECT-24300013

1. Hariyama Masanori (10292260)

# of Collaborated Projects: 3 results

# of Collaborated Products: 13 results

Waidyasooriya Hasitha Muthumala Ｗａｉｄｙａｓｏｏｒｉｙａ Ｈａｓｉｔｈａ・Ｍｕｔｈｕｍａｌａ

Waidyasooriya Hasitha・Muthumala ウイツデヤスーリヤ ハシタ・ムトウマラ

Waidyasooriya Hasitha Waidyasooriya Ha

Research Projects

Research Products

Co-Researchers

大規模・高精度な流体計算向け高効率テンソルネットワークに基づくFPGA・GPU計算基盤Principal Investigator

Principal Investigator

Project Period (FY)

Research Category

Review Section

Research Institution

High-efficiency Heterogeneous Custom Accelerator Foundation for Transformer

Principal Investigator

Project Period (FY)

Research Category

Review Section

Research Institution

Custom Accelerators for Quantum-Annealing-Assisted Material Informatics

Principal Investigator

Project Period (FY)

Research Category

Review Section

Research Institution

High Speed FPGA Simulator for Large Scale Quantum Annealing SimulationsPrincipal Investigator

Principal Investigator

Project Period (FY)

Research Category

Review Section

Research Institution

Developing a Smart Storage based on a Succinct Data Structure that Processes Compressed DataPrincipal Investigator

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Development of Heterogeneous-Computing Platform with Custom Accelerators for Embedded HPC Applications

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[Journal Article] A Scalable Emulator for Quantum Fourier Transform Using Multiple-FPGAs With High-Bandwidth-Memory2022

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[Journal Article] Temporal and spatial parallel processing of simulated quantum annealing on a multicore CPU2022

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[Journal Article] Design space exploration for an FPGA-based quantum annealing simulator with interaction-coefficient-generators2021

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[Journal Article] A GPU-Based Quantum Annealing Simulator for Fully-Connected Ising Models Utilizing Spatial and Temporal Parallelism2020

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[Journal Article] FPGA-accelerated Searchable Encrypted Database Management Systems for Cloud Services2020

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[Journal Article] Highly-Parallel FPGA Accelerator for Simulated Quantum Annealing2019

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[Journal Article] Multi-FPGA Accelerator Architecture for Stencil Computation Exploiting Spacial and Temporal Scalability2019

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[Journal Article] An FPGA Accelerator for Molecular Dynamics Simulation Using OpenCL2017

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Waidyasooriya Hasitha Muthumala ＷａｉｄｙａｓｏｏｒｉｙａＨａｓｉｔｈａ・Ｍｕｔｈｕｍａｌａ

Waidyasooriya Hasitha・Muthumala ウイツデヤスーリヤハシタ・ムトウマラ