YAMAZAKI SHINYA 高前田伸也

… Alternative Names

Takamaeda Shinya 高前田伸也

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Researcher Number	60738897
Other IDs
Affiliation (Current)	2025: 東京大学, 大学院情報理工学系研究科, 准教授 2025: 国立研究開発法人理化学研究所, 革新知能統合研究センター, チームディレクター
Affiliation (based on the past Project Information) *help	2019 – 2024: 東京大学, 大学院情報理工学系研究科, 准教授 2019: 北海道大学, 情報科学研究院, 准教授 2018: 東京大学, 情報理工学系研究科, 准教授 2016 – 2018: 北海道大学, 情報科学研究科, 准教授
Review Section/Research Field	Principal Investigator Medium-sized Section 60:Information science, computer engineering, and related fields / Basic Section 60040:Computer system-related / Computer system Except Principal Investigator Broad Section J / Basic Section 60040:Computer system-related
Keywords	Principal Investigator コンパイラ / Python / 高位合成 / FPGA / アナログ回路 / 確率熱力学 / 最適輸送 / メモリ内計算 / 単項計算 / 電子回路 … More / 熱力学 / 近似計算 / プロセッサアーキテクチャ / データ転送 / ストリーム計算 / 性能チューニング / リコンフィギャラブルシステム / ハードウェア設計技術 / 計算機システム / ディープニューラルネットワーク / 深層学習 … More Except Principal Investigator アニーリング計算機 / ニューロモルフィックHW / 深層ニューラルネットワーク(DNN) / 知能コンピューティング / リコンフィギュラブルシステム / リコンフィギュラブルハードウェア / アニーリング計算 / 確率的コンピューティング / アニーリングプロセッサ / リザーバ計算 / ニューロモルフィック / 離散最適化 / アーキテクチャ / リコンフィギュラブル / 深層ニューラルネット / アニーリング / AI / 局所適応型画像処理 / 演算最適化 / 高速画像処理 / 深層学習 / システム最適化 / 相互変換 / 局所・大局画像処理 / 深層畳み込みニューラルネットワーク / 深層畳み込みニューラルネットワー / FPGA実装 / 局所適応型輝度補正技術 / 有用画像処理 / 深層ニューラルネットワーク Less

ゆらぎの熱力学に基づく確率的コンピューティング基盤の創出Principal Investigator
- Principal Investigator
  
  高前田伸也
- Project Period (FY)
  2023 – 2027
- Research Category
  
  Grant-in-Aid for Scientific Research (A)
- Review Section
  
  Medium-sized Section 60:Information science, computer engineering, and related fields
- Research Institution
  The University of Tokyo
Multi-Paradigm High-Level Synthesis Framework with Productive Performance Optimization CapabilityPrincipal Investigator
- Principal Investigator
  
  Takamaeda Shinya
- Project Period (FY)
  2019 – 2022
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Review Section
  
  Basic Section 60040:Computer system-related
- Research Institution
  The University of Tokyo
Mutual Conversion Method of Shared Computing Power in Deep Convolutional Neural Networks and Useful Image Processing
- Principal Investigator
  
  Ikebe Masayuki
- Project Period (FY)
  2018 – 2020
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Review Section
  
  Basic Section 60040:Computer system-related
- Research Institution
  Hokkaido University
Innovative Self-Learnable Architecture Platform for Accelerating Intelligent Computing
- Principal Investigator
  
  Motomura Masato
- Project Period (FY)
  2018 – 2022
- Research Category
  
  Grant-in-Aid for Scientific Research (S)
- Review Section
  
  Broad Section J
- Research Institution
  Tokyo Institute of Technology
A Framework for FPGA-based Accelerators with Maximum Memory PerformancePrincipal Investigator
- Principal Investigator
  
  Takamaeda Shinya
- Project Period (FY)
  2016 – 2017
- Research Category
  
  Grant-in-Aid for Young Scientists (B)
- Research Field
  
  Computer system
- Research Institution
  Hokkaido University

All 2024 2023 2022 2021 2020 2019 2018 2017 2016

All Journal Article Presentation Book

[Book] 情報処理 Vol.63, No.3, 通巻684号2022
- Author(s)
  本村，浅井，池辺，高前田，劉
- Total Pages
  37
- Publisher
  情報処理学会
- Data Source
  KAKENHI-PROJECT-18H05288
[Journal Article] OSA-HCIM: On-The-Fly Saliency-Aware Hybrid SRAM CIM with Dynamic Precision Configuration2024
- Author(s)
  Chen Yung-Chin、Ando Shimpei、Fujiki Daichi、Takamaeda-Yamazaki Shinya、Yoshioka Kentaro
- Journal Title
  
  Asia and South Pacific Design Automation Conference (ASP-DAC)
  
  Volume: 29 Pages: 539-544
- DOI
  10.1109/asp-dac58780.2024.10473966
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22K21284, KAKENHI-PROJECT-23H00467
[Journal Article] Scalable Moment Propagation and Analysis of Variational Distributions for Practical Bayesian Deep Learning2024
- Author(s)
  Yuki Hirayama, Shinya Takamaeda-Yamazaki
- Journal Title
  
  IEEE Transactions on Neural Networks and Learning Systems
  
  Volume: - Issue: 3 Pages: 1-11
- DOI
  10.1109/tnnls.2024.3367363
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22KJ0553, KAKENHI-PROJECT-23H00467
[Journal Article] HALO-CAT: A Hidden Network Processor with Activation-Localized CIM Architecture and Layer-Penetrative Tiling2023
- Author(s)
  Y.C. Chen, S. Ando, D. Fujiki, S. Takamaeda-Yamazaki, K. Yoshioka
- Journal Title
  
  arXiv:2312.06086
  
  Volume: NA Pages: 1-7
- Data Source
  KAKENHI-PROJECT-23H00467
[Journal Article] Real-Time Tone Mapping: A Survey and Cross-Implementation Hardware Benchmark2022
- Author(s)
  Y. Ou, P. Ambalathankandy, S. Takamaeda, M. Motomura, T. Asai and *M. Ikebe
- Journal Title
  
  IEEE Transactions on Circuits and Systems for Video Technology
  
  Volume: 32 Pages: 2666-2686
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-18H05288
[Journal Article] 機械学習に適したハードウェア・ハードウェアに適した機械学習アルゴリズム2022
- Author(s)
  高前田伸也
- Journal Title
  
  情報処理学会誌3月号
  
  Volume: 63
- Data Source
  KAKENHI-PROJECT-18H05288
[Journal Article] Multi-Input Adaptive Activation Function for Binary Neural Networks2022
- Author(s)
  Peiqi Zhang and Shinya Takamaeda-Yamazaki
- Journal Title
  
  10th International Workshop on Computer Systems and Architectures (CSA 2022)
  
  Volume: N/A Pages: 90-96
- DOI
  10.1109/candarw57323.2022.00062
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-19H04075
[Journal Article] Accelerating Decision Tree Ensemble with Guided Branch Approximation2022
- Author(s)
  Keisuke Kamahori and Shinya Takamaeda-Yamazaki
- Journal Title
  
  International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies 2022 (HEART 2022)
  
  Volume: N/A Pages: 24-32
- DOI
  10.1145/3535044.3535048
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-19H04075
[Journal Article] Accelerating Decision Tree Ensemble with Guided Branch Approximation2022
- Author(s)
  Keisuke Kamahori, Shinya Takamaeda-Yamazaki
- Journal Title
  
  2022 International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies (HEART 2022)
  
  Volume: -
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-19H04075
[Journal Article] FADEC: FPGA-based Acceleration of Video Depth Estimation by HW/SW Co-design2022
- Author(s)
  Nobuho Hashimoto and Shinya Takamaeda-Yamazaki
- Journal Title
  
  International Conference on Field Programmable Technology (FPT 2022)
  
  Volume: - Pages: 1-9
- DOI
  10.1109/icfpt56656.2022.9974565
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-19H04075
[Journal Article] Real-time tone mapping: a survey and cross-implementation hardware benchmark2021
- Author(s)
  Yafei Ou, Prasoon Ambalathankandy, Shinya Takamaeda-Yamazaki, Masato Motomura, Tetsuya Asai, Masayuki Ikebe
- Journal Title
  
  IEEE Transactions on Circuits and Systems for Video Technology
  
  Volume: Early Access Issue: 5 Pages: 1-21
- DOI
  10.1109/tcsvt.2021.3060143
- Peer Reviewed / Open Access / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-18H03213, KAKENHI-PROJECT-18H03302, KAKENHI-PROJECT-19J14105
[Journal Article] Real-time tone mapping: a survey and cross-implementation hardware benchmark2021
- Author(s)
  Yafei Ou, Prasoon Ambalathankandy, Shinya Takamaeda-Yamazaki, Masato Motomura, Tetsuya Asai, Masayuki Ikebe
- Journal Title
  
  IEEE Transactions on Circuits and Systems for Video Technology
  
  Volume: Early Access Pages: 1-21
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-18H05288
[Journal Article] STATICA: A 512-Spin 0.25M-Weight Annealing Processor with an All-Spin-Updates-at-Once Architecture for Combinatorial Optimization with Complete Spin-Spin Interactions,2021
- Author(s)
  Kasho Yamamoto, Kazushi Kawamura, Kota Ando, Normann Mertig, Takashi Takemto, Masanao Yamaoka, Hiroshi Teramoto, Akira Sakai, Shinya Takamaeda-Yamazaki, and Masato Motomura
- Journal Title
  
  IEEE Journal of Solid-State Circuits
  
  Volume: 56 Issue: 1 Pages: 165-178
- DOI
  10.1109/jssc.2020.3027702
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-18H03213
[Journal Article] ASBNN: Acceleration of Bayesian Convolutional Neural Networks by Algorithm-hardware Co-design2021
- Author(s)
  Yoshiki Fujiwara, Shinya Takamaeda-Yamazaki
- Journal Title
  
  2021 IEEE 32nd International Conference on Application-specific Systems, Architectures and Processors (ASAP 2021)
  
  Volume: - Pages: 226-233
- DOI
  10.1109/asap52443.2021.00041
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-19H04075
[Journal Article] Selective Fine-Tuning on a Classifier Ensemble: Realizing Adaptive Neural Networks With a Diversified Multi-Exit Architecture2021
- Author(s)
  Kazutoshi Hirose, Shinya Takamaeda-Yamazaki, Jaehoon Yu, Masato Motomura
- Journal Title
  
  IEEE Access
  
  Volume: 9 Pages: 6179-6187
- DOI
  10.1109/access.2020.3047799
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-18H03213, KAKENHI-PROJECT-19J20473
[Journal Article] An FPGA-Based Fully Pipelined Bilateral Grid for Real-Time Image Denoising2021
- Author(s)
  Nobuho Hashimoto, Shinya Takamaeda-Yamazaki
- Journal Title
  
  2021 31st International Conference on Field-Programmable Logic and Applications (FPL 2021)
  
  Volume: - Pages: 167-173
- DOI
  10.1109/fpl53798.2021.00035
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-19H04075
[Journal Article] Selective Fine-Tuning on a Classifier Ensemble: Realizing Adaptive Neural Networks With a Diversified Multi-Exit Architecture2020
- Author(s)
  Kazutoshi Hirose, Shinya Takamaeda-Yamazaki, Jaehoon Yu, Masato Motomura
- Journal Title
  
  IEEE Access
  
  Volume: Vol.9 Pages: 6179-6187
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-18H05288
[Journal Article] 深層ニューラルネットワーク向けプロセッサ技術の実例と展望2020
- Author(s)
  本村真人, 高前田伸也, 植吉晃大, 安藤洸太, 廣瀨一俊
- Journal Title
  
  電子情報通信学会論文誌C
  
  Volume: Vol.J103-C, No.5 Pages: 288-297
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-19H04075
[Journal Article] A Hardware-efficient Weight Sampling Circuit for Bayesian Neural Networks2020
- Author(s)
  Yuki Hirayama, Tetsuya Asai, Masato Motomura, and Shinya Takamaeda-Yamazaki
- Journal Title
  
  International Journal of Networking and Computing
  
  Volume: 10 Issue: 2 Pages: 84-93
- DOI
  10.15803/ijnc.10.2_84
- NAID
  130007878703
- ISSN
  2185-2839, 2185-2847
- Language
  English
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-18H03213, KAKENHI-PROJECT-18H03302
[Journal Article] A Hardware-efficient Weight Sampling Circuit for Bayesian Neural Networks2020
- Author(s)
  Yuki Hirayama, Tetsuya Asai, Masato Motomura, and Shinya Takamaeda-Yamazaki
- Journal Title
  
  International Journal of Networking and Computing
  
  Volume: Vol.10, No.2
- NAID
  130007878703
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-19H04075
[Journal Article] An Adaptive Global and Local Tone Mapping Algorithm Implemented on FPGA2020
- Author(s)
  Prasoon Ambalathankandy, Masayuki Ikebe, Takashi Yoshida, Takeshi Shimada, Shinya Takamaeda-Yamazaki, Masato Motomura, and Tetsuya Asai
- Journal Title
  
  IEEE Transactions on Circuits and Systems for Video Technology
  
  Volume: 30 Issue: 9 Pages: 3015-3028
- DOI
  10.1109/tcsvt.2019.2931510
- Peer Reviewed / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-18H03213, KAKENHI-PROJECT-19J14105
[Journal Article] An Adaptive Global and Local Tone Mapping Algorithm Implemented on FPGA2020
- Author(s)
  Prasoon Ambalathankandy, Masayuki Ikebe, Takashi Yoshida, Takeshi Shimada, Shinya Takamaeda- Yamazaki, Masato Motomura, and Tetsuya Asai
- Journal Title
  
  IEEE Transactions on Circuits and Systems for Video Technology
  
  Volume: 30 Pages: 3015-3028
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-18H05288
[Journal Article] 深層ニューラルネットワーク向けプロセッサ技術の実例と展望2020
- Author(s)
  本村真人, 高前田伸也, 植吉晃大, 安藤洸太, 廣瀨一俊
- Journal Title
  
  電子情報通信学会和文論文誌C, J103-C (05)
  
  Volume: J103-C Pages: 1-8
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-18H05288
[Journal Article] Dither NN: Hardware/Algorithm Co-Design for Accurate Quantized Neural Networks2019
- Author(s)
  Ando K., Ueyoshi K., Oba Y., Hirose K., Uematsu R., Kudo T., Ikebe M., Asai T., Takamaeda-Yamazaki S., and Motomura M.,
- Journal Title
  
  IEICE Trans. Inf. & Syst.
  
  Volume: E102.D Issue: 12 Pages: 2341-2353
- DOI
  10.1587/transinf.2019PAP0009
- NAID
  130007754476
- ISSN
  0916-8532, 1745-1361
- Year and Date
  2019-12-01
- Language
  English
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-18H03213, KAKENHI-PROJECT-18J20307, KAKENHI-PROJECT-18H03302
[Journal Article] A study on a low power optimization algorithm for an edge-AI device2019
- Author(s)
  Kaneko T., Orimo K., Hida I., Takamaeda-Yamazaki S., Ikebe M., Motomura M., and Asai T.
- Journal Title
  
  NOLTA
  
  Volume: 10 Issue: 4 Pages: 373-389
- DOI
  10.1587/nolta.10.373
- NAID
  130007722644
- ISSN
  2185-4106
- Language
  English
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-18H03213, KAKENHI-PROJECT-18H03302
[Journal Article] Hardware-oriented algorithm and architecture for generative adversarial networks2019
- Author(s)
  Kaneko T., Orimo K., Hida I., Takamaeda-Yamazai S., Ikebe M.., Motomura M., and *Asai T.
- Journal Title
  
  Journal of Signal Processing
  
  Volume: 23, 4 Pages: 151-154
- NAID
  130007681727
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-18H05288
[Journal Article] FPGA-Based Annealing Processor with Time-Division Multiplexing2019
- Author(s)
  Yamamoto K., Ikebe M., Asai T., Motomura M., and Takamaeda-Yamazaki S.
- Journal Title
  
  IEICE Trans. Inf. & Syst.
  
  Volume: E102.D Issue: 12 Pages: 2295-2305
- DOI
  10.1587/transinf.2019PAP0002
- NAID
  130007754464
- ISSN
  0916-8532, 1745-1361
- Year and Date
  2019-12-01
- Language
  English
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-18H03213, KAKENHI-PROJECT-18J15077, KAKENHI-PROJECT-18H03302
[Journal Article] QUEST: Multi-Purpose Log-Quantized DNN Inference Engine Stacked on 96-MB 3D SRAM Using Inductive Coupling Technology in 40-nm CMOS2019
- Author(s)
  Kodai Ueyoshi, Kota Ando, Kazutoshi Hirose, Shinya Takamaeda-Yamazaki, Mototsugu Hamada, Tadahiro Kuroda, and Masato Motomura
- Journal Title
  
  IEEE Journal of Solid-State Circuits
  
  Volume: 54, 1 Pages: 186-196
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-18H05288
[Journal Article] Radiography Contrast Enhancement: Smoothed LHE Filter a Practical Solution for Digital X-Rays with Mach Band2019
- Author(s)
  Ambalathankandy, P., Ou, Y., Kochiyil, J., Takamaeda, S., Motomura, M., Asai, T., and Ikebe, M.
- Journal Title
  
  2019 Digital Image Computing: Techniques and Applications (DICTA)
  
  Volume: 1 Pages: 1-8
- DOI
  10.1109/dicta47822.2019.8946114
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-18H03213
[Journal Article] Hardware-Oriented Algorithm and Architecture for Generative Adversarial Networks2019
- Author(s)
  Kaneko T., Ikebe M., Takamaeda-Yamazaki S., Motomura M., and Asai T.,
- Journal Title
  
  Journal of Signal Processing
  
  Volume: 23 Issue: 4 Pages: 151-154
- DOI
  10.2299/jsp.23.151
- NAID
  130007681727
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-18H03213, KAKENHI-PROJECT-18H03302
[Journal Article] Dither NN: Hardware/Algorithm Co-Design for Accurate Quantized Neural Networks2019
- Author(s)
  Kota Ando, Kodai Ueyoshi, Yuka Oba, Kazutoshi Hirose, Ryota Uematsu, Takumi Kudo, Masayuki Ikebe, Tetsuya Asai, Shinya Takamaeda-Yamazaki, Masato Motomura
- Journal Title
  
  IEICE Transactions on Information and Systems
  
  Volume: E102 Pages: 1-8
- NAID
  130007754476
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-18H05288
[Journal Article] Real-time HDTV to 4K and 8K-UHD conversions using anti-aliasing based super resolution algorithm on FPGA2018
- Author(s)
  Ambalathankandy P., Takamaeda-Yamazaki S., Motomura M., Asai T., Ikebe M., and Kusano H
- Journal Title
  
  Microprocessors and Microsystems
  
  Volume: 60 Pages: 21-31
- DOI
  10.1016/j.micpro.2018.05.008
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-18H03213
[Journal Article] A Tree-Based Checkpointing Architecture for the Dependability of FPGA Computing2018
- Author(s)
  Hoang Gia Vu, Shinya Takamaeda-Yamazaki, Takashi Nakada, and Yasuhiko Nakashima
- Journal Title
  
  IEICE TRANSACTIONS on Information and Systems
  
  Volume: Vol.E101-D Pages: 288-302
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-16K16026
[Journal Article] Quantization error-based regularization for hardware-aware neural network training," Nonlinear Theory and Its Applications2018
- Author(s)
  Hirose K., Uematsu R., Ando K., Ueyoshi K., Ikebe M.., Asai T., Motomura M., and *Takamaeda-Yamazai S.
- Journal Title
  
  Nonlinear Theory and Its Applications
  
  Volume: E9-N, 4 Pages: 148-156
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-18H05288
[Journal Article] BRein memory: a single-chip binary/ternary reconfigurable in-memory deep neural network accelerator achieving 1.4TOPS at 0.6W2018
- Author(s)
  Ando K., Ueyoshi K., Orimo K., Yonekawa H., Sato S., Nakahara H., Takamaeda-Yamazaki S., Ikebe M., Asai T., Kuroda T., and Motomura M.
- Journal Title
  
  IEEE J. Solid-State Circuits
  
  Volume: 53 Issue: 4 Pages: 983-994
- DOI
  10.1109/jssc.2017.2778702
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PLANNED-25110015, KAKENHI-PROJECT-18H03213, KAKENHI-PROJECT-18H03302
[Journal Article] Japanese High-level Synthesis Tools for FPGA Hardware Acceleration2017
- Author(s)
  渡邊実, 佐野健太郎, 高前田伸也, 三好健文, 中條拓伯
- Journal Title
  
  電子情報通信学会論文誌B 通信
  
  Volume: J100-B Issue: 1 Pages: 1-10
- DOI
  10.14923/transcomj.2016JBI0002
- ISSN
  1881-0209
- Year and Date
  2017-01-01
- Language
  Japanese
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-16K16026
[Presentation] 信頼されるAIシステムを支えるコンピューティング技術2024
- Author(s)
  高前田伸也
- Organizer
  IEEE ComSoc Tokyo Joint Chapter講演会
- Invited
- Data Source
  KAKENHI-PROJECT-23H00467
[Presentation] Hardware/Algorithm Co-design for Gradient Boosting Decision Trees via Bit-Level Early-Termination for Low-Power Embedded Systems2024
- Author(s)
  Daichi Tokuda and Shinya Takamaeda-Yamazaki
- Organizer
  The 6th cross-disciplinary Workshop on Computing Systems, Infrastructures, and Programming (xSIG 2024)
- Data Source
  KAKENHI-PROJECT-23H00467
[Presentation] 一時的メモリアクセスリダイレクションによる高性能かつプログラマ・フレンドリーなセキュアNVM2023
- Author(s)
  小池亮, 高前田伸也
- Organizer
  電子情報通信学会研究会報告, Vol.122, No.402, VLD2022-106
- Data Source
  KAKENHI-PROJECT-19H04075
[Presentation] メモリ構造の秘匿によるIP保護2023
- Author(s)
  田中燦, 高前田伸也
- Organizer
  電子情報通信学会研究会報告, Vol.122, No.403, HWS2022-67
- Data Source
  KAKENHI-PROJECT-19H04075
[Presentation] オンチップの脅威に対処するためのセキュアなキャッシュシステム2023
- Author(s)
  釜堀恵輔, 高前田伸也
- Organizer
  電子情報通信学会研究会報告, Vol.122, No.403, HWS2022-66
- Data Source
  KAKENHI-PROJECT-19H04075
[Presentation] 魔法戦士のすすめ～科学技術分野の文部科学大臣表彰・若手科学者賞受賞に際して～2023
- Author(s)
  高前田伸也
- Organizer
  電子情報通信学会研究会報告, Vol.123, No.62, CPSY2023-7
- Invited
- Data Source
  KAKENHI-PROJECT-23H00467
[Presentation] 高位合成における分離型データオーケストレーションの自動合成2023
- Author(s)
  薄井真之, 高前田伸也
- Organizer
  電子情報通信学会研究会報告, Vol.122, No.402, VLD2022-90
- Data Source
  KAKENHI-PROJECT-19H04075
[Presentation] 複数のインデクスにより競合性ミスを低減した圧縮キャッシュ2023
- Author(s)
  深見匡, 高前田伸也
- Organizer
  電子情報通信学会研究会報告, Vol.122, No.402, VLD2022-98
- Data Source
  KAKENHI-PROJECT-19H04075
[Presentation] 定数係数畳み込み演算を対象とした論理圧縮アルゴリズムの検討2023
- Author(s)
  空閑康太, 高前田伸也
- Organizer
  電子情報通信学会研究会報告, Vol.122, No.402, VLD2022-97
- Data Source
  KAKENHI-PROJECT-19H04075
[Presentation] 機械学習に適したハードウェア，ハードウェアに適した機械学習アルゴリズム2022
- Author(s)
  高前田伸也
- Organizer
  情報処理学会第84回全国大会イベント企画「知能と計算とアーキテクチャの新しい関係を目指して」
- Invited
- Data Source
  KAKENHI-PROJECT-19H04075
[Presentation] Multi-Input Adaptive Activation Function for Binary Neural Networks2022
- Author(s)
  Peiqi Zhang and *Shinya Takamaeda-Yamazaki
- Organizer
  10th International Workshop on Computer Systems and Architectures (CSA 2022)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-18H05288
[Presentation] GBA: Guided Branch Approximation2022
- Author(s)
  Keisuke Kamahori, Shinya Takamaeda-Yamazaki
- Organizer
  The Fourth Young Architect Workshop (YArch 2022) (Co-located with ASPLOS 2022)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-19H04075
[Presentation] 分岐命令の選択的近似による決定木アンサンブルの高速化2022
- Author(s)
  釜堀恵輔, 高前田伸也
- Organizer
  情報処理学会研究報告2021-ARC-248
- Invited
- Data Source
  KAKENHI-PROJECT-19H04075
[Presentation] 動画像を入力とした深度推定のHW/SW協調設計によるFPGAベースの高速化手法2022
- Author(s)
  橋本信歩, 高前田伸也
- Organizer
  情報処理学会研究会報告2022-ARC-250
- Data Source
  KAKENHI-PROJECT-19H04075
[Presentation] 機械学習に適したハードウェア，ハードウェアに適した機械学習アルゴリズム2022
- Author(s)
  高前田伸也
- Organizer
  情報処理学会第84回全国大会
- Invited
- Data Source
  KAKENHI-PROJECT-18H05288
[Presentation] 回帰木に基づく畳み込み演算の直接近似手法2022
- Author(s)
  空閑康太, 高前田伸也
- Organizer
  電子情報通信学会研究会報告CPSY2022-26
- Data Source
  KAKENHI-PROJECT-19H04075
[Presentation] セキュアNVMの高性能化のためのツリー事前更新2022
- Author(s)
  小池亮, 高前田伸也
- Organizer
  情報処理学会研究会報告2022-ARC-250
- Data Source
  KAKENHI-PROJECT-19H04075
[Presentation] 不揮発性メインメモリにおける効率的な整合性検証手法の検討2022
- Author(s)
  久保龍哉, 小池亮, 高前田伸也
- Organizer
  情報処理学会研究報告2021-ARC-248
- Data Source
  KAKENHI-PROJECT-19H04075
[Presentation] 多様性と環境変化に寄り添う分散機械学習基盤の実現に向けて2022
- Author(s)
  高前田伸也
- Organizer
  電子情報通信学会情報論的学習理論と機械学習研究会 2022-03-IBISML
- Invited
- Data Source
  KAKENHI-PROJECT-19H04075
[Presentation] 高帯域幅メモリ搭載FPGAを用いたランダムアクセス指向メモリアーキテクチャとプログラミングモデルの検討2022
- Author(s)
  菅研吾, 高前田伸也
- Organizer
  情報処理学会研究報告2021-ARC-248
- Data Source
  KAKENHI-PROJECT-19H04075
[Presentation] 機械学習ベースの動画像処理における近似計算手法の検討2022
- Author(s)
  橋本信歩, 高前田伸也
- Organizer
  電子情報通信学会研究会報告CPSY2021-59
- Data Source
  KAKENHI-PROJECT-19H04075
[Presentation] FADEC: FPGA-based Acceleration of Video Depth Estimation by HW/SW Co-design2022
- Author(s)
  Nobuho Hashimoto and *Shinya Takamaeda-Yamazaki
- Organizer
  International Conference on Field Programmable Technology (FPT 2022)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-18H05288
[Presentation] FPGAを用いたフルパイプラインによるバイラテラルフィルタの高速化手法2021
- Author(s)
  橋本信歩, 高前田伸也
- Organizer
  電子情報通信学会研究会報告RECONF2021-8
- Data Source
  KAKENHI-PROJECT-19H04075
[Presentation] セキュアな不揮発性メモリのクラッシュ一貫性支援の高速化2021
- Author(s)
  小池亮, 高前田伸也
- Organizer
  情報処理学会研究報告2021-ARC-245
- Data Source
  KAKENHI-PROJECT-19H04075
[Presentation] アーキテクチャとアルゴリズムの協調による高効率深層学習システムの創出2021
- Author(s)
  高前田伸也
- Organizer
  第20回情報科学技術フォーラム (FIT 2021) イベント企画「Society5.0を支える革新的コンピューティング技術」
- Invited
- Data Source
  KAKENHI-PROJECT-19H04075
[Presentation] オープンソースコンパイラNNgenでつくるエッジ・ディープラーニングシステム2021
- Author(s)
  高前田伸也
- Organizer
  第3回ACRiウェビナー：Softwareエンジニアにも使って欲しいFPGAの実力
- Invited
- Data Source
  KAKENHI-PROJECT-19H04075
[Presentation] カスタマイズ可能！AIアクセラレータジェネレータNNgenを大解剖！2021
- Author(s)
  山野龍佑, 高前田伸也
- Organizer
  Design Solution Forum 2020
- Data Source
  KAKENHI-PROJECT-19H04075
[Presentation] アルゴリズム・ハードウェア協調設計によるベイジアン畳み込みニューラルネットワークの高速化2021
- Author(s)
  藤原良樹, 高前田伸也
- Organizer
  情報処理学会研究報告2021-ARC-245
- Data Source
  KAKENHI-PROJECT-19H04075
[Presentation] 効率的なDNN計算のための無効ニューロン予測手法の評価2020
- Author(s)
  池田泰我, 植吉晃大, 安藤洸太, 廣瀨一俊, 浅井哲也, 本村真人, 高前田伸也
- Organizer
  情報処理学会システム・アーキテクチャ研究会
- Data Source
  KAKENHI-PROJECT-18H05288
[Presentation] 無効ニューロン予測によるDNN計算効率化手法2020
- Author(s)
  植吉晃大, 池田泰我, 安藤洸太, 廣瀨一俊, 浅井哲也, 高前田伸也, 本村真人
- Organizer
  電子情報通信学会リコンフィギャラブルシステム研究会
- Data Source
  KAKENHI-PROJECT-18H05288
[Presentation] Hardware/Algorithm Co-optimization for Fully-Parallelized Compact Decision Tree Ensembles on FPGAs2020
- Author(s)
  Taiga Ikeda, Kento Sakurada, Atsuyoshi Nakamura, Masato Motomura, and Shinya Takamaeda-Yamazaki
- Organizer
  16th International Symposium on Applied Reconfigurable Computing (ARC 2020)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-19H04075
[Presentation] Radiography Contrast Enhancement: Smoothed LHE Filter a Practical Solution for Digital X-Rays with Mach Band2019
- Author(s)
  Ambalathankandy, P., Ou, Y., Kochiyil, J., Takamaeda, S., Motomura, M., Asai, T., and Ikebe, M.
- Organizer
  2019 Digital Image Computing: Techniques and Applications (DICTA)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-18H05288
[Presentation] Ternarized backpropagation: a hardware-oriented optimization algorithm for edge-oriented AI devices2019
- Author(s)
  Kaneko T., Ikebe M.., Takamaeda-Yamazai S., Motomura M., and *Asai T.
- Organizer
  7th RIEC International Symposium on Brain Functions and Brain Computer
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-18H05288
[Presentation] FPGA-based FORCE learning accelerator towards real-time online reservoir computing,2019
- Author(s)
  Minamikawa K., Takamaeda-Yamazaki S., Ikebe M., Motomura M., and Asai T.
- Organizer
  The 2019 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-18H03213
[Presentation] Approach to reservoir computing with Schmitt trigger oscillator-based analog neural circuits,2019
- Author(s)
  Rim S., Suzuki S., Takamaeda-Yamazaki S., Ikebe M., Motomura M., and Asai T.
- Organizer
  The 7th Japan-Korea Joint Workshop on Complex Communication Sciences,
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-18H03213
[Presentation] ディープニューラルネットワークのモデル特化ハードウェア合成コンパイラ2019
- Author(s)
  高前田伸也, 藤澤慎也, 藤崎修一
- Organizer
  第2回機械学習工学研究会 (MLSE夏合宿2019)
- Data Source
  KAKENHI-PROJECT-19H04075
[Presentation] Ternarized backpropagation: a hardware-oriented optimization algorithm for edge-oriented AI devices2019
- Author(s)
  Kaneko T., Ikebe M., Takamaeda-Yamazaki S., Motomura M., and Asai T.
- Organizer
  The 7th RIEC International Symposium on Brain Functions and Brain Computer, Research Institute of Electrical Communication
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-18H03213
[Presentation] Hardware-oriented algorithm and architecture for generative adversarial networks2019
- Author(s)
  Kaneko T., Ikebe M., Takamaeda-Yamazai S., Motomura M., and *Asai T.
- Organizer
  2019 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-18H05288
[Presentation] NNgen: A Model-Specific Hardware Synthesis Compiler for Deep Neural Network (Demonstration)2019
- Author(s)
  Shinya Takamaeda-Yamazaki, Shinya Fujisawa, Shuichi Fujisaki
- Organizer
  Thirty-third Conference on Neural Information Processing Systems (NeurIPS 2019)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-19H04075
[Presentation] Experimental demonstration of physical reservoir computing with nonlinear electronic devices2019
- Author(s)
  Suzuki S., Rim S., Takamaeda-Yamazaki S., Ikebe M., Motomura M., and Asai T.
- Organizer
  The 2019 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-18H03213
[Presentation] Experimental demonstration of physical reservoir computing with nonlinear electronic devices2019
- Author(s)
  Suzuki S., Rim S., Takamaeda-Yamazai S., Ikebe M., Motomura M., and *Asai T.
- Organizer
  2019 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-18H05288
[Presentation] Experimental demonstration of physical reservoir computing with nonlinear electronic devices2019
- Author(s)
  uzuki S., Rim S., Takamaeda-Yamazai S., Ikebe M., Motomura M., and *Asai T.
- Organizer
  2019 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-18H05288
[Presentation] Hardware-oriented algorithm and architecture for generative adversarial networks2019
- Author(s)
  Kaneko T., Ikebe M., Takamaeda-Yamazaki S., Motomura M., and Asai T.
- Organizer
  The 2019 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-18H03213
[Presentation] Dither NN: an accurate neural network with dithering for low bit-precision hardware2018
- Author(s)
  Ando K., Ueyoshi K., Oba Y., Hirose K., Uematsu R., Kudo T., Ikebe M., Asai T., Takamaeda-Yamazai S., and *Motomura M.
- Organizer
  2018 International Conference on Field-Programmable Technology (FPT'18)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-18H05288
[Presentation] Analysis of smoothed LHE methods for processing images with optical illusions2018
- Author(s)
  Ambalathankandy P., Shimada T., Takamaeda-Yamazai S., Motomura M.., Asai T., and *Ikebe M.
- Organizer
  IEEE International Conference on Visual Communications and Image Processing
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-18H05288
[Presentation] Dither NN: an accurate neural network with dithering for low bit-precision hardware2018
- Author(s)
  Ando K., Ueyoshi K., Oba Y., Hirose K., Uematsu R., Kudo T., Ikebe M., Asai T., Takamaeda-Yamazaki S., and Motomura M
- Organizer
  The 2018 International Conference on Field-Programmable Technology (FPT'18)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-18H03213
[Presentation] Area and energy optimization for bit-serial log-quantized DNN Accelerator with shared accumulators2018
- Author(s)
  Kudo T., Ueyoshi K., Ando K., Hirose K., Uematsu R., Oba Y., Ikebe M., Asai T., Motomura M., and *Takamaeda-Yamazai S.
- Organizer
  IEEE 12th International Symposium on Embedded Multicore/Many-core Systems-on-Chip
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-18H05288
[Presentation] Analysis of smoothed LHE methods for processing images with optical illusions," IEEE International Conference on Visual Communications and Image Processing2018
- Author(s)
  Ambalathankandy P., Shimada T., Takamaeda-Yamazaki S., Motomura M., Asai T., and Ikebe M.
- Organizer
  IEEE International Conference on Visual Communications and Image Processing(VCIP2018)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-18H03213
[Presentation] Area and energy optimization for bit-serial log-quantized DNN Accelerator with shared accumulators2018
- Author(s)
  Kudo T., Ueyoshi K., Ando K., Hirose K., Uematsu R., Oba Y., Ikebe M., Asai T., Motomura M., and Takamaeda-Yamazaki S.
- Organizer
  IEEE 12th International Symposium on Embedded Multicore/Many-core Systems-on-Chip
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-18H03213
[Presentation] Approach to reservoir computing with Schmitt trigger oscillator-based analog neural circuits2018
- Author(s)
  Rim S., Suzuki S., Takamaeda-Yamazai S., Ikebe M., Motomura M., and *Asai T.
- Organizer
  7th Japan-Korea Joint Workshop on Complex Communication Sciences
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-18H05288
[Presentation] メモリアクセスパターンを考慮した遅延評価によるZDD構築の高速化2017
- Author(s)
  熊澤輝顕, 高前田伸也, 池辺将之, 浅井哲也, 本村真人
- Organizer
  第 30回回路とシステムワークショップ, 於北九州国際会議場
- Data Source
  KAKENHI-PROJECT-16K16026
[Presentation] ゆるふわコンピュータ2017
- Author(s)
  高前田伸也
- Organizer
  情報処理学会第79回全国大会IPSJ-ONE
- Place of Presentation
  名古屋大学
- Invited
- Data Source
  KAKENHI-PROJECT-16K16026
[Presentation] CPRring: A Structure-aware Ring-based Checkpointing Architecture for FPGA Computing2017
- Author(s)
  Hoang Gia Vu, Shinya Takamaeda-Yamazaki, Takashi Nakada, and Yasuhiko Nakashima
- Organizer
  The 25th IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM2017)
- Place of Presentation
  Napa, CA, USA
- Year and Date
  2017-04-30
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-16K16026
[Presentation] A Structure-aware Ring-based Checkpointing Architecture for FPGA Computing2017
- Author(s)
  Hoang Gia Vu, Shinya Takamaeda-Yamazaki, Takashi Nakada, and Yasuhiko Nakashima: CPRring
- Organizer
  The 25th IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM2017)
- Data Source
  KAKENHI-PROJECT-16K16026
[Presentation] Energy-Efficient In-Memory Neural Network Processor,2017
- Author(s)
  Shinya Takamaeda-Yamazaki
- Organizer
  17th International Forum on MPSoC for Software-defined Hardware (MPSoC 2017)
- Invited / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-16K16026
[Presentation] Accelerating Deep Learning by Hardware/Algorithm Co-Design2017
- Author(s)
  Shinya Takamaeda-Yamazaki
- Organizer
  International Workshop on Advances in Networking and Computing (WANC 2017)
- Invited / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-16K16026
[Presentation] A Multi-Level Power-Capping Mechanism for FPGAs2017
- Author(s)
  Keisuke Fujimoto, Takashi Nakada, Shinya Takamaeda-Yamazaki, and Yasuhiko Nakashima
- Organizer
  The 1st. cross-disciplinary Workshop on Computing Systems, Infrastructures, and Programming (xSIG 2017)
- Data Source
  KAKENHI-PROJECT-16K16026
[Presentation] アルゴリズムとハードウェアの協調設計による新時代コンピューティング2017
- Author(s)
  高前田伸也
- Organizer
  電子情報通信学会集積回路研究会(IEICE-ICD)
- Invited
- Data Source
  KAKENHI-PROJECT-16K16026
[Presentation] アルゴリズムとハードウェアの協調設計によるディープラーニングアクセラレーション2017
- Author(s)
  高前田伸也
- Organizer
  Design Solution Forum 2017
- Invited
- Data Source
  KAKENHI-PROJECT-16K16026
[Presentation] kebe, Tetsuya Asai, and Masato Motomura: A Time-Division Multiplexing Ising Machine on FPGAs2017
- Author(s)
  Kasho Yamamoto, Huang Weiqiang, Shinya Takamaeda-Yamazaki, Masayuki Ikebe, Tetsuya Asai, and Masato Motomura
- Organizer
  International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies (HEART 2017)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-16K16026
[Presentation] Customizable Hardware Abstraction2016
- Author(s)
  Shinya Takamaeda-Yamazaki
- Organizer
  16th International Forum on MPSoC for Software-defined Hardware (MPSoC 2016)
- Place of Presentation
  Nara Hotel, Nara, Nara, Japan
- Year and Date
  2016-07-11
- Invited / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-16K16026
[Presentation] CPRtree: A Tree-based Checkpointing Architecture for Heterogeneous FPGA Computing2016
- Author(s)
  Hoang Gia Vu, Supasit Kajkamhaeng, Shinya Takamaeda-Yamazaki, and Yasuhiko Nakashima
- Organizer
  4th International Symposium on Computing and Networking (CANDAR 2016)
- Place of Presentation
  Higashi-Hiroshima, Hiroshima, Japan
- Year and Date
  2016-11-22
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-16K16026
[Presentation] Stop the World: A Lightweight Runtime Power-Capping Mechanism for FPGAs2016
- Author(s)
  Keisuke Fujimoto, Shinya Takamaeda-Yamazaki, and Yasuhiko Nakashima
- Organizer
  4th International Symposium on Computing and Networking (CANDAR 2016)
- Place of Presentation
  Higashi-Hiroshima, Hiroshima, Japan
- Year and Date
  2016-11-22
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-16K16026
[Presentation] ハードウェアはやわらかい2016
- Author(s)
  高前田伸也
- Organizer
  第15回情報科学技術フォーラム (FIT 2016) 助教が吼える！各界の若手研究者大集合
- Place of Presentation
  富山大学
- Year and Date
  2016-09-07
- Invited
- Data Source
  KAKENHI-PROJECT-16K16026
[Presentation] Pythonによるカスタム可能な高位設計技術2016
- Author(s)
  高前田伸也
- Organizer
  Design Solution Forum 2016
- Place of Presentation
  新横浜国際ホテル
- Invited
- Data Source
  KAKENHI-PROJECT-16K16026

1. Ikebe Masayuki (20374613)

# of Collaborated Projects: 2 results

# of Collaborated Products: 29 results
2. Motomura Masato (90574286)

# of Collaborated Projects: 1 results

# of Collaborated Products: 21 results
3. 浅井哲也 (00312380)

# of Collaborated Projects: 1 results

# of Collaborated Products: 19 results
4. 伊藤創祐 (00771221)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
5. 吉岡健太郎 (20910566)

# of Collaborated Projects: 1 results

# of Collaborated Products: 1 results
6. 金澤輝代士 (50759256)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
7. 藤木大地

# of Collaborated Projects: 0 results

# of Collaborated Products: 1 results

YAMAZAKI SHINYA 高前田 伸也

Takamaeda Shinya 高前田 伸也

Research Projects

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Co-Researchers

ゆらぎの熱力学に基づく確率的コンピューティング基盤の創出Principal Investigator

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Multi-Paradigm High-Level Synthesis Framework with Productive Performance Optimization CapabilityPrincipal Investigator

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Mutual Conversion Method of Shared Computing Power in Deep Convolutional Neural Networks and Useful Image Processing

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Innovative Self-Learnable Architecture Platform for Accelerating Intelligent Computing

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A Framework for FPGA-based Accelerators with Maximum Memory PerformancePrincipal Investigator

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[Book] 情報処理 Vol.63, No.3, 通巻684号2022

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[Journal Article] OSA-HCIM: On-The-Fly Saliency-Aware Hybrid SRAM CIM with Dynamic Precision Configuration2024

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[Journal Article] Scalable Moment Propagation and Analysis of Variational Distributions for Practical Bayesian Deep Learning2024

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[Journal Article] HALO-CAT: A Hidden Network Processor with Activation-Localized CIM Architecture and Layer-Penetrative Tiling2023

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[Journal Article] Real-Time Tone Mapping: A Survey and Cross-Implementation Hardware Benchmark2022

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[Journal Article] 機械学習に適したハードウェア・ハードウェアに適した機械学習アルゴリズム2022

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[Journal Article] Multi-Input Adaptive Activation Function for Binary Neural Networks2022

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[Journal Article] Accelerating Decision Tree Ensemble with Guided Branch Approximation2022

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[Journal Article] Accelerating Decision Tree Ensemble with Guided Branch Approximation2022

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[Journal Article] FADEC: FPGA-based Acceleration of Video Depth Estimation by HW/SW Co-design2022

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YAMAZAKI SHINYA 高前田伸也

Takamaeda Shinya 高前田伸也