SHIBAYAMA Kiyoshi 柴山潔

… Alternative Names

芝山潔シバヤマキヨシ

Less

Researcher Number	70127091
External Links
Affiliation (based on the past Project Information) *help	2016 – 2020: 京都情報大学院大学, その他の研究科, 教授 2015: 京都工芸繊維大学, その他部局等, 教授 2015: 京都工芸繊維大学, 情報工学・人間科学系, 教授 2009 – 2014: 京都工芸繊維大学, 工芸科学研究科, 教授 2006: Kyoto Institute of Technology, Graduate School of Science and Technology, Professor, 工芸科学研究科, 教授 … More 2004 – 2005: 京都工芸繊維大学, 工芸学部, 教授 1992 – 2002: 京都工芸繊維大学, 工芸学部, 教授 1986 – 1991: 京都大学, 工学部, 助教授 Less
Review Section/Research Field	Principal Investigator 計算機科学 / 情報工学 / Computer system/Network / 計算機工学 / Computer system Except Principal Investigator 計算機工学 / 計算機科学 / Basic Section 60040:Computer system-related / Computer system / Informatics / 情報工学 / Computer system/Network
Keywords	Principal Investigator Computer Architecture / コンピュータアーキテクチャ / 計算機アーキテクチャ / 超並列計算機 / Processor Architecture / プロセッサアーキテクチャ / 要素プロセッサ / プロセッサ / Computation Model / Processor Element … More / 計算モデル / 非数値処理 / スレッドレベル並列性 / 並列処理 / プロセッサ間通信 / メモリアーキテクチャ / 粒質 / 粒度 / Distributed Processing / Firewall / DoS Attack / Packet Filtering / Router / ネットワークセキュリティ / ルーティング処理 / ネットワークプロセッサ / 分散処理 / ファイアウォール / DoS攻撃 / パケットフィルタリング / ルータ / Profiling / Firmware / Paralled Processing / Nun-Numerical Processing / Execution Control / プロファイリング / ファームウェア / 実行制御 / Processor-Memory Bus Architecture / Memory Architecture / Memory hierarchy / Processor Hierarchy / 性能評価 / メッセージ通信 / プロセッサーメモリ間転送 / プロセッサ-メモリ間通信 / プロセッサ-メモリ間転送路 / メモリ階層 / プロセッサ階層 / Thread / Inter-processors Communication / Onchip / Messageflow / スレッド / オンチップ / メッセージフロー / Software Tradeoffs / Hardware / Testbed / Virtual computer / Model-Architecture / Mssively Parallel Computer System / ソフト・トレードオフ / ハード / テストベッド / 仮想コンピュータ / モデルアーキテクチャ / 超並列コンピュータシステム / Message Driven / Thread Architecture / Processor Core / Massively Parallel Computers / メッセージ駆動 / スレッドアーキテクチャ / プロセッサコア / Computer Science / Undergraduate Program / Educational Curriculum / Computer Science Education / 大学教育 / 理工系情報学科 / 教育カリキュラム / コンピュータサイエンス教育 / Computer architecture / Communication function / Memory function / Processing function / Processor element / Massively parallel computer / Processor-core / 通信機能 / メモリ機能 / 演算機能 / プロセッサ・コア / Message-Flow / Massively Parallel Computer / 計算機ア-キテクチャ / メッセ-ジフロ- / Non-Numeric Processing / Highly Parallel Computer / Symbol Manipulation Language / Symbol Manipulation / Parallel Computer / 高並列計算機 / 記号処理用言語 / 記号処理 / 並列計算機 / 値予測 / チェックポイント回復 / メモリシステム / 粗粒度投機実行 / ハイパフォーマンス・コンピューティング / 計算機システム / キャッシュ機構 / マルチプロセッサ / 投機実行 / メモリリネーミング / 並列化コンパイラ / スカラ展開 / 共有メモリ / プロッサアーキテキクチャ / 情報通信 / 情報処理 / 仮想計算機 / 並列プログラミング / オペレーティングシステム / 問題適応機能 / 超並列処理 / 問題適応方式 … More Except Principal Investigator 並列処理 / 計算機システム / スレッドレベル並列処理 / 投機実行 / ハイパフォーマンスコンピューティング / Parallel Processing / コンピュータサイエンス / 情報処理教育 / カリキュラム / ハイパフォーマンス・コンピューティング / メモリシステム / Special-purpose processors / Multiprocessors / Graphics Systems / 3-Dimensional Graphics / ソリッド・モデリング / ソリッドモデリング / 形状処理 / 専用プロセッサ / マルチプロセッサ / 図形処理システム / 3次元図形表示 / Reduction Machine / Logic Programming Language / Parallel Machine / 並列計算機 / グラフ・リダクション / リダクション・マシン / 論理型言語 / 並列処理計算機 / Parallel Algorithm / Parallel Programming Language / Parallel Computer Organization / Parallel Computer System / Paralel Processing / 並列処理言語 / 並列処理計算機のアーキテクチャ / 並列処理システムのオペレーティング・システム / 並列処理アルゴリズム / 並列処理プログラミング言語 / 並列処理計算機の構成方式 / 並列処理計算機システム / internet / computer science / computer curricula / curriculum / 情報倫理の教育 / インターネット / Low-level parallelism / Interrupt architecture / store architecture / Load / Branch prediction / Code scheduling / Optimized compiler / Instruction pipeline / Superscalar processor / ス-パ-スカラ・プロセッサ / 低レベル並列処理 / 割込みア-キテクチャ / ストア・ア-キテクチャ / ロ-ド / 分岐予測 / コ-ド・スケジュ-リング / 最適化コンパイラ / 命令パイプライン / ス-パスカラ・プロセッサ / セキュア・ネットワーク / インターネット高度化 / システムオンチップ / ネットワーク Less

Study on mechanisms to implement speculative memory
- Principal Investigator
  
  Hirata Hiroaki
- Project Period (FY)
  2018 – 2020
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Review Section
  
  Basic Section 60040:Computer system-related
- Research Institution
  Kyoto Institute of Technology
Study on Ordered Transactional Memory Supporting the Thread-Level Parallel Speculation
- Principal Investigator
  
  HIRATA Hiroaki
- Project Period (FY)
  2015 – 2017
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  Computer system
- Research Institution
  Kyoto Institute of Technology
A Thread-Level, Parallel and Speculative Execution Method Provided with a Checkpoint GeneratorPrincipal Investigator
- Principal Investigator
  
  Kiyoshi Shibayama
- Project Period (FY)
  2013 – 2015
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  Computer system
- Research Institution
  Kyoto Institute of Technology
A Research on the On-the-Fly Parallelization by a Dynamic Scalar ExpansionPrincipal Investigator
- Principal Investigator
  
  SHIBAYAMA Kiyoshi
- Project Period (FY)
  2010 – 2012
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  Computer system/Network
- Research Institution
  Kyoto Institute of Technology
A Coprocessor Architecture to Defend against Security Attacks
- Principal Investigator
  
  HIRATA Hiroaki
- Project Period (FY)
  2009 – 2011
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  Computer system/Network
- Research Institution
  Kyoto Institute of Technology
A Study on a High-Performance Router Architecture with a Distributed and Cooperative Defense Mechanism against Network AttacksPrincipal Investigator
- Principal Investigator
  
  SHIBAYAMA Kiyoshi
- Project Period (FY)
  2004 – 2006
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  Computer system/Network
- Research Institution
  Kyoto Institute of Technology
Study on High Performance Execution Scheme for Non-Numerical Computation ProgramsPrincipal Investigator
- Principal Investigator
  
  SHIBAYAMA Kiyoshi
- Project Period (FY)
  2001 – 2002
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  計算機科学
- Research Institution
  Kyoto Institute of Technology
情報の処理機能と通信機能を統合して備える「情報体」に関する研究Principal Investigator
- Principal Investigator
  
  柴山潔
- Project Period (FY)
  1999 – 2000
- Research Category
  
  Grant-in-Aid for Exploratory Research
- Research Field
  
  計算機科学
- Research Institution
  Kyoto Institute of Technology
ネットワーク新時代における情報処理教育のコアカリキュラム
- Principal Investigator
  
  NAKAMORI Mario
- Project Period (FY)
  1998
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  計算機科学
- Research Institution
  Tokyo University of Agriculture and Technology
A Research on Hierarchical Processor ArchitecturePrincipal Investigator
- Principal Investigator
  
  SHIBAYAMA Kiyoshi
- Project Period (FY)
  1998 – 2000
- Research Category
  
  Grant-in-Aid for Scientific Research (B).
- Research Field
  
  計算機科学
- Research Institution
  Kyoto Institute of Technology
Design of a Messageflow Processor with Chip-based Inter-processors Communication FunctionPrincipal Investigator
- Principal Investigator
  
  SHIBAYAMA Kiyoshi
- Project Period (FY)
  1997 – 1999
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  計算機科学
- Research Institution
  KYOTO INSTITUTE OF TECHNOLOGY
A Research on a Virtual Model-Architecture for Massively Parallel Computer SystemsPrincipal Investigator
- Principal Investigator
  
  SHIBAYAMA Kiyoshi
- Project Period (FY)
  1996 – 1997
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  計算機科学
- Research Institution
  Kyoto Institute of Technology
Undergraduate Programs of an Educational Crriculum in Computer SciencePrincipal Investigator
- Principal Investigator
  
  SHIBAYAMA Kiyoshi
- Project Period (FY)
  1995 – 1996
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  計算機科学
- Research Institution
  Kyoto Institute of Technology
Design of a Processor Core for Massively Parallel ComputersPrincipal Investigator
- Principal Investigator
  
  SHIBAYAMA Kiyoshi
- Project Period (FY)
  1995 – 1996
- Research Category
  
  Grant-in-Aid for Scientific Research (A)
- Research Field
  
  計算機科学
- Research Institution
  Kyoto Institute of Technology
Research on the Design and the Evaluation of Curricula for Computer Science Departments in Universities
- Principal Investigator
  
  TAKAHASHI Nobumasa
- Project Period (FY)
  1994 – 1996
- Research Category
  
  Grant-in-Aid for Scientific Research (A)
- Research Field
  
  計算機科学
- Research Institution
  Tokyo University of Agriculture and Technology
粒度・粒質を問題に適応可能な超並列計算機アーキテクチャの研究Principal Investigator
- Principal Investigator
  
  柴山潔
- Project Period (FY)
  1993
- Research Category
  
  Grant-in-Aid for Scientific Research on Priority Areas
- Research Institution
  Kyoto Institute of Technology
処理粒度・粒質を問題に適応可能な超並列計算機アーキテクチャの研究Principal Investigator
- Principal Investigator
  
  柴山潔
- Project Period (FY)
  1992
- Research Category
  
  Grant-in-Aid for Scientific Research on Priority Areas
- Research Institution
  Kyoto Institute of Technology
Research on an all-in-one processer-core architecture with processing, memory and communication functionsPrincipal Investigator
- Principal Investigator
  
  SHIBAYAMA Kiyoshi
- Project Period (FY)
  1992 – 1993
- Research Category
  
  Grant-in-Aid for General Scientific Research (C)
- Research Field
  
  情報工学
- Research Institution
  Kyoto Institure Of Technology
Performance Improvement by Exploiting Instruction-Level Parallelism
- Principal Investigator
  
  TOMITA Shinji
- Project Period (FY)
  1990 – 1991
- Research Category
  
  Grant-in-Aid for General Scientific Research (B)
- Research Field
  
  情報工学
- Research Institution
  Kyoto University
  Kyushu University
Study on an Adaptable and Massively Parallel Computer ArchitecturePrincipal Investigator
- Principal Investigator
  
  SHIBAYAMA Kiyoshi
- Project Period (FY)
  1990 – 1991
- Research Category
  
  Grant-in-Aid for General Scientific Research (C)
- Research Field
  
  情報工学
- Research Institution
  Kyoto University
Development of a symbol Manipulation-Oriented Highly Parallel ComputerPrincipal Investigator
- Principal Investigator
  
  SHIBAYAMA Kiyoshi, HAGIWARA Hiroshi
- Project Period (FY)
  1989 – 1991
- Research Category
  
  Grant-in-Aid for Developmental Scientific Research
- Research Field
  
  計算機工学
- Research Institution
  Kyoto University
Research on Parallel Processing of a Reduction Machine
- Principal Investigator
  
  HAGIWARA Hiroshi
- Project Period (FY)
  1987 – 1988
- Research Category
  
  Grant-in-Aid for General Scientific Research (B)
- Research Field
  
  計算機工学
- Research Institution
  Kyoto University
Development of a High-speed 3-Dimensional Graphics System Utilizing Hierarchical Parallel Processing
- Principal Investigator
  
  HAGIWARA Hiroshi
- Project Period (FY)
  1987 – 1988
- Research Category
  
  Grant-in-Aid for Developmental Scientific Research
- Research Field
  
  計算機工学
- Research Institution
  Kyoto University
Co-operative Research on System Organizations, Programming Languages and Algorithms for Parallel Computers
- Principal Investigator
  
  HAGIWARA Hiroshi
- Project Period (FY)
  1986 – 1987
- Research Category
  
  Grant-in-Aid for Co-operative Research (A)
- Research Field
  
  Informatics
- Research Institution
  Kyoto University

All 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009

All Journal Article Presentation

[Journal Article] Design Space Exploration for Implementing a Software-Based Speculative Memory System2018
- Author(s)
  Fujisawa Kohei、Nunome Atsushi、Shibayama Kiyoshi、Hirata Hiroaki
- Journal Title
  
  International Journal of Software Innovation
  
  Volume: 6 Issue: 2 Pages: 37-49
- DOI
  10.4018/ijsi.2018040104
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-15K00076, KAKENHI-PROJECT-15K00169
[Journal Article] A software implementation of speculative memory2017
- Author(s)
  Fujisawa Kohei、Nunome Atsushi、Shibayama Kiyoshi、Hirata Hiroaki
- Journal Title
  
  Proceedings of the 18th International Conference on Software Engineering, Artificial Intelligence, Networking and Parallel/Distributed Computing (SNPD 2017)
  
  Volume: 1 Pages: 437-443
- DOI
  10.1109/snpd.2017.8022759
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-15K00076, KAKENHI-PROJECT-15K00169
[Journal Article] A Dynamic Configuration Scheme of Storage Tiers for an Autonomous Distributed Storage System2017
- Author(s)
  Shimano Shingo、Nunome Atsushi、Yokoi Yuta、Shibayama Kiyoshi、Hirata Hiroaki
- Journal Title
  
  Information Engineering Express
  
  Volume: 3 Pages: 91-104
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-15K00076
[Journal Article] An autonomous configuration scheme of storage tiers for distributed file system2017
- Author(s)
  Shimano Shingo、Nunome Atsushi、Yokoi Yuta、Shibayama Kiyoshi、Hirata Hiroaki
- Journal Title
  
  Proceedings of the 18th International Conference on Software Engineering, Artificial Intelligence, Networking and Parallel/Distributed Computing (SNPD 2017)
  
  Volume: 1 Pages: 453-458
- DOI
  10.1109/snpd.2017.8022761
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-15K00076, KAKENHI-PROJECT-15K00169
[Journal Article] Performance evaluation of delayed-committing transactional memory2017
- Author(s)
  Ichii Sekai、Hayashi Shohei、Nunome Atsushi、Hirata Hiroaki、Shibayama Kiyoshi
- Journal Title
  
  Proceedings of the 18th International Conference on Software Engineering, Artificial Intelligence, Networking and Parallel/Distributed Computing (SNPD 2017)
  
  Volume: 1 Pages: 445-451
- DOI
  10.1109/snpd.2017.8022760
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-15K00076, KAKENHI-PROJECT-15K00169
[Journal Article] Speculative Memory: An Architectural Support for Explicit Speculations in Multithreaded Programming2016
- Author(s)
  Hiroaki Hirata, Atsushi Nunome, Kiyoshi Shibayama
- Journal Title
  
  Proceedings of the 14th International Conference on Computer and Information Science
  
  Volume: なし
- Peer Reviewed / Acknowledgement Compliant
- Data Source
  KAKENHI-PROJECT-25330058
[Journal Article] A Large-Scale Speculation for the Thread-Level Parallelization2016
- Author(s)
  Y. Shoji, A. Nunome, H. Hirata and K. Shibayama
- Journal Title
  
  International Journal of Computer and Information Science
  
  Volume: 17 Pages: 24-32
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-15K00076
[Journal Article] A Large-Scale Speculation for the Thread-Level Parallelization2016
- Author(s)
  Yuki Shoji, Atsushi Nunome, Hiroaki Hirata, Kiyoshi Shibayama
- Journal Title
  
  International Journal of Computer and Information Science
  
  Volume: 17 Pages: 24-32
- Peer Reviewed / Acknowledgement Compliant / Open Access
- Data Source
  KAKENHI-PROJECT-25330058
[Journal Article] Speculative Memory: An Architectural Support for Explicit Speculations in Multithreaded Programming2016
- Author(s)
  H. Hirata, A. Nunome and K. Shibayama
- Journal Title
  
  Proceedings of the 15th International Conference on Computer and Information Science
  
  Volume: 1 Pages: 715-721
- DOI
  10.1109/icis.2016.7550843
- Peer Reviewed / Acknowledgement Compliant / Open Access
- Data Source
  KAKENHI-PROJECT-15K00076
[Journal Article] An Interval Control Method for Status Propagation in an Autonomous Distributed Storage System2016
- Author(s)
  A. Nunome, H. Hirata and K. Shibayama
- Journal Title
  
  Proceedings of the 15th International Conference on Computer and Information Science
  
  Volume: 1 Pages: 723-728
- DOI
  10.1109/icis.2016.7550844
- Peer Reviewed / Acknowledgement Compliant / Open Access
- Data Source
  KAKENHI-PROJECT-15K00076
[Journal Article] A Large-Scale Speculation for the Thread-Level Parallelization2015
- Author(s)
  Yuki Shoji, Atsushi Nunome, Hiroaki Hirata, Kiyoshi Shibayama
- Journal Title
  
  Proceedings of the 3rd International Conference on Applied Computing and Information Technology
  
  Volume: なし Pages: 149-154
- DOI
  10.1109/acit-csi.2015.36
- Peer Reviewed / Acknowledgement Compliant
- Data Source
  KAKENHI-PROJECT-25330058
[Journal Article] Hardware Transactional Memory with Delayed Committing2015
- Author(s)
  Sekai Ichii, Saki Tashiro, Atsushi Nunome, Hiroaki Hirata, Kiyoshi Shibayama
- Journal Title
  
  Proceedings of the 3rd International Conference on Applied Computing and Information Technology
  
  Volume: なし Pages: 161-168
- DOI
  10.1109/acit-csi.2015.38
- Peer Reviewed / Acknowledgement Compliant
- Data Source
  KAKENHI-PROJECT-25330058
[Journal Article] スレッドレベル並列投機実行のためのデータ値予測機構2015
- Author(s)
  小路勇気, 布目淳, 平田博章, 柴山潔
- Journal Title
  
  第14回情報科学技術フォーラム(FIT2015)講演論文集
  
  Volume: 1 Pages: 243-244
- Acknowledgement Compliant
- Data Source
  KAKENHI-PROJECT-25330058
[Journal Article] A Distributed Storage System with Dynamic Tiering for iSCSI Environment2015
- Author(s)
  Atsushi Nunome, Hiroaki Hirata, Kiyoshi Shibayama
- Journal Title
  
  International Journal of Networked and Distributed Computing
  
  Volume: 3 Pages: 42-50
- Peer Reviewed / Acknowledgement Compliant
- Data Source
  KAKENHI-PROJECT-25330058
[Journal Article] A Lazy-Updating Snoop Cache Protocol for Transactional Memory2014
- Author(s)
  Sekai Ichii, Atsushi Nunome, Hiroaki Hirata, Kiyoshi Shibayama
- Journal Title
  
  International Journal of Computer and Information Science
  
  Volume: 15 Pages: 31-40
- Peer Reviewed / Acknowledgement Compliant
- Data Source
  KAKENHI-PROJECT-25330058
[Journal Article] A Distributed Storage System with Dynamic Tiering for iSCSI Environment2014
- Author(s)
  Atsushi Nunome, Hiroaki Hirata, Kiyoshi Shibayama
- Journal Title
  
  Proceedings of IIAI International Conference on Advanced Applied Informatics
  
  Volume: なし Pages: 644-649
- Peer Reviewed / Acknowledgement Compliant
- Data Source
  KAKENHI-PROJECT-25330058
[Journal Article] A Lazy-Updating Snoop Cache Protocol for Transactional Memory2014
- Author(s)
  Sekai Ichii, Atsushi Nunome, Hiroaki Hirata, Kiyoshi Shibayama
- Journal Title
  
  Proceedings of IIAI International Conference on Advanced Applied Informatics
  
  Volume: なし Pages: 636-643
- Peer Reviewed / Acknowledgement Compliant
- Data Source
  KAKENHI-PROJECT-25330058
[Journal Article] 非局所的な入れ子構造のループに対するスレッドレベル並列性の抽出可能性2013
- Author(s)
  上杉晴信, 布目淳, 平田博章, 柴山潔
- Journal Title
  
  第12回情報科学技術フォーラム(FIT2013)講演論文集
  
  Volume: 1巻 Pages: 389-390
- Data Source
  KAKENHI-PROJECT-25330058
[Journal Article] トランザクショナルメモリを実現するスヌープキャッシュの遅延更新プロトコル2013
- Author(s)
  一井世界, 布目淳, 平田博章, 柴山潔
- Journal Title
  
  第12回情報科学技術フォーラム(FIT2013)講演論文集
  
  Volume: 1巻 Pages: 387-388
- Data Source
  KAKENHI-PROJECT-25330058
[Journal Article] リターンアドレスの改ざん検出機能を備えたマイクロプロセッサアーキテクチャ2013
- Author(s)
  中務国男, 布目淳, 平田博章, 柴山潔
- Journal Title
  
  電子情報通信学会論文誌D
  
  Volume: Vol. J97-D Pages: 614-624
- NAID
  110009804349
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-25330058
[Journal Article] 関数リターンとの相関を利用する分岐予測方式2013
- Author(s)
  吉川唯, 布目淳, 平田博章, 柴山潔
- Journal Title
  
  第12回情報科学技術フォーラム(FIT2013)講演論文集
  
  Volume: 1巻 Pages: 383-384
- Data Source
  KAKENHI-PROJECT-25330058
[Journal Article] 動的可換性解析によるスレッドレベル並列投機実行方式2012
- Author(s)
  藤皓平, 布目淳, 平田博章, 柴山潔
- Journal Title
  
  第11回情報科学技術フォーラム講演論文集
  
  Volume: Vol.1 Pages: 267-268
- Data Source
  KAKENHI-PROJECT-22500046
[Journal Article] スレッドレベル並列投機実行のためのメモリリネーミング機構2012
- Author(s)
  平田博章, 藤井崇弘, 藤皓平, 森田清隆, 布目淳, 柴山潔
- Journal Title
  
  第11回情報科学技術フォーラム講演論文集
  
  Volume: Vol.1 Pages: 31-34
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22500046
[Journal Article] 基本ブロック単位の命令実行パス予測方式2012
- Author(s)
  安井寛幸, 布目淳, 平田博章, 柴山潔
- Journal Title
  
  第11回情報科学技術フォーラム講演論文集
  
  Volume: Vol.1 Pages: 269-270
- Data Source
  KAKENHI-PROJECT-22500046
[Journal Article] スレッドレベル並列化のためのメモリリネーミング2011
- Author(s)
  藤井崇弘, 森田清隆, 布目淳, 平田博章, 柴山潔
- Journal Title
  
  第10回情報科学技術フォーラム論文集
  
  Volume: Vol.1 Pages: 385-388
- Data Source
  KAKENHI-PROJECT-22500046
[Journal Article] スタックスマッシング攻撃の正確な検出機構を備えたプロセッサアーキテクチャ2011
- Author(s)
  中務国男, 山田徹, 布目淳, 平田博章, 柴山潔
- Journal Title
  
  第10回情報科学技術フォーラム論文集
  
  Volume: Vol.1 Pages: 63-66
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-21500053
[Journal Article] 電子商取引サイトにおける応答待ち時間の短縮を目的としたデータベース参照のスケジューリング方式2011
- Author(s)
  赤坂謙二郎, 布目淳, 平田博章, 柴山潔
- Journal Title
  
  第10回情報科学技術フォーラム論文集
  
  Volume: Vol.1 Pages: 113-116
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22500046
[Journal Article] 電子商取引サイトにおける応答待ち時間の短縮を目的としたデータベース参照のスケジューリング方式2011
- Author(s)
  赤坂謙二郎, 布目淳, 平田博章, 柴山潔
- Journal Title
  
  第10回情報科学技術フォーラム論文集
  
  Volume: Vol.1 Pages: 113-116
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-21500053
[Journal Article] IPv6 環境におけるネットワーク認証のためのマルチキャストフィルタリングイーサネットスイッチ2011
- Author(s)
  布目淳, 平田博章, 柴山潔
- Journal Title
  
  第10回情報科学技術フォーラム論文集
  
  Volume: Vol.4 Pages: 1-4
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22500046
[Journal Article] スタックスマッシング攻撃の正確な検出機構を備えたプロセッサアーキテクチャ2011
- Author(s)
  中務国男, 山田徹, 布目淳, 平田博章,柴山潔
- Journal Title
  
  第10回情報科学技術フォーラム論文集
  
  Volume: Vol.1 Pages: 63-66
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22500046
[Journal Article] IPv6環境におけるネットワーク認証のためのマルチキャストフィルタリングイーサネットスイッチ2011
- Author(s)
  布目淳, 平田博章, 柴山潔
- Journal Title
  
  第10回情報科学技術フォーラム論文集
  
  Volume: Vol.4 Pages: 1-4
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-21500053
[Journal Article] スレッドレベル並列化のためのメモリリネーミング2011
- Author(s)
  藤井崇弘, 森田清隆, 布目淳, 平田博章, 柴山潔
- Journal Title
  
  第10回情報科学技術フォーラム論文集
  
  Volume: Vol.1 Pages: 385-388
- Data Source
  KAKENHI-PROJECT-21500053
[Journal Article] スレッドレベル並列化のためのスレッド間依存関係の分類2010
- Author(s)
  森田清隆, 布目淳, 平田博章, 柴山潔
- Journal Title
  
  第9回情報科学技術フォーラム論文集
  
  Volume: Vol.1 Pages: 81-86
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22500046
[Journal Article] スレッドレベル並列化のためのスレッド間依存関係の分類2010
- Author(s)
  森田清隆, 布目淳, 平田博章, 柴山潔
- Journal Title
  
  第9回情報科学技術フォーラム論文集
  
  Volume: Vol.1 Pages: 81-86
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-21500053
[Journal Article] データベース参照のスケジューリングによる電子商取引サイトの最適化2010
- Author(s)
  赤坂謙二郎, 布目淳, 平田博章, 柴山潔
- Journal Title
  
  第9回情報科学技術フォーラム論文集
  
  Volume: Vol.1 Pages: 407-408
- Data Source
  KAKENHI-PROJECT-21500053
[Journal Article] マシン命令レベルでのプログラム実行モニタリングによる手続き呼び出し関係の正確な検知方式2010
- Author(s)
  平田博章, 山田徹, 布目淳, 柴山潔
- Journal Title
  
  第9回情報科学技術フォーラム論文集
  
  Volume: Vol.1 Pages: 87-90
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-21500053
[Journal Article] Development of an E-learning Back-end System for Code Assessment in Elementary Programming Practice2010
- Author(s)
  A.Nunome, H.Hirata, M.Fukuzawa, and K.Shibayama
- Journal Title
  
  SIGUCCS Fall 2010 Conference
  
  Volume: ACM Pages: 181-186
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22500046
[Journal Article] Development of an E-learning Back-end System for Code Assessment in Elementary Programming Practice2010
- Author(s)
  A. Nunome, H. Hirata, M. Fukuzawa, and K. Shibayama
- Journal Title
  
  SIGUCCS Fall
  
  Pages: 181-186
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-21500053
[Journal Article] マシン命令レベルでのプログラム実行モニタリングによる手続き呼び出し関係の正確な検知方式2010
- Author(s)
  平田博章, 山田徹, 布目淳, 柴山潔
- Journal Title
  
  第9回情報科学技術フォーラム論文集
  
  Volume: Vol.1 Pages: 87-90
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22500046
[Journal Article] データベース参照のスケジューリングによる電子商取引サイトの最適化2010
- Author(s)
  赤坂謙二郎, 布目淳, 平田博章, 柴山潔
- Journal Title
  
  第9回情報科学技術フォーラム論文集
  
  Volume: Vol.1 Pages: 407-408
- Data Source
  KAKENHI-PROJECT-22500046
[Journal Article] スタックスマッシング攻撃の正確な検出方式とその性能制約条件2009
- Author(s)
  野間, 布日, 平田, 柴山
- Journal Title
  
  電子情報通信学会技術研究報告 109
  
  Pages: 25-30
- NAID
  110008000648
- Data Source
  KAKENHI-PROJECT-21500053
[Presentation] スレッドレベル並列投機実行のためのメモリリネーミング機構2012
- Author(s)
  藤井崇弘, 森田清隆, 布目淳, 平田博章, 柴山潔
- Organizer
  電子情報通信学会 2012 年総合大会学生ポスターセッション
- Place of Presentation
  岡山大学
- Year and Date
  2012-03-22
- Data Source
  KAKENHI-PROJECT-22500046
[Presentation] スレッドレベル並列投機実行のためのメモリリネーミング機構2012
- Author(s)
  藤井崇弘, 森田清隆, 布目淳, 平田博章, 柴山潔
- Organizer
  電子情報通信学会2012年総合大会学生ポスターセッション
- Place of Presentation
  岡山大学
- Year and Date
  2012-03-22
- Data Source
  KAKENHI-PROJECT-21500053
[Presentation] 基本ブロック単位の命令実行パス予測方式2012
- Author(s)
  安井寛幸, 布目淳, 平田博章, 柴山潔
- Organizer
  電子情報通信学会2012年総合大会学生ポスターセッション
- Place of Presentation
  岡山大学
- Year and Date
  2012-03-22
- Data Source
  KAKENHI-PROJECT-21500053
[Presentation] 基本ブロック単位の命令実行パス予測方式2012
- Author(s)
  安井寛幸, 布目淳, 平田博章, 柴山潔
- Organizer
  電子情報通信学会 2012 年総合大会学生ポスターセッション
- Place of Presentation
  岡山大学
- Year and Date
  2012-03-22
- Data Source
  KAKENHI-PROJECT-22500046
[Presentation] スタックスマッシング攻撃の正確な検出方式とその性能制約条件2009
- Author(s)
  野間翔平, 布目淳, 平田博章, 柴山潔
- Organizer
  電子情報通信学会技術研究報告CPSY2009-47
- Place of Presentation
  高知市文化プラザ
- Year and Date
  2009-12-04
- Data Source
  KAKENHI-PROJECT-21500053
[Presentation] バッファオーバフロー検知用付加プロセッサの概要2009
- Author(s)
  野間翔平, 布目淳, 平田博章, 柴山潔
- Organizer
  情報処理学会第71回全国大会論文集
- Place of Presentation
  立命館大学
- Year and Date
  2009-03-11
- Data Source
  KAKENHI-PROJECT-21500053

1. HIRATA Hiroaki (90273549)

# of Collaborated Projects: 12 results

# of Collaborated Products: 47 results
2. NIIMI Haruo (40144331)

# of Collaborated Projects: 9 results

# of Collaborated Products: 0 results
3. NUNOME Atsushi (60335320)

# of Collaborated Projects: 6 results

# of Collaborated Products: 34 results
4. HAGIWARA Hiroshi (00025818)

# of Collaborated Projects: 5 results

# of Collaborated Products: 0 results
5. TAKAHASHI Nobumasa (70111630)

# of Collaborated Projects: 3 results

# of Collaborated Products: 0 results
6. INOUE Tomoko (40109145)

# of Collaborated Projects: 3 results

# of Collaborated Products: 0 results
7. NAKAMORI Mario (00111633)

# of Collaborated Projects: 2 results

# of Collaborated Products: 0 results
8. KAWAI Kazuhisa (10186041)

# of Collaborated Projects: 2 results

# of Collaborated Products: 0 results
9. DOI Norihisa (50051553)

# of Collaborated Projects: 2 results

# of Collaborated Products: 0 results
10. ISOMICHI Yoshinori (90116533)

# of Collaborated Projects: 2 results

# of Collaborated Products: 0 results
11. NAKATA Toshiyuki

# of Collaborated Projects: 2 results

# of Collaborated Products: 0 results
12. TOMITA Shinji (40026323)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
13. MURAKAMI Kazuaki (10200263)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
14. FUKUDA Akira (80165282)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
15. ISHIDA Tohru (20252489)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
16. YASUURA Hirohito (80135540)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
17. ARAKI Keijiro (40117057)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
18. HAGIWARA Ken-ichi (00133140)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
19. YOKOYA Naokazu (10252834)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
20. USHIJIMA Kazuo (40037750)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
21. TAKAHASHI Yoshizo (90116830)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
22. WADA Eiichi (50010723)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
23. 吉田紀彦 (00182775)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
24. 喜屋武盛基 (90044990)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
25. OYANAGI Shigeru

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
26. 北村俊明

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results

SHIBAYAMA Kiyoshi 柴山 潔

芝山 潔 シバヤマ キヨシ

Research Projects

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A Thread-Level, Parallel and Speculative Execution Method Provided with a Checkpoint GeneratorPrincipal Investigator

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A Research on the On-the-Fly Parallelization by a Dynamic Scalar ExpansionPrincipal Investigator

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A Study on a High-Performance Router Architecture with a Distributed and Cooperative Defense Mechanism against Network AttacksPrincipal Investigator

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Study on High Performance Execution Scheme for Non-Numerical Computation ProgramsPrincipal Investigator

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情報の処理機能と通信機能を統合して備える「情報体」に関する研究Principal Investigator

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A Research on Hierarchical Processor ArchitecturePrincipal Investigator

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Design of a Messageflow Processor with Chip-based Inter-processors Communication FunctionPrincipal Investigator

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A Research on a Virtual Model-Architecture for Massively Parallel Computer SystemsPrincipal Investigator

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Undergraduate Programs of an Educational Crriculum in Computer SciencePrincipal Investigator

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Design of a Processor Core for Massively Parallel ComputersPrincipal Investigator

SHIBAYAMA Kiyoshi 柴山潔

芝山潔シバヤマキヨシ