Fujita Masahiro 藤田昌宏

… Alternative Names

藤田昌宏フジタマサヒロ

FUJITA Masahiro 藤田昌宏

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Researcher Number	70323524
Other IDs
External Links
Affiliation (based on the past Project Information) *help	2021: 東京大学, 大学院工学系研究科(工学部), 教授 2019: 東京大学, 大学院工学系研究科(工学部), 教授 2017 – 2018: 東京大学, 大規模集積システム設計教育研究センター, 教授 2015: 東京大学, 学内共同利用施設等, 教授 2012 – 2015: 東京大学, 大規模集積システム設計教育研究センター, 教授 … More 2013 – 2014: 東京大学, 大規模集積システム設計研究センター, 教授 2013: 東京大学, 学内共同利用施設等, 教授 2007 – 2008: The University of Tokyo, 大規模集積システム設計教育研究センター, 教授 2004: The University of Tokyo, VLSI Design and Education Center, Professor, 大規模集積システム設計教育研究センター, 教授 2002 – 2003: 東京大学, 大学院・工学系研究科, 教授 Less
Review Section/Research Field	Principal Investigator Computer system/Network / Computer system / 電子デバイス・機器工学 / Electron device/Electronic equipment Except Principal Investigator Life / Health / Medical informatics
Keywords	Principal Investigator 高性能計算 / システムLSI / 低消費電力 / ハイパフォーマンス・コンピューティング / パワーゲーティング / 自動バックアップ / AIエッジ処理 / ニューラルネットワーク処理 / VLSI配線 / 量子回路 … More / テスト手法 / デバッグ手法 / 計算再利用 / 不揮発性メモリ / 計算高信頼化 / Arithmetic Unit / System-Level Design / Model Checking / Equivalence Verification / Design Analysis / Debug / Formal Verification / System LSI / 形式的検証技術 / 算術演算器 / システムレベル設計 / モデルチェッキング / 等価性検証 / 設計解析 / デバッグ / 形式的検証 / デバッグ支援技術 / ストリーム処理化 / ハイパフォーマンスコンピューティング / 自動設計修復 / メモリベース計算 / 多重表引 / 設計自動修復 / ストリーム処理 / 組み込みシステム / 検証・デバッグ / 組込みシステム / プログラム解析 / 論理関数解析 / 差異抽出 / 設計デバッグ / 設計自動合成 / 形式的解析 / 形式的手法 / Tau Leaping / Next Reaction Method / ハードウェア化 / 設計支援 / システムバイオロジー / ハードウェア・ソフトウェア協調設計 … More Except Principal Investigator シリコン神経ネットワーク / 神経ネットワークモデル / 神経模倣システム / 脳型情報処理 Less

Design methods for high performance-highly reliable systems using auto-backup mechanismsPrincipal Investigator
- Principal Investigator
  
  Fujita Masahiro
- Project Period (FY)
  2017 – 2019
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  Computer system
- Research Institution
  The University of Tokyo
Large-scale silicon neuronal network based on digital arithmetic circuits
- Principal Investigator
  
  KOHNO Takashi
- Project Period (FY)
  2013 – 2015
- Research Category
  
  Grant-in-Aid for Scientific Research (A)
- Research Field
  
  Life / Health / Medical informatics
- Research Institution
  The University of Tokyo
Logic verification and synthesis based on difference analysisPrincipal Investigator
- Principal Investigator
  
  FUJITA Masahiro
- Project Period (FY)
  2012 – 2014
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  Computer system/Network
- Research Institution
  The University of Tokyo
Automatic correction of hardware systems based on stream processingPrincipal Investigator
- Principal Investigator
  
  FUJITA Masahiro
- Project Period (FY)
  2012 – 2013
- Research Category
  
  Grant-in-Aid for Challenging Exploratory Research
- Research Field
  
  Computer system/Network
- Research Institution
  The University of Tokyo
電子機器用解析技術のシステムバイオロジーへの応用Principal Investigator
- Principal Investigator
  
  藤田昌宏
- Project Period (FY)
  2007 – 2008
- Research Category
  
  Grant-in-Aid for Exploratory Research
- Research Field
  
  Computer system/Network
- Research Institution
  The University of Tokyo
形式的手法に基づく動的変更可能なソフトウェア・ハードウェアの同時生成手法Principal Investigator
- Principal Investigator
  
  藤田昌宏
- Project Period (FY)
  2003
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  Electron device/Electronic equipment
- Research Institution
  The University of Tokyo
A study on debug techniques for digital systems exploiting formal verification methodsPrincipal Investigator
- Principal Investigator
  
  FUJITA Masahiro
- Project Period (FY)
  2002 – 2004
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  電子デバイス・機器工学
- Research Institution
  The University of Tokyo

All 2021 2020 2019 2018 2017 2015 2014 2013 2012 2005 2004 2003 2002 Other

All Journal Article Presentation

[Journal Article] Enhanced Design Debugging With Assistance From Guidance-Based Model Checking2021
- Author(s)
  V. S. Vineesh, Binod Kumar, Rushikesh Shinde, Neelam Sharma, Masahiro Fujita, Virendra Singh
- Journal Title
  
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
  
  Volume: 40(5) Issue: 5 Pages: 985-998
- DOI
  10.1109/tcad.2020.3011039
- Peer Reviewed / Open Access / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-17H01709
[Journal Article] SAT-Based On-Track Bus Routing2021
- Author(s)
  He-Teng Zhang, Masahiro Fujita, Chung-Kuan Cheng, Jie-Hong R. Jiang
- Journal Title
  
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
  
  Volume: 40(4) Issue: 4 Pages: 735-747
- DOI
  10.1109/tcad.2020.3007253
- Peer Reviewed / Open Access / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-17H01709
[Journal Article] Design of Single-Bit Fault-Tolerant Reversible Circuits2020
- Author(s)
  Hari Mohan Gaur, Ashutosh Kumar Singh, Anand Mohan, Masahiro Fujita, Dhiraj K. Pradhan
- Journal Title
  
  IEEE Design and Test
  
  Volume: 38(2) Issue: 2 Pages: 89-96
- DOI
  10.1109/mdat.2020.3006808
- Peer Reviewed / Open Access / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-17H01709
[Journal Article] ゲートの種類とゲート信号入力探索による論理最適化・デバッグ手法2017
- Author(s)
  藤田昌宏、ガラバギアミルマスード
- Journal Title
  
  電子情報通信学会技術研究報告信学技報
  
  Volume: 117 Pages: 151-156
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-17H01709
[Journal Article] 複数FPGAを用いたスパイキングニューラルネットワークシミュレーションの高速化2017
- Author(s)
  岡本朋大、川尾太郎、河野崇、藤田昌宏
- Journal Title
  
  電子情報通信学会技術研究報告信学技報
  
  Volume: 117 Pages: 157-162
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-17H01709
[Journal Article] An approach to approximate computing: Logic transformations for one-minterm changes in specification2017
- Author(s)
  Fujita Masahiro
- Journal Title
  
  2017 IEEE International High Level Design Validation and Test Workshop (HLDVT)
  
  Volume: 1 Pages: 91-94
- DOI
  10.1109/hldvt.2017.8167469
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-17H01709
[Journal Article] A new approach for selecting inputs of logic functions during debug2017
- Author(s)
  Gharehbaghi Amir Masoud、Fujita Masahiro
- Journal Title
  
  2017 18th International Symposium on Quality Electronic Design (ISQED)
  
  Volume: 1 Pages: 166-173
- DOI
  10.1109/isqed.2017.7918311
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-17H01709
[Journal Article] SAT-based automatic rectification and debugging of combinational circuits with LUT insertions2014
- Author(s)
  S. Jo, T. Matsumoto, and M. Fujita
- Journal Title
  
  IPSJ Transactions on System LSI Design Methodology
  
  Volume: Vol.7, February Issue Pages: 46-55
- NAID
  130003394413
- Data Source
  KAKENHI-PROJECT-24650019
[Journal Article] SAT-based Automatic Rectification and Debugging of Combinational Circuits with LUT Insertions2014
- Author(s)
  S. Jo, T. Matsumoto, M. Fujita
- Journal Title
  
  IPSJ Transactions on System LSI Design Methodology
  
  Volume: 7 Issue: 0 Pages: 46-55
- DOI
  10.2197/ipsjtsldm.7.46
- NAID
  130003394413
- ISSN
  1882-6687
- Language
  English
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23700051, KAKENHI-PROJECT-24300015, KAKENHI-PROJECT-24650019
[Journal Article] Automatic Rectification of Processor Design Bugs Using a Scalable and General Correction Model2014
- Author(s)
  Amir Masoud Gharehbaghi, Masahiro Fujita
- Journal Title
  
  IEICE Trans. Inf. & Syst.
  
  Volume: E97.D Issue: 4 Pages: 852-863
- DOI
  10.1587/transinf.E97.D.852
- NAID
  130003394911
- ISSN
  0916-8532, 1745-1361
- Language
  English
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-24300015
[Journal Article] Cベース高位設計における等価性検証フレームワークと反例解析手法の提案2005
- Author(s)
  松本剛史, 斎藤寛, 藤田昌宏
- Journal Title
  
  第18回回路とシステム軽井沢ワークショップ
  
  Pages: 557-562
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-14350178
[Journal Article] Using SpecC Program Slicing to detect uninitialized variables and unused variables2005
- Author(s)
  S.Sasaki, K.Tanabe, M.Fujita
- Journal Title
  
  Technical Report of IEICE, VLD2004-134
  
  Pages: 59-64
- NAID
  110003318259
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-14350178
[Journal Article] SpecC記述のプログラムスライシングを利用した未初期化変数・未使用変数の検出2005
- Author(s)
  佐々木俊介, 田辺健, 藤田昌宏
- Journal Title
  
  電子情報通信学会技術研究報告 Vol.104,No.708
  
  Pages: 59-64
- NAID
  110003318259
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-14350178
[Journal Article] Cベース高位設計における等価性検証フレームワークと反例解析手法の提案2005
- Author(s)
  松本剛史, 斎藤寛, 藤田昌宏
- Journal Title
  
  第18回回路とシステム軽井沢ワークショップ (発表予定)
- Data Source
  KAKENHI-PROJECT-14350178
[Journal Article] Equivalence Checking Framework and Counterexample Analysis Method in C-Based High-Level Design2005
- Author(s)
  T.Matsumoto, H.Saito, M.Fujita
- Journal Title
  
  Proc.of The 18th Workshop on Circuits and Systems in Karuizawa
  
  Pages: 557-562
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-14350178
[Journal Article] On Equivalence Checking Between Behavioral and RTL Descriptions2005
- Author(s)
  M.Fujita
- Journal Title
  
  ACM Transactions on Design Automation of Electornic Systems (掲載予定)
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-14350178
[Journal Article] A Program Slicing for System Level Description written in SpecC Language2004
- Author(s)
  K.Tanabe, H.Saito, S.Komatsu, M.Fujita
- Journal Title
  
  Technical Report of IEICE, VLD2003-149
  
  Pages: 79-84
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-14350178
[Journal Article] Program Slicing for System Level Designs in SpecC2004
- Author(s)
  K.Tanabe, S.Sasaki, M.Fujita
- Journal Title
  
  Proc.of the IASTED, International Conference on Advances in Computer Science and Technology
  
  Pages: 252-258
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-14350178
[Journal Article] Program Slicing for System Level Designs in SpecC2004
- Author(s)
  K.Tanabe, S.Sasaki, M.Fujita
- Journal Title
  
  Proc. of the IASTED, International Conference on Advances in Computer Science and Technology
  
  Pages: 252-258
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-14350178
[Journal Article] Debug Methodology for Arithmetic Circuits based on Architecture Library Mapping2003
- Author(s)
  M.Kubo, T.Matsumoto, M.Fujita
- Journal Title
  
  Proc. of International Workshop on Logic and Synthesis 2003
  
  Pages: 73-80
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-14350178
[Journal Article] Event-Driven Observability Enhanced Coverage Analysis of C Programs for Functional Validation2003
- Author(s)
  F.Fallah, I.Ghosh, M.Fujita
- Journal Title
  
  Proc.Asia South Pacific Design Automation Conference
  
  Pages: 123-128
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-14350178
[Journal Article] Event-Driven Observability Enhanced Coverage Analysis of C Programs for Functional Validation2003
- Author(s)
  F.Fallah, I.Ghosh, M.Fujita
- Journal Title
  
  Proc. Asia South Pacific Design Automation Conference 2003
  
  Pages: 123-128
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-14350178
[Journal Article] Debug Methodology for Arithmetic Circuits based on Architecture Library Mapping2003
- Author(s)
  M.Kubo, T.Matsumoto, M.Fujita
- Journal Title
  
  Proc.of International Workshop on Logic and Synthesis
  
  Pages: 73-80
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-14350178
[Journal Article] SpecC言語によるハードウェア・ソフトウェア混在システム記述を対象としたプログラムスライシング手法の提案2003
- Author(s)
  田辺健, 齋藤寛, 小松聡, 藤田昌宏
- Journal Title
  
  電子情報通信学会技術研究報告 VLSI設計技術 VLD2003-149 103・702
  
  Pages: 79-84
- NAID
  110003316386
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-14350178
[Journal Article] An Equivalence Checking Methodology for Hardware Oriented C-based Specifications2002
- Author(s)
  H.Saito, T.Ogawa, S.Thanyapat, M.Fujita
- Journal Title
  
  Proc. International High Level Design Validation and Test Workshop 2002
  
  Pages: 139-144
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-14350178
[Journal Article] Debug Methodology for Arithmetic Circuits on FPGAs2002
- Author(s)
  Masao Kubo, Masahiro Fujita
- Journal Title
  
  In Proc. of IEEE International Conference on Field-Programmable Technology (FPT-02) 2002
  
  Pages: 236-242
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-14350178
[Journal Article] Verification of Synchronization in SpecC Description with the Use of Difference Decision Diagrams2002
- Author(s)
  T.Sakunkonchak, M.Fujita
- Journal Title
  
  Proc.of Forum on specification & Design Languages (FDL'02)
- NAID
  110003212601
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-14350178
[Journal Article] Coverage Metric for Observability-Based Validation of C Programs2002
- Author(s)
  F.Fallah, I.Ghosh, M.Fujita
- Journal Title
  
  Proc.of Microprocessor Test and Verification (MTV'02)
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-14350178
[Journal Article] Verification of Synchronization in SpecC Description with the Use of Difference Decision Diagrams2002
- Author(s)
  T.Sakunkonchak, M.Fujita
- Journal Title
  
  Proc. of Forum on specification & Design Languages (FDL'02) 2002
- NAID
  110003212601
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-14350178
[Journal Article] Verification of Event-Based Synchronization of SpecC Description Using Difference Decision Diagrams2002
- Author(s)
  T.Sakunkonchak, M.Fujita
- Journal Title
  
  Formal Techniques for Networked and Distributed Systems (FORTE2002) 2002
  
  Pages: 369-369
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-14350178
[Journal Article] An Equivalence Checking Methodology for Hardware Oriented C-based Specifications2002
- Author(s)
  H.Saito, T.Ogawa, S.Thanyapat, M.Fujita
- Journal Title
  
  Proc.International High Level Design Validation and Test Workshop
  
  Pages: 139-144
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-14350178
[Journal Article] Verification of Event-Based Synchronization of SpecC Description Using Difference Decision Diagrams2002
- Author(s)
  T.Sakunkonchak, M.Fujita
- Journal Title
  
  Formal Techniques for Networked and Distributed Systems (FORTE2002)
  
  Pages: 369-369
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-14350178
[Journal Article] Coverage Metric for Observability-Based Validation of C Programs2002
- Author(s)
  F.Fallah, I.Ghosh, M.Fujita
- Journal Title
  
  Proc. of Microprocessor Test and Verification (MTV'02) 2002
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-14350178
[Journal Article] Debug Methodology for Arithmetic Circuits on FPGAs
- Author(s)
  Masao Kubo, Masahiro Fujita
- Journal Title
  
  Proc.of IEEE International Conference on Field-Programmable Technology (FPT-02)
  
  Pages: 236-242
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-14350178
[Journal Article] On Equivalence Checking Between Behavioral and RTL Descriptions
- Author(s)
  M.Fujita
- Journal Title
  
  ACM Transactions on Design Automation of Electronic Systems (to be published)
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-14350178
[Presentation] Partial synthesis and its application to automatic generation of parallel/distributed algorithms2019
- Author(s)
  藤田　昌宏
- Organizer
  International Conference on Software and Computer Application
- Invited / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-17H01709
[Presentation] A new semi-formal approach to functional testing2018
- Author(s)
  藤田　昌宏
- Organizer
  Workshop on RTL and High Level Testing
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-17H01709
[Presentation] Mobile super computing and big data analysis with non-volatile memory technology2018
- Author(s)
  Masahiro Fujita
- Organizer
  International Conference on Software and Computer Applications
- Invited / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-17H01709
[Presentation] 高位合成による自動パイプライン化を利用したスパイキングニューラルネットワークシミュレーション高速化回路のFPGA実装2015
- Author(s)
  川尾　太郎, 河野　崇, 藤田　昌宏
- Organizer
  第173回システムとLSIの設計技術研究発表会
- Place of Presentation
  長崎県勤労福祉会館（長崎県）
- Year and Date
  2015-12-01
- Data Source
  KAKENHI-PROJECT-25240045
[Presentation] アサーション自動生成とそのシミュレーションによる完全検証2014
- Author(s)
  藤田昌宏, 城怜史, 松本剛史
- Organizer
  組込技術とネットワークに関するワークショップ(ETNET2014)
- Data Source
  KAKENHI-PROJECT-24650019
[Presentation] RTL datapath optimization using system-level transformations2014
- Author(s)
  S. Ghandali, B. Alizadeh, M. Fujita, Z. Navabi
- Organizer
  Proc. of International Symposium on Quality Electronic Design (ISQED'14)
- Data Source
  KAKENHI-PROJECT-24650019
[Presentation] アサーション自動生成とそのシミュレーションによる完全検証2014
- Author(s)
  藤田昌宏, 城怜史, 松本剛史
- Organizer
  組込み技術とネットワークに関するワークショップ ETNET2014
- Place of Presentation
  ICT文化センター, 沖縄
- Data Source
  KAKENHI-PROJECT-24650019
[Presentation] プログラム可能データパスとSMTソルバーを利用した高位設計デバッグ手法2014
- Author(s)
  松本剛史, 城怜史, 藤田昌宏
- Organizer
  組込技術とネットワークに関するワークショップ(ETNET2014)
- Data Source
  KAKENHI-PROJECT-24650019
[Presentation] A Debugging Method for Gate Level Circuit Designs by Introducing Programmability2013
- Author(s)
  K. Oshima, T. Matsumoto, and M. Fujita
- Organizer
  Proc. of 21st IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC'13)
- Data Source
  KAKENHI-PROJECT-24650019
[Presentation] Hardware Implementation of BLTL Property Checkers for Acceleration of Statistical Model Checking2013
- Author(s)
  K. Oshima, T. Matsumoto, and M. Fujita
- Organizer
  Proc. of the International Conference on Computer-Aided Design (ICCAD'13)
- Data Source
  KAKENHI-PROJECT-24650019
[Presentation] Debugging Processors with Advanced Features by Reprogramming LUTs on FPGA2013
- Author(s)
  S. Jo, A.M. Gharehbaghi, T. Matsumoto, and M. Fujita
- Organizer
  Proc. of the International Conference on Field-Programmable Technology (ICFPT)
- Data Source
  KAKENHI-PROJECT-24650019
[Presentation] Partial synthesis through sampling with and without specification2013
- Author(s)
  M. Fujita, S. Jo, S. Ono, and T. Matsumoto
- Organizer
  Proc. of the International Conference on Computer-Aided Design (ICCAD'13)
- Data Source
  KAKENHI-PROJECT-24650019
[Presentation] FOF: Functionally Observable Fault and its ATPG Techniques2013
- Author(s)
  Masahiro Fujita, Takeshi Matsumoto, Satoshi Jo
- Organizer
  21st IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC '13)
- Place of Presentation
  Istanbul, Turkey
- Data Source
  KAKENHI-PROJECT-24650019
[Presentation] Partial synthesis through sampling with and without specification2013
- Author(s)
  Masahiro Fujita, Satoshi Jo, Shohei Ono, Takeshi Matsumoto
- Organizer
  International Conference on Computer-Aided Design (ICCAD '13)
- Place of Presentation
  San Jose, USA
- Data Source
  KAKENHI-PROJECT-24650019
[Presentation] FOF: Functionally Observable Fault and its ATPG Techniques2013
- Author(s)
  Masahiro Fujita, Takeshi Matsumoto, Satoshi Jo
- Organizer
  21st IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC '13)
- Place of Presentation
  Istanbul, Turkey
- Data Source
  KAKENHI-PROJECT-24300015
[Presentation] Diagnosis and correction of buggy hardware/software with formal approaches2013
- Author(s)
  M. Fujita
- Organizer
  17th International Symposium on VLSI Design and Test
- Data Source
  KAKENHI-PROJECT-24650019
[Presentation] A Debugging Method for Gate Level Circuit Designs by Introducing Programmability2013
- Author(s)
  Kousuke Oshima, Takeshi Matsumoto, Masahiro Fujita
- Organizer
  21st IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC '13)
- Place of Presentation
  Istanbul, Turkey
- Data Source
  KAKENHI-PROJECT-24300015
[Presentation] Hardware Implementation of BLTL Property Checkers for Acceleration of Statistical Model Checking2013
- Author(s)
  Kousuke Oshima, Takeshi Matsumoto, Masahiro Fujita
- Organizer
  International Conference on Computer-Aided Design (ICCAD '13)
- Place of Presentation
  San Jose, USA
- Data Source
  KAKENHI-PROJECT-24650019
[Presentation] Diagnosis and Correction of Buggy Hardware/Software with Formal Approaches2013
- Author(s)
  M. Fujita
- Organizer
  International Workshop on Design and Implementation of Formal Tools and Systems
- Place of Presentation
  Portland, OR
- Year and Date
  2013-10-19
- Data Source
  KAKENHI-PROJECT-24650019
[Presentation] Partial synthesis through sampling with and without specification2013
- Author(s)
  Masahiro Fujita, Satoshi Jo, Shohei Ono, Takeshi Matsumoto
- Organizer
  International Conference on Computer-Aided Design (ICCAD '13)
- Place of Presentation
  San Jose, USA
- Data Source
  KAKENHI-PROJECT-24300015
[Presentation] High Performance and Flexible Computing Systems with Electronic Design Automation2013
- Author(s)
  M. Fujita
- Organizer
  2013 IEEE International Conference on Electronic Measurement & Instruments
- Data Source
  KAKENHI-PROJECT-24650019
[Presentation] A Debugging Method for Gate Level Circuit Designs by Introducing Programmability2013
- Author(s)
  Kousuke Oshima, Takeshi Matsumoto, Masahiro Fujita
- Organizer
  21st IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC '13)
- Place of Presentation
  Istanbul, Turkey
- Data Source
  KAKENHI-PROJECT-24650019
[Presentation] Automatic Assertion Extraction in Gate-Level Simulation Using GPGPUs2012
- Author(s)
  Shohei Ono, Takeshi Matsumoto, Masahiro Fujita
- Organizer
  IEEE 30th International Conference on Computer Design
- Place of Presentation
  Montreal, Canada
- Data Source
  KAKENHI-PROJECT-24650019
[Presentation] Automatic Assertion Extraction in Gate-Level Simulation Using GPGPUs2012
- Author(s)
  S. Ono, T. Matsumoto, and M. Fujita
- Organizer
  Proc. of IEEE 30th International Conference on Computer Design
- Data Source
  KAKENHI-PROJECT-24650019
[Presentation] SAT-based automatic rectification and debugging of combinational circuits with LUT insertions2012
- Author(s)
  Satoshi Jo, Takeshi Matsumoto, Masahiro Fujita
- Organizer
  IEEE 21st Asia Test Symposium
- Place of Presentation
  朱鷺メッセ, 新潟
- Data Source
  KAKENHI-PROJECT-24300015
[Presentation] SAT-based automatic rectification and debugging of combinational circuits with LUT insertions2012
- Author(s)
  Satoshi Jo, Takeshi Matsumoto, Masahiro Fujita
- Organizer
  IEEE 21st Asia Test Symposium
- Place of Presentation
  新潟県朱鷺メッセ新潟コンベンションセンター
- Data Source
  KAKENHI-PROJECT-24650019
[Presentation] SAT-based automatic rectification and debugging of combinational circuits with LUT insertions2012
- Author(s)
  S. Jo, T. Matsumoto, and M. Fujita
- Organizer
  Proc. of IEEE 21st Asia Test Symposium
- Data Source
  KAKENHI-PROJECT-24650019
[Presentation] Efficient SAT-based ATPG techniques for all multiple stuck-at faults
- Author(s)
  Masahiro Fujita, Alan Mishchenko
- Organizer
  International Test Conference
- Place of Presentation
  Seattle, USA
- Year and Date
  2014-10-19 – 2014-10-24
- Data Source
  KAKENHI-PROJECT-24300015
[Presentation] Incremental ATPG methods for multiple faults under multiple fault models
- Author(s)
  Masahiro Fujita, Naoki Taguchi, Kentaro Iwata, Alan Mishchenko
- Organizer
  16th International Symposium on Quality Electronic Design
- Place of Presentation
  Santa Clara, USA
- Year and Date
  2015-03-02 – 2015-03-04
- Data Source
  KAKENHI-PROJECT-24300015
[Presentation] Logic synthesis and verification on fixed topology
- Author(s)
  Masahiro Fujita, Alan Mishchenko
- Organizer
  22nd IFIP/IEEE International Conference on Very Large Scale Integration
- Place of Presentation
  Playa del Carmen, Mexico
- Year and Date
  2014-10-06 – 2014-10-08
- Data Source
  KAKENHI-PROJECT-24300015
[Presentation] Improving polynomial datapath debugging with HEDs
- Author(s)
  Somayeh Sadeghi Kohan, Payman Behnam, Bijan Alizadeh, Masahiro Fujita, Zainalabedin Navabi
- Organizer
  European Test Symposium
- Place of Presentation
  Paderborn, Germany
- Year and Date
  2014-05-26 – 2014-05-30
- Data Source
  KAKENHI-PROJECT-24300015
[Presentation] Variation-Aware Analysis and Test Pattern Generation Based on Functional Faults
- Author(s)
  Masahiro Fujita
- Organizer
  IEEE Computer Society Annual Symposium on VLSI
- Place of Presentation
  Tampa, USA
- Year and Date
  2014-07-09 – 2014-07-11
- Invited
- Data Source
  KAKENHI-PROJECT-24300015

1. KOMATSU Satoshi (90334325)

# of Collaborated Projects: 2 results

# of Collaborated Products: 2 results
2. MATSUMOTO Takeshi (40536140)

# of Collaborated Projects: 2 results

# of Collaborated Products: 20 results
3. KOHNO Takashi (90447350)

# of Collaborated Projects: 1 results

# of Collaborated Products: 1 results
4. 河野真治 (10284952)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results

Fujita Masahiro 藤田 昌宏

藤田 昌宏 フジタ マサヒロ

FUJITA Masahiro 藤田 昌宏

Research Projects

Research Products

Co-Researchers

Design methods for high performance-highly reliable systems using auto-backup mechanismsPrincipal Investigator

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Large-scale silicon neuronal network based on digital arithmetic circuits

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Logic verification and synthesis based on difference analysisPrincipal Investigator

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Automatic correction of hardware systems based on stream processingPrincipal Investigator

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電子機器用解析技術のシステムバイオロジーへの応用Principal Investigator

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形式的手法に基づく動的変更可能なソフトウェア・ハードウェアの同時生成手法Principal Investigator

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A study on debug techniques for digital systems exploiting formal verification methodsPrincipal Investigator

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[Journal Article] Enhanced Design Debugging With Assistance From Guidance-Based Model Checking2021

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[Journal Article] SAT-Based On-Track Bus Routing2021

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[Journal Article] Design of Single-Bit Fault-Tolerant Reversible Circuits2020

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[Journal Article] ゲートの種類とゲート信号入力探索による論理最適化・デバッグ手法2017

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[Journal Article] 複数FPGAを用いたスパイキングニューラルネットワークシミュレーションの高速化2017

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[Journal Article] An approach to approximate computing: Logic transformations for one-minterm changes in specification2017

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[Journal Article] A new approach for selecting inputs of logic functions during debug2017

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Fujita Masahiro 藤田昌宏

藤田昌宏フジタマサヒロ

FUJITA Masahiro 藤田昌宏