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Saraya Takuya  更屋 拓哉

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SARAYA Takuya  更屋 拓哉

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Researcher Number 90334367
Other IDs
Affiliation (Current) 2025: 東京大学, 生産技術研究所, 助手
Affiliation (based on the past Project Information) *help 2013 – 2016: 東京大学, 生産技術研究所, 助手
2004 – 2009: 東京大学, 生産技術研究所, 助手
Review Section/Research Field
Except Principal Investigator
Electron device/Electronic equipment / Microdevices/Nanodevices / Science and Engineering
Keywords
Except Principal Investigator
MOSFET / 大規模集積回路 / 半導体物性 / CMOS / ナノワイヤトランジスタ / MOSトランジスタ / 特性ばらつき / 単電子トランジスタ / 電子デバイス・機器 / 低消費電力 … More / VLSI / 規模集積回路 / しきい値電圧自己調整 / ナノワイヤ / クーロンブロッケード振動 / 集積回路 / Beyond CMOS / Analog Pattern Matching Circuit / Functional Device / Coulomb Blockade / Quantum Effect Device / Single-Electron Transistor / Nanoelectronics / 室温動作 / 量子効果 / CMOS回路 / ナノテクノロジー / 量子效果デバイス / アナログパターンマッチング回路 / 新機能デバイス / クーロンブロッケード / 量子効果デバイス / ナノエレクトロニクス / 統計分布 / 単一不純物 / 離散不純物ゆらぎ / シリコンナノワイヤトランジスタ / サブスレッショルド / 超低消費電力 / 超低エネルギー / 電子デバイス・集積回路 / 不純物ゆらぎ / 基板バイアス効果 / 半導体超微細化 / 正規分布 / ランダムテレグラフノイズ / 微細化 / 不純物揺らぎ / 半導体 / SRAM / SOI / しきい値電圧 Less
  • Research Projects

    (6 results)
  • Research Products

    (45 results)
  • Co-Researchers

    (4 People)
  •  Ultra-Low Voltage Operating Silicon Nanowire Transistors with Threshold Voltage Self-Adjusting Mechanism

    • Principal Investigator
      Hiramoto Toshiro
    • Project Period (FY)
      2015 – 2016
    • Research Category
      Grant-in-Aid for Challenging Exploratory Research
    • Research Field
      Electron device/Electronic equipment
    • Research Institution
      The University of Tokyo
  •  Basic research on influence of single impurity atom on statistics of nanoscale transistor characteristics

    • Principal Investigator
      HIRAMOTO Toshiro
    • Project Period (FY)
      2014
    • Research Category
      Grant-in-Aid for Challenging Exploratory Research
    • Research Field
      Electron device/Electronic equipment
    • Research Institution
      The University of Tokyo
  •  Basic research on ultra-low voltage MOS transistors aiming at sub-100mV operation

    • Principal Investigator
      HIRAMOTO Toshiro
    • Project Period (FY)
      2013
    • Research Category
      Grant-in-Aid for Challenging Exploratory Research
    • Research Field
      Electron device/Electronic equipment
    • Research Institution
      The University of Tokyo
  •  Creation of New Functionalities by Integration of Room-Temperature Operating Single Electron Transistors and Large-Scale CMOS Circuits

    • Principal Investigator
      Hiramoto Toshiro
    • Project Period (FY)
      2011 – 2015
    • Research Category
      Grant-in-Aid for Scientific Research (A)
    • Research Field
      Electron device/Electronic equipment
    • Research Institution
      The University of Tokyo
  •  Nano MOSFET Fluctuations and Device Integrity

    • Principal Investigator
      HIRAMOTO Toshiro
    • Project Period (FY)
      2006 – 2009
    • Research Category
      Grant-in-Aid for Scientific Research on Priority Areas
    • Review Section
      Science and Engineering
    • Research Institution
      The University of Tokyo
  •  A research on silicon nano-devices for single-electron, quantum, CMOS integrated circuits operating at room temperature

    • Principal Investigator
      HIRAMOTO Toshiro
    • Project Period (FY)
      2004 – 2007
    • Research Category
      Grant-in-Aid for Scientific Research (A)
    • Research Field
      Microdevices/Nanodevices
    • Research Institution
      The University of Tokyo

All 2014 2013 2012 2011 2010 2009 2008 2007 2006 2005

All Journal Article Presentation

  • [Journal Article] Peak Position Control of Coulomb Blockade Oscillations in Silicon Single-Electron Transistors with Floating Gate Operating at Room Temperature2014

    • Author(s)
      Yuma Tanahashi, Ryota Suzuki, Takuya Saraya, Toshiro Hiramoto
    • Journal Title

      Japanese Journal of Applied Physics

      Volume: 53 Issue: 4S Pages: 04EJ08-04EJ08

    • DOI

      10.7567/jjap.53.04ej08

    • NAID

      210000143664

    • Peer Reviewed / Acknowledgement Compliant
    • Data Source
      KAKENHI-PROJECT-23246064
  • [Journal Article] Integration of Complementary Metal-Oxide-Semiconductor 1-Bit Analog Selectors and Single-Electron Transistors Operating at Room Temperature2013

    • Author(s)
      Ryota Suzuki, Motoki Nozue, Takuya Saraya, and Toshiro Hiramoto
    • Journal Title

      Japanese Journal of Applied Physics

      Volume: 52 Issue: 4S Pages: 04CJ05-04CJ05

    • DOI

      10.7567/jjap.52.04cj05

    • Peer Reviewed
    • Data Source
      KAKENHI-PROJECT-10J07824, KAKENHI-PROJECT-23246064
  • [Journal Article] Experimental Observation of Quantum Confinement Effect in (110) and (100) Silicon Nanowire Field-Effect Transistors and Single-Electron/Hole Transistors Operating at Room Temperature2013

    • Author(s)
      Ryota Suzuki, Motoki Nozue, Takuya Saraya, and Toshiro Hiramoto
    • Journal Title

      Japanese Journal of Applied Physics

      Volume: 52 Issue: 10R Pages: 104001-104001

    • DOI

      10.7567/jjap.52.104001

    • NAID

      40022765823

    • Peer Reviewed / Acknowledgement Compliant
    • Data Source
      KAKENHI-PROJECT-23246064
  • [Journal Article] Variable Body-Factor SOI MOSFET with Ultrathin Buried Oxide for Adaptive Threshold Voltage and Leakage Control2008

    • Author(s)
      Tetsu Ohtou, Takuya Saraya, and Toshiro Hiramoto
    • Journal Title

      IEEE Transactions on Electron Devices 54

      Pages: 40-46

    • Peer Reviewed
    • Data Source
      KAKENHI-PROJECT-18063006
  • [Journal Article] Variable Body-Factor SOI MOSFET with Ultrathin Buried Oxide for Adaptive Threshold Voltage and Leakage Control2008

    • Author(s)
      T. Ohtou, T. Saraya, and T. Hiramoto
    • Journal Title

      IEEE Transactions on Electron Devices(Invited) vol. 54, no. 1

      Pages: 40-46

    • Data Source
      KAKENHI-PROJECT-18063006
  • [Journal Article] Variable Body-Factor SOI MOSFET with Ultrathin Buried Oxide for Adaptive Threshold Voltage and Leakage Control2008

    • Author(s)
      T.Ohtou, T.Saraya, T.Hiramoto
    • Journal Title

      IEEE Transactions on Electron Devices vol.54, no.1

      Pages: 40-46

    • Peer Reviewed
    • Data Source
      KAKENHI-PROJECT-18063006
  • [Journal Article] Experimental Study on Breakdown of Mobility Universality in <100>-directed (110)-oriented pMOSFETs2007

    • Author(s)
      K. Shimizu, G Tsutsui, D. Januar, T. Saraya, T. Hiramoto
    • Journal Title

      IEEE Transactions on Nanotechnology Vol. 6, No. 3

      Pages: 358-361

    • NAID

      10018234140

    • Description
      「研究成果報告書概要(欧文)」より
    • Data Source
      KAKENHI-PROJECT-16201029
  • [Journal Article] Experimental Study on Breakdown of Mobility Universality in <100>-directed (110)-oriented pMOSFETs2007

    • Author(s)
      K. Shimizu, G. Tsutsui, D. Januar, T. Saraya, T. Hiramoto
    • Journal Title

      IEEE Transactions on Nanotechnology Vol. 6, No. 3

      Pages: 358-361

    • NAID

      10018234140

    • Description
      「研究成果報告書概要(和文)」より
    • Peer Reviewed
    • Data Source
      KAKENHI-PROJECT-16201029
  • [Presentation] 浮遊ゲートを有する室温動作シリコン単電子トランジスタにおけるクーロンブロッケード振動のピーク位置制御2014

    • Author(s)
      棚橋裕麻,鈴木龍太,更屋拓哉,平本俊郎
    • Organizer
      2014年第61回応用物理学会春季学術講演会
    • Place of Presentation
      青山学院大学相模原キャンパス
    • Year and Date
      2014-03-19
    • Data Source
      KAKENHI-PROJECT-23246064
  • [Presentation] Ultra-Low Voltage (0.1V) Operation of Vth Self-Adjusting MOSFET and SRAM Cell2014

    • Author(s)
      Akitsugu Ueda, Seung-Min Jung, Tomoko Mizutani, Anil Kumar, Takuya Saraya, and Toshiro Hiramoto
    • Organizer
      VLSI Symposium on Technology
    • Place of Presentation
      Hilton Hawaiian Village, Honolulu, HI. USA
    • Year and Date
      2014-06-12
    • Data Source
      KAKENHI-PROJECT-25630135
  • [Presentation] Ultra-Low Voltage (0.1V) Operation of Vth Self-Adjusting MOSFET and SRAM Cell2014

    • Author(s)
      Akitsugu Ueda, Seung-Min Jung, Tomoko Mizutani, Anil Kumar, Takuya Saraya, and Toshiro Hiramoto
    • Organizer
      VLSI Symposium on Technology
    • Place of Presentation
      Honolulu, HI. USA
    • Data Source
      KAKENHI-PROJECT-25630135
  • [Presentation] Peak Position Control of Coulomb Oscillations in Silicon Single-Electron Transistors with Floating Gate Operating at Room Temperature2013

    • Author(s)
      Yuma Tanahashi, Ryota Suzuki, Takuya Saraya, and Toshiro Hiramoto
    • Organizer
      2013 International Conference on Solid State Devices and Materials (SSDM)
    • Place of Presentation
      Fukuoka
    • Year and Date
      2013-09-26
    • Data Source
      KAKENHI-PROJECT-23246064
  • [Presentation] Integration of Room-Temperature Operating Single-Electron Transistors with CMOS Circuits2013

    • Author(s)
      Toshiro Hiramoto, Ryota Suzuki, and Takuya Saraya
    • Organizer
      Sweden-Japan Workshop on Quantum Nano-Physics and Electronics (QNANO2013)
    • Place of Presentation
      Tokyo
    • Data Source
      KAKENHI-PROJECT-23246064
  • [Presentation] 単電子トランジスタとCMOS回路の集積化に関する研究2013

    • Author(s)
      鈴木龍太,野末喬城,更屋拓哉,平本俊郎
    • Organizer
      固体エレクトロニクス・光エレクトロニクス研究会
    • Place of Presentation
      東京大学
    • Data Source
      KAKENHI-PROJECT-23246064
  • [Presentation] 室温動作シリコン単電子トランジスタとCMOSアナログセレクタ回路の集積化2013

    • Author(s)
      鈴木龍太,野末喬城,更屋拓哉,平本俊郎
    • Organizer
      2013年春季第60回応用物理学関係連合講演会
    • Place of Presentation
      神奈川工科大学
    • Data Source
      KAKENHI-PROJECT-23246064
  • [Presentation] Integration of Room-Temperature Operating Silicon Single-Electron Transistors and CMOS Circuits for Novel Information Processing2013

    • Author(s)
      Toshiro Hiramoto, Ryota Suzuki, and Takuya Saraya
    • Organizer
      9th International Nanotechnology Conference on Communication and Cooperation (INC9)
    • Place of Presentation
      Berlin, Germany
    • Year and Date
      2013-05-16
    • Data Source
      KAKENHI-PROJECT-23246064
  • [Presentation] 室温動作単電子トランジスタとCMOS 1-bitアナログセレクタの集積化2013

    • Author(s)
      鈴木龍太,野末喬城,更屋拓哉,平本俊郎
    • Organizer
      電子情報通信学会シリコンデバイス・材料(SDM)研究会
    • Place of Presentation
      北海道大学
    • Data Source
      KAKENHI-PROJECT-23246064
  • [Presentation] シリコンナノワイヤチャネルを有する室温動作単電子/単正孔トランジスタにおけるドット形成メカニズム2012

    • Author(s)
      鈴木龍太,野末喬城,更屋拓哉,平本俊郎
    • Organizer
      2012年秋季第73回応用物理学会学術講演会
    • Place of Presentation
      愛媛大学
    • Data Source
      KAKENHI-PROJECT-23246064
  • [Presentation] Reinvestigation of Dot Formation Mechanisms in Silicon Nanowire Channel Single-Electron/Hole Transistors Operating at Room Temperature2012

    • Author(s)
      Ryota Suzuki, Motoki Nozue, Takuya Saraya, and Toshiro Hiramoto
    • Organizer
      IEEE Silicon Nanoelectronics Workshop
    • Place of Presentation
      Honolulu, HI. USA
    • Data Source
      KAKENHI-PROJECT-23246064
  • [Presentation] Fully CMOS-Compatible Fabrication Process of Room-Temperature Operating Silicon Single-Electron Transistors2012

    • Author(s)
      Ryota Suzuki, Motoki Nozue, Takuya Saraya, and Toshiro Hiramoto
    • Organizer
      8th International Nanotechnology Conference on Communication and Cooperation (INC8)
    • Place of Presentation
      Tsukuba
    • Data Source
      KAKENHI-PROJECT-23246064
  • [Presentation] Integration of 1-bit CMOS Address Decoders and Single-Electron Transistors Operating at Room Temperature2012

    • Author(s)
      Ryota Suzuki, Motoki Nozue, Takuya Saraya, and Toshiro Hiramoto
    • Organizer
      2012 International Conference on Solid State Devices and Materials (SSDM)
    • Place of Presentation
      Kyoto
    • Data Source
      KAKENHI-PROJECT-23246064
  • [Presentation] Statistical Comparison of Random Telegraph Noise (RTN) in Bulk and Fully Depleted SOI MOSFETs2011

    • Author(s)
      J.Nishimura, T.Saraya, T.Hiramoto
    • Organizer
      Ultimate Integration of Silicon (ULIS)
    • Place of Presentation
      Cork, Ireland
    • Year and Date
      2011-03-16
    • Data Source
      KAKENHI-PROJECT-18063006
  • [Presentation] Simultaneously improvement of Write and Static Noise Margins in SRAM by Post-Fabrication Self-Convergence Technique2010

    • Author(s)
      M.Suzuki, T.Saraya, K.Shimizu, T.Sakurai, T.Hiramoto
    • Organizer
      Workshop "The Fruits of Variability Research in Europe", Design, Automation & Test in Europe (DATE)
    • Place of Presentation
      International Congress Centre in Dresden, Dresden, Germany
    • Year and Date
      2010-03-12
    • Data Source
      KAKENHI-PROJECT-18063006
  • [Presentation] Effect of Back Bias on Variability in Intrinsic Channel SOI MOSFETs2010

    • Author(s)
      T.Hiramoto, T.Saraya, C.Lee
    • Organizer
      International Symposium on Technology Evolution for Silicon Nano-Electronics (ISTESNE)
    • Place of Presentation
      Tokyo Institute of Technology
    • Year and Date
      2010-06-03
    • Data Source
      KAKENHI-PROJECT-18063006
  • [Presentation] Silicon Nanowire FETs and Single-Electron/Hole Transistors under Uniaxial Strain at Room Temperature2009

    • Author(s)
      Toshiro Hiramoto, Jiezhi Chen, YeonJoo Jeong, Takuya Saraya (Invited)
    • Organizer
      International Symposium on Nanoscale Transport and Technology (NTT2009) (p. 99)
    • Place of Presentation
      NTT Atsugi R&C Center, Kanagawa
    • Year and Date
      2009-01-22
    • Description
      「研究成果報告書概要(欧文)」より
    • Data Source
      KAKENHI-PROJECT-16201029
  • [Presentation] Silicon Nanowire FETs and Single-Electron/Hole Transistors under Uniaxial Strain at Room Temperature2009

    • Author(s)
      Toshiro Hiramoto, Jiezhi Chen, Yeon Joo Jeong, Takuya Saraya (Invited)
    • Organizer
      International Symposium on Nanoscale Transport and, Technology (NTT2009)
    • Place of Presentation
      厚木
    • Year and Date
      2009-01-22
    • Description
      「研究成果報告書概要(和文)」より
    • Data Source
      KAKENHI-PROJECT-16201029
  • [Presentation] Improvement of Static Noise Margin in SRAM by Post-Fabrication Self-Convergence Technique2009

    • Author(s)
      M.Suzuki, T.Saraya, K.Shimizu, T.Sakurai, T.Hiramoto
    • Organizer
      International Semiconductor Device Research Symposium (ISDRS), TP7-03
    • Place of Presentation
      University of Maryland, MD, USA
    • Year and Date
      2009-12-10
    • Data Source
      KAKENHI-PROJECT-18063006
  • [Presentation] Post-Fabrication Self-Convergence Scheme for Suppressing Variability in SRAM Cells and Logic Transistors2009

    • Author(s)
      M.Suzuki, T.Saraya, K.Shimizu, T.Sakurai, T.Hiramoto
    • Organizer
      Symposium on VLSI Technology, pp.148-149
    • Place of Presentation
      Kyoto
    • Year and Date
      2009-06-16
    • Data Source
      KAKENHI-PROJECT-18063006
  • [Presentation] Experimental Study of Mobility in [110]- and[100]-Directed Multiple Silicon Nanowire GAA MOSFETs on (100) SOI2008

    • Author(s)
      Jiezhi Chen, Takuya Saraya, Kousuke Miyaji, Ken Shimizu, Toshiro Hiramoto
    • Organizer
      Symposium on VLSI Technology
    • Place of Presentation
      米国ハワイ
    • Year and Date
      2008-06-17
    • Description
      「研究成果報告書概要(和文)」より
    • Data Source
      KAKENHI-PROJECT-16201029
  • [Presentation] Experimental Investigation on the Origin of Direction Dependence of Si (110) Hole Mobility Utilizing Ultra-Thin Body pMOSFETs2008

    • Author(s)
      Ken Shimizu, Takuya Saraya, Toshiro Hiramoto
    • Organizer
      IEEE International Electron Devices Meeting (IEDM)
    • Place of Presentation
      米国サンフランシスコ
    • Year and Date
      2008-12-15
    • Description
      「研究成果報告書概要(和文)」より
    • Data Source
      KAKENHI-PROJECT-16201029
  • [Presentation] Experimental Study of Mobility in [110]- and [100]-Directed Multiple Silicon Nanowire GAA MOSFETs on (100) SOI2008

    • Author(s)
      Jiezhi Chen, Takuya Saraya, Kousuke Miyaji, Ken Shimizu, Toshiro Hiramoto
    • Organizer
      Symposium on VLSI Technology (pp. 32 - 33)
    • Place of Presentation
      Hilton Hawaiian Village. HI. USA
    • Year and Date
      2008-06-17
    • Description
      「研究成果報告書概要(欧文)」より
    • Data Source
      KAKENHI-PROJECT-16201029
  • [Presentation] Nanowire Channel Nanocrystal Memory with P-Doped Silicon Nanocrystals2008

    • Author(s)
      Toshiro Hiramoto, Yuji Takahashi, Kousuke Miyaji, Takuya Saraya
    • Organizer
      IEEE Nanotechnology Materials and Devices Conference (p. 57)
    • Place of Presentation
      Kyoto University
    • Year and Date
      2008-10-20
    • Description
      「研究成果報告書概要(欧文)」より
    • Data Source
      KAKENHI-PROJECT-16201029
  • [Presentation] Nanowire Channel Nanocrystal Memory with P-Doped Silicon Nanocrystals2008

    • Author(s)
      Toshiro Hiramoto, Yuji Takahashi, Kousuke Miyaji, Takuya Saraya
    • Organizer
      IEEE Nanotechnology Materials and Devices Conference
    • Place of Presentation
      京都
    • Year and Date
      2008-10-20
    • Description
      「研究成果報告書概要(和文)」より
    • Data Source
      KAKENHI-PROJECT-16201029
  • [Presentation] Uniaxial Strain Effects on Silicon Nanowire pMOSFET and Single-Hole Transistor at Room Temperature2008

    • Author(s)
      YeonJoo Jeong, Jiezhi Chen, Takuya Saraya, Toshiro Hiramoto
    • Organizer
      IEEE International Electron Devices Meeting (IEDM) (pp. 761 - 764)
    • Place of Presentation
      San Francisco, CA. USA
    • Year and Date
      2008-12-17
    • Description
      「研究成果報告書概要(欧文)」より
    • Data Source
      KAKENHI-PROJECT-16201029
  • [Presentation] Electron Mobility in Multiple Silicon Nanowires GAA nMOSFETs on (110) and (100) SOI at Room and Low Temperature2008

    • Author(s)
      Jiezhi Chen, Takuya Saraya, Toshiro Hiramoto
    • Organizer
      IEEE International Electron Devices Meeting (IEDM) (pp. 757 - 760)
    • Place of Presentation
      San Francisco, CA, USA
    • Year and Date
      2008-12-17
    • Description
      「研究成果報告書概要(欧文)」より
    • Data Source
      KAKENHI-PROJECT-16201029
  • [Presentation] Uniaxial Strain Effects on Silicon Nanowire pMOSFET and Single-Hole Transistor at Room Temperature2008

    • Author(s)
      Yeon Joo Jeong, Jiezhi Chen, Takuya Saraya, Toshiro Hiramoto
    • Organizer
      IEEE International Electron Devices Meeting (IEDM)
    • Place of Presentation
      米国サンフランシスコ
    • Year and Date
      2008-12-17
    • Description
      「研究成果報告書概要(和文)」より
    • Data Source
      KAKENHI-PROJECT-16201029
  • [Presentation] Experimental Investigation on the Origin of Direction Dependence of Si (110) Hole Mobility Utilizing Ultra-Thin Body pMOSFETs2008

    • Author(s)
      Ken Shimizu, Takuya Saraya, Toshiro Hiramoto
    • Organizer
      IEEE International Electron Devices Meeting (IEDM) (pp. 67 - 70)
    • Place of Presentation
      San Francisco. CA, USA
    • Year and Date
      2008-12-15
    • Description
      「研究成果報告書概要(欧文)」より
    • Data Source
      KAKENHI-PROJECT-16201029
  • [Presentation] Electron Mobility in Multiple Silicon Nanowires GAA nMOSFETs on (110) and (100) SOI at Room and Low Temperature2008

    • Author(s)
      Jiezhi Chen, Takuya Saraya, Toshiro Hiramoto
    • Organizer
      IEEE International Electron Devices Meeting (IEDM)
    • Place of Presentation
      米国サンフランシスコ
    • Year and Date
      2008-12-17
    • Description
      「研究成果報告書概要(和文)」より
    • Data Source
      KAKENHI-PROJECT-16201029
  • [Presentation] Experimental Demonstrations of Superior Characteristics of Variable Body-Factor (γ) Fully-Depleted SOI MOSFETs with Extremely Thin BOX of 10nm2006

    • Author(s)
      T.Ohtou, T.Saraya, K.Shimokawa, Y.Doumae, Y.Nagatomo, J.Ida, T.Hiramoto
    • Organizer
      IEEE International Electron Devices Meeting (IEDM), pp.877-880
    • Place of Presentation
      San Francisco, CA, USA
    • Year and Date
      2006-12-13
    • Data Source
      KAKENHI-PROJECT-18063006
  • [Presentation] Mobility Enhancement in (110)-Oriented Ulta-Thin-Body Single-Gate and Double-Gate SOI MOSFETs2006

    • Author(s)
      T. Hiramoto, G. Tsutsui, M. Saitoh, T. Nagumo, T. Saraya
    • Organizer
      International Workshop on Nano CMOS
    • Place of Presentation
      静岡
    • Year and Date
      2006-01-30
    • Description
      「研究成果報告書概要(和文)」より
    • Data Source
      KAKENHI-PROJECT-16201029
  • [Presentation] Mobility Enhancement in (110)-Oriented Ulta-Thin-Body Single-Gate and Double-Gate SOI MOSFETs2006

    • Author(s)
      T. Hiramoto, G. Tsutsui, M. Saitoh, T. Nagumo, T. Saraya
    • Organizer
      International Workshop on Nano CMOS (pp. 14-15)
    • Place of Presentation
      Toray Sougou Kensyu Center, Mishima, Shizuoka
    • Description
      「研究成果報告書概要(欧文)」より
    • Data Source
      KAKENHI-PROJECT-16201029
  • [Presentation] Experimental Study on Breakdown of Mobility Universality in <100>-Directed (110)-Oriented pMOSFETs2006

    • Author(s)
      K. Shimizu, G. Tsutsui, D. Januar, T. Saraya, T. Hiramoto
    • Organizer
      IEEE Silicon Nanoelectronics Workshop
    • Place of Presentation
      米国ホノルル
    • Year and Date
      2006-06-11
    • Description
      「研究成果報告書概要(和文)」より
    • Data Source
      KAKENHI-PROJECT-16201029
  • [Presentation] Experimental Study on Breakdown of Mobility Universality in <100>-Directed (110)-Oriented pMOSFETs2006

    • Author(s)
      K. Shimizu, G. Tsutsui, D. Januar. T. Saraya, T. Hiramoto
    • Organizer
      IEEE Silicon Nanoelectronics Workshop (pp. 11-12)
    • Place of Presentation
      Hilton Hawaiian Village, Honolulu, HI, USA
    • Description
      「研究成果報告書概要(欧文)」より
    • Data Source
      KAKENHI-PROJECT-16201029
  • [Presentation] Mobility Enhancement due to Volume Inversion in (110)-oriented Ultra-thin Body Double-gate nMOSFETs with Body Thickness less than 5 nm2005

    • Author(s)
      Gen Tsutsui, Masumi Saitoh, Takuya Saraya, Toshiharu Nagumo, Toshiro Hiramoto
    • Organizer
      International Electron Devices Meeting (IEDM)
    • Place of Presentation
      米国ワシントン
    • Year and Date
      2005-12-07
    • Description
      「研究成果報告書概要(和文)」より
    • Data Source
      KAKENHI-PROJECT-16201029
  • [Presentation] Mobility Enhancement due to Volume Inversion in (110)-oriented Ultra-thin Body Double-gate nMOSFETs with Body Thickness less than 5 nm2005

    • Author(s)
      Gen Tsutsui, Masumi Saitoh, Takuya Saraya, Toshiharu Nagumo, Toshiro Hiramoto
    • Organizer
      International Electron Devices Meeting (1EDM) (pp. 747-750)
    • Place of Presentation
      Washington D. C., USA
    • Description
      「研究成果報告書概要(欧文)」より
    • Data Source
      KAKENHI-PROJECT-16201029
  • 1.  HIRAMOTO Toshiro (20192718)
    # of Collaborated Projects: 6 results
    # of Collaborated Products: 44 results
  • 2.  SAKURAI Takayasu (90282590)
    # of Collaborated Projects: 1 results
    # of Collaborated Products: 0 results
  • 3.  Masaharu Kobayashi (40740147)
    # of Collaborated Projects: 1 results
    # of Collaborated Products: 0 results
  • 4.  川口 博 (00361642)
    # of Collaborated Projects: 1 results
    # of Collaborated Products: 0 results

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