SUEYOSHI Toshinori 末吉敏則

… Alternative Names

Researcher Number	00117136
Other IDs
Affiliation *help	2010 – 2013 : Kumamoto University, 自然科学研究科, 教授 2010 – 2012 : 熊本大学, 大学院・自然科学研究科, 教授 2007 – 2008 : Kumamoto University, Graduate School of Science and Thchnology, Professor 2007 : 熊本大, 自然科学研究科, 教授 – 2007 : 熊本大学, 大学院先端科学研究部（工）, 教授 … More
Review Section/Research Field	Principal Investigator 広領域 / 計算機科学 / Computer system/Network / Informatics Except Principal Investigator 計算機工学 / 計算機科学 / Informatics / Computer system/Network
Keywords	Principal Investigator FPGA / Reconfigurable Computing / リコンフィギャラブルロジック / リコンフィギャラブルシステム / Reconfigurable Logic / TCP / リコンフィギャラブル・コンピューティング / 可変構造 / System LSI / Remote Reconfiguration … More Except Principal Investigator FPGA / 計算機工学教育 / 超並列計算機 / 教育用マイクロプロセッサ / マルチキャスト / educational microprocessor / Recovery / 並列処理計算機 / 多重命令パイプライン方式 / キャッシュ・コヒーレンス制御 / 入出力ネットワーク / アーキテクチャ / 並行処理 / Parallel processor / ソフトウェアの誤り / 電子デバイス・機器 / experiment curriculum / 相互結合網 / ワークステーション / キャッシュ・メモリ / Text Processing / 非周期処理 / ディペンダブル・コンピューティング / アウト・オブ・オーダー実行 / 並列オブジェクト指向 / セルライブラリ / Task / LSI設計 / Thread / services of chip implementation / チップ試作サービス / パイプライン制御 / Adaのパッケージ機能 / education of VLSI dsign / Code scheduling / Normalized Japanese Text / 推敲支援ツール / Textual Analysis / Boyer-Moore Algorithm / データ駆動並列処理 / 最適化コンパイラ / メンテナンス・システム / 集積回路工学 / 構成データ / software education / 二重系 / 静的コード・スケジューリング / Distribute Memory System / 冗長計算 / ハードエラー検出．回避 / クラスタリング / Parallel operating system / 字面解析 / マルチコンテキスト / ハードエラー回避 / Parallel execution / エラーメッセージの日本語化 / リコンフィギャラブルシステム / Boyer-Mooreアルゴリズム / Maintenance System / ファイル・システム / LSI design education / Crossbar network / 並列オペレーティング・システム / computer engineering education / Software Developing Environment / ディペンダブル・コンピューティング / String Matching / ＦＰＧＡ / Reconfigurability / 入出力サブシステム / 設計自動化 / 日本語文書処理 / integrated circuit / ワークステーション・クラスタ / ルーティング / ソフトウェア実験 / クロスバ網 / 日本語文章処理 / 正規日本語テキスト / キャッシユ・コヒーレンス制御 / LSIテスト / VLIW(Very Long Instruction Word) architecture / 細粒度並列処理 / 実験カリキュラム / 制御駆動並列処理 / 動的コード・スケジューリング / computer architecture / SIMP(Single Instruction stream / フルカスタム設計 / Japanese Text Processing / Oシステム / 仮想FIFO / キャッシュ / スレッド / Workstation Cluster / curriculum / education of computer science / ハードウェア実験 / 教育カリキュラム / SEU / 推敲支援 / 単一命令流 / ゲートアレイ / 可変構造 / VLSI設計 / 文字列照合 / LSI設計教育 / 命令パイプライン / Massively Parallel Computer / 正規化日本語文字 / ハードエラー検出 / シミュレーション / VLSI design / hardware education / 分散メモリ・システム / Personal Computer / 分散シミュレーション / 超長形式機械命令 / RDT:Recursive Diagonal Torus / 離散シミュレーション / マンマシンインターフェース / キャッシュコヒーレンス制御 / ルーティング・プロトコル / 分散共有メモリ / Japanese Document Processing / コンテキスト統合 / Interconnection network / 並列計算機 / ソフトウェア開発環境 / ゲートアレー / 回復処理 / Multiple instruction Pipelining) architecture / プロトタイピング / 計算機アーキテクチャ / 日本後テキスト処理 / 統計データの可視化 / O Subsystem / Pipeline architecture / ソフトエラー / スケーラビリティ / VLSI設計教育 / パーソナルコンピュータ / Distributed Simulation / Low-level parallel processing / 並列I / 負荷分散方式 / Redundant computation / Scalability / ディペンダブルシステム / スケーラビィリティ / テクノロジマッピング / Writing Tools / ユーザインタフェース / cell libraries / I / 低消費電力化 / Cache Memory / HDTV / メンテナンス / 配線共有 / タスク / Rocursive Dragonal Torus / Highly available / 耐故障性 / 高可用性 / 超並列向き相互結合網 / テキスト処理 / LSI試作 Less

A Study of High Dependability Reconfigurable Logic Architecture
- Principal Investigator
  
  IIDA Masahiro
- Project Period (FY)
  2011 – 2013
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  Computer system/Network
- Research Institution
  Kumamoto University
Development of Self-Repair Dependable system on FPGAPrincipal Investigator
- Principal Investigator
  
  SUEYOSHI Toshinori
- Project Period (FY)
  2010 – 2012
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  Computer system/Network
- Research Institution
  Kumamoto University
A study of the integrated EDA tools for reconfigurable logic
- Principal Investigator
  
  IIDA Masahiro
- Project Period (FY)
  2006 – 2008
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  Computer system/Network
- Research Institution
  Kumamoto University
Research for Reconfigurable System Technology using Fine Grained Cell ArchitecturePrincipal Investigator
- Principal Investigator
  
  SUEYOSHI Toshinori
- Project Period (FY)
  2005 – 2007
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  Computer system/Network
- Research Institution
  Kumamoto University
Research and Development of Flexible Hardware and Remote Reconfiguration TechniquesPrincipal Investigator
- Principal Investigator
  
  SUEYOSHI Toshinori
- Project Period (FY)
  2002 – 2004
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  広領域
- Research Institution
  Kumamoto University
Study on Next Generation FPGA toward Reconfigurable ComputingPrincipal Investigator
- Principal Investigator
  
  SUEYOSHI Toshinori
- Project Period (FY)
  1999 – 2001
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  広領域
- Research Institution
  Kumamoto University
Rapid Prototyping Technology for Large Scale Logic CircuitsPrincipal Investigator
- Principal Investigator
  
  SUEYOSHI Toshinori
- Project Period (FY)
  1997 – 1998
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  広領域
- Research Institution
  Kumamoto University
Study of Reconfigurable Processor using Programmable LSIPrincipal Investigator
- Principal Investigator
  
  SUEYOSHI Toshinori
- Project Period (FY)
  1997 – 1998
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  計算機科学
- Research Institution
  Kumamoto University
Development of Curriculums for Education of VLSI System Design.
- Principal Investigator
  
  YASUURA Hiroto
- Project Period (FY)
  1996 – 1997
- Research Category
  
  Grant-in-Aid for Scientific Research (A)
- Research Field
  
  計算機科学
- Research Institution
  KYUSHU UNIVERSITY
Study of Cluster Computing on a High Speed Network EnvironmentPrincipal Investigator
- Principal Investigator
  
  SUEYOSHI Toshinori
- Project Period (FY)
  1995 – 1996
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  計算機科学
- Research Institution
  Kyushu Institute of Technology
超並列ハードウェア・アーキテクチャの研究
- Principal Investigator
  
  TOMITA Shinji, 富田真治
- Project Period (FY)
  1994
- Research Category
  
  Grant-in-Aid for Scientific Research on Priority Areas
- Research Institution
  Kyoto University
Prototype Development and Experimental Implementation of A Massively Parallel Computer
- Principal Investigator
  
  TOMITA Shinji
- Project Period (FY)
  1994 – 1995
- Research Category
  
  Grant-in-Aid for Developmental Scientific Research (A)
- Research Field
  
  計算機科学
- Research Institution
  KYOTO UNIVERSITY
Development of Educational Microprocessors for Computer Science Education
- Principal Investigator
  
  YASUURA Hiroto
- Project Period (FY)
  1994 – 1995
- Research Category
  
  Grant-in-Aid for Developmental Scientific Research (B)
- Research Field
  
  計算機科学
- Research Institution
  Kyushu University
Study on Interconnection Networks Towards Realization of a Reconfigurable Parallel ComputerPrincipal Investigator
- Principal Investigator
  
  SUEYOSHI Toshinori
- Project Period (FY)
  1993 – 1994
- Research Category
  
  Grant-in-Aid for General Scientific Research (C)
- Research Field
  
  計算機科学
- Research Institution
  Kyushu Institute of Technology
Study on the Speed-Up of Communications Protocol Processing by Parallel ProcessingPrincipal Investigator
- Principal Investigator
  
  SUEYOSHI Toshinori
- Project Period (FY)
  1989 – 1990
- Research Category
  
  Grant-in-Aid for General Scientific Research (B)
- Research Field
  
  Informatics
- Research Institution
  Kyushu Institute of Technology
Study of a Reconfigurable Parallel Processor
- Principal Investigator
  
  TOMITA Shinji, 富田真治
- Project Period (FY)
  1987 – 1988
- Research Category
  
  Grant-in-Aid for General Scientific Research (B)
- Research Field
  
  計算機工学
- Research Institution
  Kyushu University
Development of a High-Performance Workstation with a Very-Long-Instruction-Word (VLIW) Processor
- Principal Investigator
  
  TOMITA Shinji, 富田真治
- Project Period (FY)
  1987 – 1988
- Research Category
  
  Grant-in-Aid for Developmental Scientific Research
- Research Field
  
  計算機工学
- Research Institution
  Kyushu University
Development of Writing Tools for Japanese Documents on a Personal Computer
- Principal Investigator
  
  USHIJIMA Kazuo
- Project Period (FY)
  1986 – 1988
- Research Category
  
  Grant-in-Aid for Developmental Scientific Research
- Research Field
  
  Informatics
- Research Institution
  KYUSHU UNIVERSITY
Studying fo the Efficiency Lmproving Technique of the Highly Available System.
- Principal Investigator
  
  KAMBAYASHI Yahiko
- Project Period (FY)
  1985 – 1987
- Research Category
  
  Grant-in-Aid for General Scientific Research (B)
- Research Field
  
  計算機工学
- Research Institution
  Kyushu University
Construction of Programming Support Environment for Japanese Text Processing
- Principal Investigator
  
  USHIJIMA Kazuo
- Project Period (FY)
  1985 – 1986
- Research Category
  
  Grant-in-Aid for General Scientific Research (B)
- Research Field
  
  Informatics
- Research Institution
  Kyushu University

All 2013 2012 2011 2010 2007 2006 2005 2004 2003 2002 Other

All Journal Article Presentation Book

[Book] FPGA活用チュートリアル 2012/2013年版，第7章部分再構成技術の特徴と高信頼化システムへの応用2012
- Author(s)
  末吉敏則，一ノ宮佳裕
- Publisher
  CQ出版社
- Data Source
  KAKENHI-PROJECT-22300018
[Book] FPGA 活用チュートリアル 2012/2013 年版,第7 章部分再構成技術の特徴と高信頼化システムへの応用2012
- Author(s)
  末吉敏則,一ノ宮佳裕(分担執筆)
- Publisher
  CQ 出版社
- Data Source
  KAKENHI-PROJECT-22300018
[Book] 2007システムLSI技術大全, 第4編第1章FPGA/PLD総論2007
- Author(s)
  末吉敏則
- Publisher
  電子ジャーナル社
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-17300021
[Book] FPGA/PLD設計スタートアップ2007/2008年版, 第1章FPGA/PLDの基礎知識2007
- Author(s)
  末吉敏則
- Publisher
  CQ出版社
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-17300021
[Book] 先端科学技術要覧2006, 第III編情報通信, III-7新しい可能性に満ちたFPGAの世界2006
- Author(s)
  末吉敏則
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-17300021
[Book] リコンフィギャラブルシステム2005
- Author(s)
  末吉敏則, 天野英晴(編著)
- Total Pages
  279
- Publisher
  オーム社
- Data Source
  KAKENHI-PROJECT-17300021
[Book] リコンフィギャラブルシステム2005
- Author(s)
  末吉敏則, 天野英晴編著
- Total Pages
  279
- Publisher
  オーム社
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-17300021
[Book] 2005システムLSI技術大全, 第4編第1章FPGA/PLD総論2005
- Author(s)
  末吉敏則
- Publisher
  電子ジャーナル社
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-17300021
[Book] FPGA/PLD設計スタートアップ2005/2006年版, 第1章FPGA/PLDの基礎知識2005
- Author(s)
  末吉敏則
- Publisher
  CQ出版社
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-17300021
[Journal Article] FPGA Design Framework Combined with Commercial VLSI CAD2013
- Author(s)
  Q.Zhao, K.Inoue, M.Amagasaki, M.Iida, M.Kuga, T.Sueyoshi
- Journal Title
  
  IEICE Transactions on Information and Systems
  
  Volume : Vol.E96-D, No.8 Pages : 1602-1612
- Data Source
  KAKENHI-PROJECT-23300017
[Journal Article] システムLSI搭載FPGA-IPコア向け物理故障検出及び回避手法2013
- Author(s)
  尼崎太樹，西谷祐樹，井上万輝，飯田全広，久我守弘，末吉敏則
- Journal Title
  
  信学論D
  
  Volume : Vol.J96-D，No.12 Pages : 3019-3029
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23300017
[Journal Article] システムLSI搭載FPGA-IPコア向け物理故障検出及び回避手法2013
- Author(s)
  尼崎太樹, 西谷祐樹, 井上万輝, 飯田全広, 久我守弘, 末吉敏則
- Journal Title
  
  信学論D
  
  Volume : Vol.J96-D, No.12 Pages : 3019-3029
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23300017
[Journal Article] Fault Recovery Technique for TMR Softcore Processor System using Partial Reconfiguration2012
- Author(s)
  M.Fujino, H.Tanaka, Y.Ichinomiya, M.Kuga, M.Iida, M.Amagasaki and T.Sueyoshi
- Journal Title
  
  Lecture Notes in Computer Science, Springer-Verlag Berlin Heidelberg
  
  Volume : 7439 Pages : 392-404
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23300017
[Journal Article] A bitstream relocation technique to improve flexibility of partial reconfiguration2012
- Author(s)
  Y.Ichinomiya, M.Amagasaki, M.Iida, M.Kuga and T.Sueyoshi
- Journal Title
  
  Lecture Notes in Computer Science, Springer-Verlag Berlin Heidelberg
  
  Volume : 7439 Pages : 139-152
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23300017
[Journal Article] Designing flexible reconfigurableregions to relocate partial bitstreams2012
- Author(s)
  Y.Ichinomiya, S.Usagawa, M.Amagasaki,M.Iida, M.Kuga and T.Sueyoshi
- Journal Title
  
  Proc. the 20th Annual International IEEESymposium on Field-Programmable CustomComputing Machines (FCCM2012)
  
  Pages : 241-241
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22300018
[Journal Article] Fault Recovery Technique for TMRSoftcore Processor System using PartialReconfiguration2012
- Author(s)
  M.Fujino, H.Tanaka, Y.Ichinomiya,M.Kuga, M.Iida, M.Amagasaki andT.Sueyoshi
- Journal Title
  
  Proc. of 12th International Conference onAlgorithms and Architectures for ParallelProcessing (ICA3PP-12), Lecture Notes in ComputerScience(LNCS)7439,Springer-VerlagBerlinHeidelberg
  
  Pages : 392-404
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22300018
[Journal Article] A bitstream relocation technique toimprove flexibility of partialreconfiguration2012
- Author(s)
  Y.Ichinomiya, M.Amagasaki, M.Iida,M.Kuga and T.Sueyoshi
- Journal Title
  
  Proc. of 12th International Conference onAlgorithms and Architectures for ParallelProcessing (ICA3PP-12), Lecture Notes inComputer Science (LNCS) 7439,Springer-Verlag Berlin Heidelber
  
  Pages : 139-152
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22300018
[Journal Article] Fault-Injection Analysis to Estimate SEUFailure in Time by Using Frame-BasedPartial Reconfiguration2012
- Author(s)
  Y.Ichinomiya, T.Kimura, M.Amagasaki,M.Kuga, M.Iida and T.Sueyoshi
- Journal Title
  
  IEICETransactions on Fundamentals ofElectronics, , Communications andComputer Sciences
  
  Volume : Vol.E95-A,No.12 Pages : 2347-2356
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22300018
[Journal Article] Fault-Injection Analysis to Estimate SEU Failure in Time by Using Frame-Based Partial Reconfiguration2012
- Author(s)
  Y.Ichinomiya, T.Kimura, M.Amagasaki, M.Kuga, M.Iida and T.Sueyoshi
- Journal Title
  
  IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
  
  Volume : Vol.E95-A, No.12 Pages : 2347-2356
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22300018
[Journal Article] COGRE : A Novel Compact Logic Cell Architecture for Area Minimization2012
- Author(s)
  M.Iida, M.Amagasaki, Y.Okamoto, Q.Zhao and T.Sueyoshi
- Journal Title
  
  IEICE Transactions on Information and Systems
  
  Volume : Vol.E95-D, No.2 Pages : 294-302
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23300017
[Journal Article] An Easily Testable Routing Architecture and Prototype Chip2012
- Author(s)
  K.Inoue, M.Koga, M.Amagasaki, M.Iida, Y.Ichida, M.Saji, J.Iida and T.Sueyoshi
- Journal Title
  
  IEICE Transactions on Information and Systems
  
  Volume : Vol.E95-D, No.2 Pages : 303-313
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23300017
[Journal Article] An Easily Testable Routing Architecture and Prototype Chip2012
- Author(s)
  K.Inoue, M.Amagasaki, M.Iida, T.Sueyoshi
- Journal Title
  
  IEICE Trans
  
  Volume : E95-D Pages : 303-313
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23300017
[Journal Article] COGRE : A Novel Compact Logic Cell Architecture for Area Minimization2012
- Author(s)
  M.Iida, M.Amagasaki, Y.Okamoto, Q.Zhao, T.Sueyoshi
- Journal Title
  
  IEICE Trans
  
  Volume : E95-D Pages : 294-302
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23300017
[Journal Article] Fault-Injection Analysis to Estimate SEU Failure in Time by Using Frame-Based Partial Reconfiguration2012
- Author(s)
  Y.Ichinomiya, T.Kimura, M.Amagasaki, M.Kuga, M.Iida and T.Sueyoshi
- Journal Title
  
  IEICE Transactions on Fundamentals of Electronics
  
  Volume : Vol.E95-A, No.12 Pages : 2347-2356
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23300017
[Journal Article] Improving the Soft-error Tolerability ofa Soft-core Processor on an FPGA usingTriple Modular Redundancy and PartialReconfiguration2011
- Author(s)
  Y.Ichinomiya, M.Amagasaki, M.Iida,M.Kuga and T.Sueyoshi
- Journal Title
  
  Journal of Next Generation InformationTechnology
  
  Volume : Vol.2, No.3 Pages : 35-48
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22300018
[Journal Article] A Novel Soft Error Detection and Correction Circuit for Embedded Reconfigurable Systems2011
- Author(s)
  Q.Zhao, Y.Ichinomiya, M.Amagasaki, M.Iida and T.Sueyoshi
- Journal Title
  
  IEEE Embedded Systems Letters
  
  Volume : Vol.3, Issue3 Pages : 89-92
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23300017
[Journal Article] A Novel Soft Error Detection and Correction Circuit for Embedded Reconfigurable Systems2011
- Author(s)
  Q.Zhao, Y.Ichinomiya, M.Amagasaki, M.Iida, T.Sueyoshi
- Journal Title
  
  IEEE Embedded Systems Letters
  
  Volume : 3 Pages : 89-92
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22300018, KAKENHI-PROJECT-23300017, KAKENHI-PROJECT-11J07446
[Journal Article] Improving the Soft-error Tolerability of a Soft-core Processor on an FPGA using Triple Modular Redundancy and Partial Reconfiguration2011
- Author(s)
  Y.Ichinomiya, M.Amagasaki, M.Iida, M.Kuga, T.Sueyoshi
- Journal Title
  
  Journal of Next Generation Information Technology
  
  Volume : 2 Pages : 35-48
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22300018
[Journal Article] Reliable Softcore Processor System using TMR and Dynamic Reconguration2011
- Author(s)
  M.Fujino, Y.Ichinomiya, M.Amagasaki, M.Kuga, M.Iida, T.Sueyoshi
- Journal Title
  
  Proc.2011 Joint Conference of Electrical and Electronics Engineers in Kyushu
- Data Source
  KAKENHI-PROJECT-22300018
[Journal Article] A Case Study of Dependability Estimation for SRAM-based FPGA Circuits2011
- Author(s)
  T.Kimura, Y.Ichinomiya, M.Koga, M.Amagasaki, M.Kuga, T.Sueyoshi
- Journal Title
  
  Proc.the 6th International Student Conference on Advanced Science and Technology
  
  Pages : 107-108
- Data Source
  KAKENHI-PROJECT-22300018
[Journal Article] A Case Study of Evaluation Technique forSoft error Tolerance on SRAM-based FPGAs2010
- Author(s)
  T.Kimura, N.Kai, M.Amagasaki, M.Kugaand T.Sueyoshi
- Journal Title
  
  Proc. of IEEE Region 10 InternationalTechnical Conference (TENCON2010)
  
  Volume : T6-2.5
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22300018
[Journal Article] Soft-error Tolerability Analysis forTriplicated Circuit on an FPGA2010
- Author(s)
  Y.Ichinomiya, M.Amagasaki, M.Kuga andT.Sueyoshi
- Journal Title
  
  Proc. the 16th Workshop on Synthesis AndSystem Integration of Mixed InformationTechnologies (SASIMI2010)
  
  Pages : 448-453
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22300018
[Journal Article] Improving the Robustness ofs a SoftcoreProcessor against SEUs by using TMR andPartial Reconfiguration2010
- Author(s)
  Y.Ichinomiya, S.Tanoue, M.Amagasaki,M.Iida, M.Kuga and T.Sueyoshi
- Journal Title
  
  Proc. the 18th Annual International IEEESymposium on Field-Programmable CustomComputing Machines (FCCM2010)
  
  Pages : 47-54
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22300018
[Journal Article] SRAM型FPGA上の実装回路におけるソフトエラー耐性評価手法の一検討2010
- Author(s)
  木村剛士, 甲斐統貴, 堤喜章, 尼崎太樹, 久我守弘, 末吉敏則
- Journal Title
  
  電子情報通信学会技術研究報告書RECONF20-10-7
  
  Pages : 37-42
- Data Source
  KAKENHI-PROJECT-22300018
[Journal Article] An Error Detect and Correct Circuit Based Fault-tolerant Reconfigurable Logic Device2010
- Author(s)
  Q.Zhao, Y.Ichinomiya, Y.Okamoto, M.Amagasaki, M.Iida, T.Sueyoshi
- Journal Title
  
  Proc.of International Conference on Field-Programmable Technology
  
  Pages : 85-90
- Data Source
  KAKENHI-PROJECT-22300018
[Journal Article] A Robust Reconfigurable Logic Device Based on Less Configuration Memory Logic Cell2010
- Author(s)
  Q.Zhao, Y.Ichinomiya, Y.Okamoto, M.Amagasaki, M.Iida, T.Sueyoshi
- Journal Title
  
  Proc.of International Conference on Field-Programmable Technology
  
  Pages : 162-169
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22300018
[Journal Article] Soft-error Tolerability Analysis for Triplicated Circuit on an FPGA2010
- Author(s)
  Y.Ichinomiya, Motoki Amagasaki, M.Kuga, Toshinori Sueyoshi
- Journal Title
  
  Proc.16th Workshop on Synthesis And System Integration of Mixed Information Technologies
  
  Pages : 448-453
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22300018
[Journal Article] A Less Configuration Memory Reconfigurable Logic Device with Error Detect and Correct Circuit2010
- Author(s)
  Q.Zhao, Y.Ichinomiya, Y.Okamoto, M.Amagasaki, M.Iida, T.Sueyoshi
- Journal Title
  
  Proc.of IEEE Region 10 International Technical Conference
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22300018
[Journal Article] A Case Study of Evaluation Technique for soft error Tolerance on SRAM-based FPGAs2010
- Author(s)
  T.Kimura, N.Kai, M.Amagasaki, M.Iida, M.Kuga, T.Sueyoshi
- Journal Title
  
  Proc.2010 Joint Conference of Electrical and Electronics Engineers in Kyushu
- Data Source
  KAKENHI-PROJECT-22300018
[Journal Article] Improving the Reliability of FPGA system by using TMR and Partial Rconfiguration2010
- Author(s)
  Y.Ichinomiya, M.Amagasaki, M.Iida, M.Kuga, T.Sueyoshi
- Journal Title
  
  Proc.International Workshop on Highly Efficient Accelerators and Reconfigurable Technologies
  
  Pages : 107-112
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22300018
[Journal Article] A Case Study of Soft Error Emulation for SRAM-based FPGA Circuits2010
- Author(s)
  T.Kimura, N.Kai, M.Amagasaki, M.Iida, M.Kuga, T.Sueyoshi
- Journal Title
  
  Proc.2010 Joint Conference of Electrical and Electronics Engineers in Kyushu
- Data Source
  KAKENHI-PROJECT-22300018
[Journal Article] Improving the Robustness of a Softcore Processor against SEUs by using TMR and Partial Reconfiguration2010
- Author(s)
  Y.Ichinomiya, S.Tanoue, M.Amagasaki, M.Iida, M.Kuga, T.Sueyoshi
- Journal Title
  
  Proc.the 18th Annual International IEEE Symposium on Field-Programmable Custom Computing Machines
  
  Pages : 47-54
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22300018
[Journal Article] Clustering Technique to Reduce Chip Area and Delay for FPGA,2007
- Author(s)
  M.Kobata, M.Iida and T.Sueyoshi
- Journal Title
  
  Electronics and Communications in Japan 6(Vol.90)
  
  Pages : 34-46
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-18300015
[Journal Article] A Novel Technique to Design Energy-Efficient Contexts for Reconfigurable Logic Devices2007
- Author(s)
  H.Shinohara, H.Monji, M.Iida and T.Sueyoshi
- Journal Title
  
  IEICE TRANSACTIONS on Information and Systems 12(vol.E90-D)
  
  Pages : 1986-1989
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-18300015
[Journal Article] Evaluating Variable-Grain Logic Cells using Heterogeneous Technology Mapping, P.C.Diniz et.al.2007
- Author(s)
  Kazunori MATSUYAMA, Motoki AMAGASAKI, Hideaki NAKAYAMA, Ryoichi YAMAGUCHI, Masahiro IIDA, Toshinori SUEYOSHI
- Journal Title
  
  (eds.) : Reconfigurable Computing : Architectures, Tools and Applications, Lecture Notes in Computer Science (LNCS)4419, Springer-Verlag Berlin Heidelberg 4419
  
  Pages : 142-154
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-18300015
[Journal Article] 動的再構成システムにおけるFPGA部分再構成技術の適用と評価2007
- Author(s)
  清田享伸, 八並泰一郎, 木佐貫健, 吉廣秀章, 久我守弘, 末吉敏則
- Journal Title
  
  電子情報通信学会技術研究報告 106・458
  
  Pages : 55-60
- Data Source
  KAKENHI-PROJECT-17300021
[Journal Article] 粒度可変構造を持つ再構成論理セル向けマッピング手法の評価2007
- Author(s)
  山口良一, 中山英明, 尼崎太樹, 松山和憲, 飯田全広, 末吉敏則
- Journal Title
  
  第14回FPGA/PLD Design Conference ユーザプレゼンテーション論文集
  
  Pages : 25-32
- Data Source
  KAKENHI-PROJECT-18300015
[Journal Article] Design Start-up for FPGA/PLD 2007/2008 Chapter 1 Basic knowledge of FPGA/PLD2007
- Author(s)
  SUEYOSHI, Toshinori
- Journal Title
  
  CQ PUBLISHING
  
  Pages : 7-14
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-17300021
[Journal Article] System LSI Technology Outlook Part4 Chapter 1 Pantography of FPGA/PLD2007
- Author(s)
  SUEYOSHI, Toshinori
- Journal Title
  
  Electronic Journal
  
  Pages : 140-141
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-17300021
[Journal Article] Evaluating Variable-Grain Logic Cells using Heterogeneous Technology Mapping2007
- Author(s)
  Kazunori MATSUYAMA, Motoki AMABASAKI, Hideaki NAKAYAMA, Ryoichi YAMAGUCHI, Masahiro IIDA, Toshinori SUEYOSHI
- Journal Title
  
  Lecture Notes in Computer Science (LNCS), Springer-Verlag Berlin Heidelberg 4419
  
  Pages : 142-154
- Data Source
  KAKENHI-PROJECT-18300015
[Journal Article] FPGAのチップ面積および遅延を最適化するクラスタリング手法2006
- Author(s)
  木幡雅貴, 飯田全広, 末吉敏則
- Journal Title
  
  信学論 6(vol.J89-D)
  
  Pages : 1153-1162
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-18300015
[Journal Article] Architecture of general purpose reconfigurable logic cell2006
- Author(s)
  M.Amagasaki, N.Hamabe, H.Nakayama, M.Iida, T.Sueyoshi
- Journal Title
  
  Proc.21th Commemorative International Technical Conference on Circuits/Systems, Computers and Communications Vol.2
  
  Pages : 1-4
- Data Source
  KAKENHI-PROJECT-17300021
[Journal Article] Evaluation of variable grain logic cell architecture for reconfigurable device2006
- Author(s)
  M.Amagasaki, T.Shimokawa, K.Matsuyama, R.Yamaguchi, H.Nakayama, N.Hamabe, M.Iida, T.Sueyoshi
- Journal Title
  
  Proc.14th IFIP International Conference on Very Large Scale Integration (VLSI-SoC2006)
  
  Pages : 198-203
- Data Source
  KAKENHI-PROJECT-17300021
[Journal Article] FPGA搭載機器のための自己更新機構の開発2006
- Author(s)
  牛嶋和行, 永田和生, 原田英雄, 久我守弘, 末吉敏則
- Journal Title
  
  電子情報通信学会技術研究報告 106・247
  
  Pages : 1-6
- Data Source
  KAKENHI-PROJECT-17300021
[Journal Article] 動的再構成システムにおける複数アプリケーション間の機能共有実装の一検討2006
- Author(s)
  吉廣秀章, 木佐貫健, 八並泰一郎, 清田享伸, 久我守弘, 末吉敏則
- Journal Title
  
  電子情報通信学会技術研究報告 106・394
  
  Pages : 61-66
- Data Source
  KAKENHI-PROJECT-17300021
[Journal Article] EXPRESS-1 : プロセッサ混載FPGAを用いた動的セルフリコンフィギャラブルシステム2006
- Author(s)
  柴村英智, 飯田全広, 久我守弘, 末吉敏則
- Journal Title
  
  電子情報通信学会論文誌(D) J89-D・6
  
  Pages : 1120-1129
- Data Source
  KAKENHI-PROJECT-17300021
[Journal Article] 配線共有型マルチコンテキスト手法を用いた低消費電力化2006
- Author(s)
  門司秀明, 篠原拓, 飯田全広, 末吉敏則
- Journal Title
  
  電子情報通信学会技術研究報告 RECONF2006-50 106・394
  
  Pages : 67-42
- Data Source
  KAKENHI-PROJECT-18300015
[Journal Article] 粒度可変構造を持つ再構成可能論理セル向けテクノロジマッピング手法2006
- Author(s)
  中山英明, 山口良一, 尼崎太樹, 松山和憲, 飯田全広, 末吉敏則
- Journal Title
  
  電子情報通信学会技術研究報告 RECONF2006-55 106・394
  
  Pages : 67-72
- Data Source
  KAKENHI-PROJECT-18300015
[Journal Article] FPGAのチップ面積および遅延を最適化するクラスタリング手法2006
- Author(s)
  木幡雅貴, 飯田全広, 末吉敏則
- Journal Title
  
  電子情報通信学会論文誌 J89-D
  
  Pages : 1120-1129
- Data Source
  KAKENHI-PROJECT-18300015
[Journal Article] OHM HEADLINE REVIEW 2006, Part III Information and Communication III-7 FPGA's world filled with new possibility2006
- Author(s)
  SUEYOSHI, Toshinori
- Journal Title
  
  Ohmsha
  
  Pages : 174-175
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-17300021
[Journal Article] 粒度可変構造を持つ再構成論理セル向けマッピング手法の一検討2006
- Author(s)
  山口良一, 松山和憲, 中山英明, 尼崎太樹, 飯田全広, 末吉敏則
- Journal Title
  
  電子情報通信学会技術研究報告 RECONF2006-1(2006-05) 106・49
  
  Pages : 1-6
- Data Source
  KAKENHI-PROJECT-18300015
[Journal Article] A low power design method using multi-context dynamic reconfiguration2005
- Author(s)
  S.Imai, M.Iida, T.Sueyoshi
- Journal Title
  
  Proc.of 20th Commemorative International Technical Conference on Circuits/Systems, Computers andcommunications(ITC-CSCC2005) Vol.2
  
  Pages : 563-564
- Data Source
  KAKENHI-PROJECT-17300021
[Journal Article] Development of a Run-Time Reconfigurable System using Partially econfigurable FPGA2005
- Author(s)
  I.Sakamoto, T.Susaki, H.Shibamura, M.Iida, M.Kuga, T.Sueyoshi
- Journal Title
  
  Proc.of 20th Commemorative International Technical Conference on Circuits/Systems, Computers andcommunications(ITC-CSCC2005) Vol.2
  
  Pages : 599-600
- Data Source
  KAKENHI-PROJECT-17300021
[Journal Article] Applying the Small-World Network to Routing Structure of FPGAs2005
- Author(s)
  H.Tsukiashi, M.Iida, T.Sueyoshi
- Journal Title
  
  Proc.of 15th International Conference on Field Programmable Logic and Applications(FPL2005)
  
  Pages : 65-70
- Data Source
  KAKENHI-PROJECT-17300021
[Journal Article] 粒度可変構造を持つ再構成論理セルを用いた基本演算回路の実装2005
- Author(s)
  濱邊直人, 中山英明, 尼崎太樹, 飯田全広, 末吉敏則
- Journal Title
  
  電子情報通信学会技術研究報告 RECONF2005-54 Vol.105, No.450
  
  Pages : 7-12
- Data Source
  KAKENHI-PROJECT-17300021
[Journal Article] 粒度可変構造を持つ再構成論理セルアーキテクチャの提案2005
- Author(s)
  尼崎太樹, 中山英明, 濱邊直人, 飯田全広, 末吉敏則
- Journal Title
  
  電子情報通信学会技術研究報告 RECONF2005-53 Vol.105, No.450
  
  Pages : 1-6
- Data Source
  KAKENHI-PROJECT-17300021
[Journal Article] Adopting the Small-World Network in Routing Structure of FPGA2005
- Author(s)
  M.Iida, S.Abe, H.Tsukiashi, R.Ogata, T.Sueyoshi
- Journal Title
  
  International Workshop on Applied Reconfigurable Computing 2005 (ARC 2005)
  
  Pages : 92-98
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-14390041
[Journal Article] Design Start-up for FPGA/PLD 2005/2006 Chapter 1 Basic knowledge of FPGA/PLD2005
- Author(s)
  SUEYOSHI, Toshinori
- Journal Title
  
  CQ PUBLISHING
  
  Pages : 7-14
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-17300021
[Journal Article] 2005 System LSI Technology Outlook, Part4 Chapter 1 Pantography of FPGA/PLD2005
- Author(s)
  SUEYOSHI, Toshinori
- Journal Title
  
  Electronic Journal
  
  Pages : 124-125
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-17300021
[Journal Article] Reconfigurable Systems2005
- Author(s)
  SUEYOSHI, Toshinori, AMANO, Hideharu
- Journal Title
  
  Ohmsha
  
  Pages : 279-279
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-17300021
[Journal Article] Adopting the Small-World Network in Routing Structure of FPGA2005
- Author(s)
  M.Iida, S.Abe, H.Tsukiashi, R.Ogata, T.Sueyoshi
- Journal Title
  
  International Workshop on Applied Reconfigurable Computing 2005 (ARC2005)
  
  Pages : 92-98
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-14390041
[Journal Article] EXPRESS-1 : A Dynamically Reconfigurable Platform using Embedded Processor FPGA2004
- Author(s)
  H.Shibamura, M.Fukuyama, D.Uchida, S.Ikeda, M.Kuga, T.Sueyoshi
- Journal Title
  
  2004 IEEE International Conference on Field-Programmable Technology (FPT2004)
  
  Pages : 209-216
- Data Source
  KAKENHI-PROJECT-14390041
[Journal Article] リモート・ロジックアナライザIPのFPGA実装と評価2004
- Author(s)
  池田征司, 永田和生, 柴村英智, 久我守弘, 末吉敏則
- Journal Title
  
  電子情報通信学会技術報告(デザインガイア2004) Vol.104・No.476
  
  Pages : 65-70
- Data Source
  KAKENHI-PROJECT-14390041
[Journal Article] FPGA Remote-Reconfiguration and Remote Logic Analyzer2004
- Author(s)
  K.Nagata, K.Tashiro, H.Shibamura, M.Kuga, T.Sueyoshi
- Journal Title
  
  The 2004 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2004)
- Data Source
  KAKENHI-PROJECT-14390041
[Journal Article] 次世代リコンフィギャラブル・ロジック向けクラスタリングツールの開発2004
- Author(s)
  池田裕介, 木幡雅貴, 飯田全広, 末吉敏則
- Journal Title
  
  第17回回路とシステム軽井沢ワークショップ論文集
  
  Pages : 242-252
- Data Source
  KAKENHI-PROJECT-14390041
[Journal Article] FPGA Remote-Reconfiguration and Remote Logic Analyzer2004
- Author(s)
  K.Nagata, K.Tashiro, H.Shibamura, M.Kuga, T.Sueyoshi
- Journal Title
  
  The 2004 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2004) 6D3L-5
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-14390041
[Journal Article] EXPRESS-1 : A Dynamically Reconfigurable Platform using Embedded Processor FPGA2004
- Author(s)
  H.Shibamura, M.Fukuyama, D.Uchida, S.Ikeda, M.Kuga, T.Sueyoshi
- Journal Title
  
  2004 IEEE International Conference on Field-Programmable Technology (FPT 2004)
  
  Pages : 209-216
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-14390041
[Journal Article] EXPRESS-1:A Dynamically Reconfigurable Platform using Embedded Processor FPGA2004
- Author(s)
  H.Shibamura, M.Fukuyama, D.Uchida, S.Ikeda, M.Kuga, T.Sueyoshi
- Journal Title
  
  2004 IEEE International Conference on Field-Programmable Technology (FPT2004)
  
  Pages : 209-216
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-14390041
[Journal Article] FPGA Remote-Reconfiguration and Remote Logic Analyzer2004
- Author(s)
  K.Nagata, K.Tashiro, H.Shibamura, N.Kuga, T.Sueyoshi
- Journal Title
  
  The 2004 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2004)
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-14390041
[Journal Article] 動的再構成システムのための機能ローディング機構の開発2004
- Author(s)
  内田大輔, 福山真幸, 池田征司, 柴村英智, 久我守弘, 末吉敏則
- Journal Title
  
  電子情報通信学会コンピュータシステム研究専門委員会所属第2種研究会第4回リコンフィギャラブルシステム研究会論文集
  
  Pages : 162-172
- Data Source
  KAKENHI-PROJECT-14390041
[Journal Article] A Reconfigurable Computing System using ARM Embedded Processor2003
- Author(s)
  H.Shibamura, N.Hashiguchi, D.Uchida, M.Kuga, T.Sueyoshi
- Journal Title
  
  Forum on Information Technology (FIT 2003) LC-002
  
  Pages : 49-51
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-14390041
[Journal Article] A Shape Evaluation of Circuit Area for Reconfigurable Logic Device2003
- Author(s)
  Masahiro Iida, Toshinori Sueyoshi
- Journal Title
  
  The 2004 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2003) Vol.3
  
  Pages : 1595-1598
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-14390041
[Journal Article] A Reconfigurable Computing System using ARM Embedded Processor2003
- Author(s)
  H.Shibamura, N.Hashiguchi, D.Uchida, M.Kuga, T.Sueyoshi
- Journal Title
  
  第2回情報科学技術フォーラム Forum on Information Technology (FIT2003)情報技術レターズ LC-002
  
  Pages : 49-51
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-14390041
[Journal Article] A Shape Evaluation of Circuit Area for Reconfigurable Logic Device2003
- Author(s)
  Nasahiro Iida, Toshinori Sueyoshi
- Journal Title
  
  The 2003 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2003) Vol.3
  
  Pages : 1595-1598
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-14390041
[Journal Article] Proposal and Evaluation of a Logic Block Architecture for Reconfigurable Logic2002
- Author(s)
  Masahiro Iida, Toshinori Sueyoshi
- Journal Title
  
  IPSJ Journal Vol.43, No.5
  
  Pages : 1181-1190
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-14390041
[Journal Article] リコンフィギャラブル・ロジック向き論理ブロックの提案と評価2002
- Author(s)
  飯田全広, 末吉敏則
- Journal Title
  
  情報処理学会論文誌 43-5
  
  Pages : 1181-1190
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-14390041
[Presentation] An Automatic Design and Implementation Framework for Reconfigurable Logic IP Core2013
- Author(s)
  Q.Zhao, M.Amagasaki, M.Iida, M.Kuga and T.Sueyoshi
- Organizer
  23th International Conference on Field Programmable Logic and Applications (FPL2013)
- Place of Presentation
  Porto, Porutugal
- Data Source
  KAKENHI-PROJECT-23300017
[Presentation] DEFECT-ROBUST FPGA ARCHITECTURES FOR INTELLECTUAL PROPERTY CORES IN SYSTEM LSI2013
- Author(s)
  M.Amagasaki, Kazuki Inoue, Qian Zhao, M.Iida, M.Kuga and T.Sueyoshi
- Organizer
  23th International Conference on Field Programmable Logic and Applications (FPL2013)
- Place of Presentation
  Porto, Porutugal
- Data Source
  KAKENHI-PROJECT-23300017
[Presentation] An FPGA design and implementation framework combined with commercial VLSI CADs2013
- Author(s)
  Qian Zhao, M.Amagasaki, M.Iida, M.Kuga and T.Sueyoshi
- Organizer
  International Workshop on Reconfigurable Communication-centric Systems-on-Chip(ReCoSoC2013)
- Place of Presentation
  Darmstadt, Germany
- Data Source
  KAKENHI-PROJECT-23300017
[Presentation] An Automatic Design and Implementation Framework for Reconfigurable Logic IP Core2013
- Author(s)
  Qian Zhao, M.Amagasaki, M.Iida, M.Kuga and T.Sueyoshi
- Organizer
  International Conference on ENGINEERING OF RECONFIGURABLE SYSTEMS AND ALGORITHMS(ERSA2013)
- Place of Presentation
  Las Vegas, Nevada, USA
- Data Source
  KAKENHI-PROJECT-23300017
[Presentation] AN FPGA DESIGN AND IMPLEMENTATION FRAMEWORK COMBINED WITH COMMERCIAL VLSI CADS2013
- Author(s)
  Qian Zhao, M.Amagasaki, M.Iida, M.Kuga and T.Sueyoshi
- Organizer
  Proc. 8th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC2013)
- Place of Presentation
  Darmstadt, Germany
- Year and Date
  2013-07-11
- Data Source
  KAKENHI-PROJECT-23300017
[Presentation] A Novel FPGA Design Framework with VLSI Post-routing erformance Analysis2013
- Author(s)
  Q.Zhao, K.Inoue, M.Amagasaki, M.Iida, M.Kuga and T.Sueyoshi
- Organizer
  Proc. 21st ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA2013)
- Place of Presentation
  Monterey, California
- Year and Date
  2013-02-12
- Data Source
  KAKENHI-PROJECT-23300017
[Presentation] An Automatic Design and Implementation Framework for Reconfigurable Logic IP Core2013
- Author(s)
  Q.Zhao, M.Amagasaki, M.Iida, M.Kuga and T.Sueyoshi
- Organizer
  Proc. of 23th International Conference on Field Programmable Logic and Applications (FPL2013)
- Place of Presentation
  Porto, Portugal
- Year and Date
  2013-09-04
- Data Source
  KAKENHI-PROJECT-23300017
[Presentation] DEFECT-ROBUST FPGA ARCHITECTURES FOR INTELLECTUAL PROPERTY CORES IN SYSTEM LSI2013
- Author(s)
  M.Amagasaki, Kazuki Inoue, Qian Zhao, M.Iida, M.Kuga and T.Sueyoshi
- Organizer
  Proc. of 23th International Conference on Field Programmable Logic and Applications (FPL2013)
- Place of Presentation
  Porto, Portugal
- Year and Date
  2013-09-02
- Data Source
  KAKENHI-PROJECT-23300017
[Presentation] An Automatic Design and Implementation Framework for Reconfigurable Logic IP Core2013
- Author(s)
  Qian Zhao, M.Amagasaki, M.Iida, M.Kuga and T.Sueyoshi
- Organizer
  Proc. International Conference on ENGINEERING OF RECONFIGURABLE SYSTEMS AND ALGORITHMS (ERSA2013)
- Place of Presentation
  Las Vegas, Nevada, USA
- Year and Date
  2013-07-22
- Data Source
  KAKENHI-PROJECT-23300017
[Presentation] FPGA システムのソフトエラー耐性評価におけるブートストラップ法による高速化2012
- Author(s)
  高野光平,一ノ宮佳裕,尼崎太樹,久我守弘,飯田全広,末吉敏則
- Organizer
  信学技報 RECONF2012-45
- Place of Presentation
  立命館大学(草津)
- Year and Date
  2012-09-19
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] Fault Detection and Avoidance of FPGA inVarious Granularities2012
- Author(s)
  M.Fujino, H.Tanaka, Y.Ichinomiya,M.Kuga, M.Iida, M.Amagasaki andT.Sueyoshi
- Organizer
  Proc. of 12th International Conference onAlgorithms and Architectures for ParallelProcessing(ICA3PP-12)
- Place of Presentation
  九州産業大学(福岡)
- Year and Date
  2012-09-07
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] A bitstream relocation technique toimprove flexibility of partialreconfiguration2012
- Author(s)
  Y.Ichinomiya, M.Amagasaki, M.Iida,M.Kuga and T.Sueyoshi
- Organizer
  Proc. of 12th International Conference onAlgorithms and Architectures for ParallelProcessing(ICA3PP-12)
- Place of Presentation
  九州産業大学(福岡)
- Year and Date
  2012-09-07
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] Accelerated evaluation of SEUfailure-in-time using frame-based partialreconfiguration2012
- Author(s)
  Y.Ichinomiya, K.Takano, M.Amagasaki,M.Kuga, M.Iida and T.Sueyoshi
- Organizer
  Proc. InternationalConference on Field ProgrammableTechnology(ICFPT2012)
- Place of Presentation
  Seoul(Korea)
- Year and Date
  2012-12-11
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] Self-repair Technique using SpareResource in TMR Softcore ProcessorSystem2012
- Author(s)
  H.Tanaka, Y.Ichinomiya, M.Amagasaki,M.Kuga, M.Iida and T.Sueyoshi
- Organizer
  Proc. 2012 Joint Conference ofElectrical and Electronics Engineers inKyusyu
- Place of Presentation
  長崎大学(長崎)
- Year and Date
  2012-09-24
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] 単一 FPGA 内における三重冗長モジュールの動的再配置によるハードエラー回避手法2012
- Author(s)
  田中宏樹,一ノ宮佳裕,宇佐川貞幹,尼崎太樹,飯田全広,久我守弘,末吉敏則
- Organizer
  信学技報 RECONF2012-11
- Place of Presentation
  沖縄県男女共同参画センター(那覇)
- Year and Date
  2012-05-29
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] システムの高信頼化に向けたSupervisor Processorの一検討2012
- Author(s)
  藤野誠, 一ノ宮佳裕, 久我守弘, 尼崎太樹, 飯田全広, 末吉敏則
- Organizer
  電子情報通信学会CPSY研究会
- Place of Presentation
  ホテル松島大観荘(宮城県)
- Year and Date
  2012-03-03
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] A Novel Physical Defects Recovery Technique for FPGA-IP cores2012
- Author(s)
  Y.Nishitani, K.Inoue, Motoki Amagasaki, M.Iida, M.Kuga and T.Sueyoshi
- Organizer
  Proc. International Conference on Reconfigurable Computing and FPGAs (ReConFig2012)
- Place of Presentation
  Cancun, Mexico
- Data Source
  KAKENHI-PROJECT-23300017
[Presentation] Accelerated evaluation of SEU failure-in-time using frame-based partial reconfiguration2012
- Author(s)
  Y.Ichinomiya, K.Takano, M.Amagasaki, M.Kuga, M.Iida and T.Sueyoshi
- Organizer
  Proc. International Conference on Field Programmable Technology(ICFPT2012)
- Place of Presentation
  Seoul, Korea
- Data Source
  KAKENHI-PROJECT-23300017
[Presentation] 動的部分再構成を用いたソフトエラー耐性評価手法2012
- Author(s)
  高野光平,木村剛士,一ノ宮佳裕,尼崎太樹,久我守弘,飯田全広,末吉敏則
- Organizer
  LSI とシステムのワークショップ 2012 予稿集
- Place of Presentation
  北九州国際会議場(北九州)
- Year and Date
  2012-05-29
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] Fault Detection and Avoidance of FPGA in Various Granularities2012
- Author(s)
  K.Inoue, Y.Nishitani, M.Amagasaki, M.Iida and T.Sueyoshi
- Organizer
  Proc. 22th International Conference on Field Programmable Logic and Applications (FPL2012)
- Place of Presentation
  Oslo, Norway
- Year and Date
  2012-08-29
- Data Source
  KAKENHI-PROJECT-23300017
[Presentation] Evaluation of fault tolerant technique based on homogeneous FPGA architecture2012
- Author(s)
  Y.Nishitani, K.Inoue, M.Amagasaki, M.Iida, M.Kuga and T.Sueyoshi
- Organizer
  Proc. the 20th IFIP International Conference on Very Large Scale Integration
- Place of Presentation
  Santa Cruz, CA, USA
- Year and Date
  2012-10-10
- Data Source
  KAKENHI-PROJECT-23300017
[Presentation] A Novel Physical Defects Recovery Technique for FPGA-IP cores2012
- Author(s)
  Y.Nishitani, K.Inoue, M.Amagasaki, M.Iida, M.Kuga and T.Sueyoshi
- Organizer
  Proc. International Conference on Reconfigurable Computing and FPGAs (ReConFig2012)
- Place of Presentation
  Cancun, Mexico
- Year and Date
  2012-12-06
- Data Source
  KAKENHI-PROJECT-23300017
[Presentation] Fault Detection and Avoidance of FPGA in Various Granularities2012
- Author(s)
  K.Inoue, Y.Nishitani, M.Amagasaki, M.Iida and T.Sueyoshi
- Organizer
  Proc. 22th International Conference on Field Programmable Logic and Applications (FPL2012)
- Place of Presentation
  Oslo, Norway
- Data Source
  KAKENHI-PROJECT-23300017
[Presentation] Evaluation of fault tolerant technique based on homogeneous FPGA architecture2012
- Author(s)
  Y.Nishitani, K.Inoue, Motoki Amagasaki, M.Iida, M.Kuga and T.Sueyoshi
- Organizer
  Proc. the 20th IFIP International Conference on Very Large Scale Integration (VLSI-SoC2012)
- Place of Presentation
  Santa Cruz, USA
- Data Source
  KAKENHI-PROJECT-23300017
[Presentation] Designing flexible reconfigurable regions to relocate partial bitstreams2012
- Author(s)
  Y.Ichinomiya, S.Usagawa, M.Amagasaki, M.Iida, M.Kuga and T.Sueyoshi,
- Organizer
  Proc. the 20th Annual International IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM2012)
- Place of Presentation
  Toronto, Canada
- Data Source
  KAKENHI-PROJECT-23300017
[Presentation] システムの高信頼化に向けた SupervisorProcessor の一検討2012
- Author(s)
  藤野誠,一ノ宮佳裕,久我守弘,尼崎太樹,飯田全広,末吉敏則
- Organizer
  学技報 CPSY2011-92
- Place of Presentation
  ホテル松島大観荘(仙台)
- Year and Date
  2012-03-03
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] Designing flexible reconfigurableregions to relocate partial bitstreams2012
- Author(s)
  Y.Ichinomiya, S.Usagawa, M.Amagasaki,M.Iida, M.Kuga and T.Sueyoshi
- Organizer
  Proc. the 20th Annual International IEEESymposium on Field-Programmable Custom Computing Machines (FCCM2012)
- Place of Presentation
  Toronto, Canada(USA)
- Year and Date
  2012-05-01
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] An Easily Testable Routing Architecture of FPGA2011
- Author(s)
  M.Iida, K.Inoue, M.Amagasaki, T.Sueyoshi
- Organizer
  19th IFIP International Conference on Very Large Scale Integration (VLSI-SoC2011)
- Place of Presentation
  Hong Cong, Chaina
- Year and Date
  2011-10-03
- Data Source
  KAKENHI-PROJECT-23300017
[Presentation] \AN EASILY TESTABLE ROUTING ARCHITECTURE AND EFFICIENT TEST TECHNIQUE2011
- Author(s)
  K.Inoue, H.Yosho, M.Amagasaki, M.Iida, T.Sueyoshi
- Organizer
  21th International Conference on Field Programmable Logic and Applications (FPL2011)
- Place of Presentation
  Chania, Greece
- Year and Date
  2011-09-06
- Data Source
  KAKENHI-PROJECT-23300017
[Presentation] ソフトコアプロセッサシステムの高信頼化に向けたコンテキスト同期手法2011
- Author(s)
  藤野誠, 甲斐統貴, 一ノ宮佳裕, 尼崎太樹, 久我守弘, 末吉敏則
- Organizer
  電子情報通信学会RECONF研究会
- Place of Presentation
  北海道大学(北海道)
- Year and Date
  2011-05-12
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] FPGAにおける二重冗長ソフトコアプロセッサの高信頼化手法2011
- Author(s)
  山本千重子, 白石恭平, 一ノ宮佳裕, 尼崎太樹, 久我守弘, 末吉敏則
- Organizer
  情報処理学会九州支部若手の会セミナー
- Place of Presentation
  パレスイン鹿児島(鹿児島県)
- Year and Date
  2011-09-17
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] 動的再構成システムに向けた部分再構成データの再配置に関する一検討2011
- Author(s)
  宇佐川貞幹, 一ノ宮佳裕, 尼崎太樹, 飯田全広, 久我守弘, 末吉敏則
- Organizer
  電子情報通信学会RECONF研究会
- Place of Presentation
  名古屋大学(愛知県)
- Year and Date
  2011-09-26
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] 二重冗長ソフトコアプロセッサにおけるソフトエラーの高速復旧技術2011
- Author(s)
  一ノ宮佳裕, 藤野誠, 尼崎太樹, 久我守弘, 飯田全広, 末吉敏則
- Organizer
  電子情報通信学会RECONF研究会
- Place of Presentation
  ニューウェルシティ宮崎(宮崎県)
- Year and Date
  2011-11-28
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] LUT間の入力共有に基づく小面積論理クラスク構造の一提案2011
- Author(s)
  高橋知也, 井上万輝, 尼崎太樹, 飯田全広, 久我守弘, 末吉敏則
- Organizer
  IEICEリコンフィギャラブルシステム研究会
- Place of Presentation
  名古屋大学
- Year and Date
  2011-09-26
- Data Source
  KAKENHI-PROJECT-23300017
[Presentation] AN EASILY TESTABLE ROUTING ARCHITECTURE AND EFFICIENT TEST TECHNIQUE2011
- Author(s)
  K.Inoue, H.Yosho, M.Amagasaki, M.Iida and T.Sueyoshi
- Organizer
  Proc. 21th International Conference on Field Programmable Logic and Applications (FPL2011)
- Place of Presentation
  Chania, Greece
- Year and Date
  2011-09-06
- Data Source
  KAKENHI-PROJECT-23300017
[Presentation] An Easily Testable Routing Architecture of FPGA2011
- Author(s)
  M.Iida, K.Inoue, M.Amagasaki and T.Sueyoshi
- Organizer
  Proc. the 19th IFIP International Conference on Very Large Scale Integration (VLSI-SoC2011)
- Place of Presentation
  Hong Cong, China
- Year and Date
  2011-10-03
- Data Source
  KAKENHI-PROJECT-23300017
[Presentation] 二重冗長ソフトコアプロセッサにおけるソフトエラーの高速復旧技術2011
- Author(s)
  一ノ宮佳裕,藤野誠,尼崎太樹,久我守弘,飯田全広,末吉敏則
- Organizer
  信学技報 RECONF2011-42
- Place of Presentation
  ニューウェルシティ宮崎(宮崎)
- Year and Date
  2011-11-28
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] Reliable Softcore Processor System using TMR and Dynamic Reconguration2011
- Author(s)
  M.Fujino, Y.Ichinomiya, M.Amagasaki, M.Kuga, M.Iida, T.Sueyoshi
- Organizer
  Joint Conference of Electrical and Electronics Engineers in Kyushu
- Place of Presentation
  佐賀大学(佐賀県)
- Year and Date
  2011-09-26
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] A Case Study of Dependability Estimation for SRAM-based FPGA Circuits2011
- Author(s)
  T.Kimura, Y.Ichinomiya, M.Koga, M.Amagasaki, M.Kuga, T.Sueyoshi
- Organizer
  International Student Conference on Advanced Science and Technology
- Place of Presentation
  山東大学(中国)
- Year and Date
  2011-09-23
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] Reliable Softcore Procesor System usingTMR and Dynamic Reconguration2011
- Author(s)
  M.Fujino, Y.Ichinomiya, M.Amagasaki,M.Kuga, M.Iida and T.Sueyoshi
- Organizer
  Proc. 2011 Joint Conference of Electricaland Electronics Engineers in Kyusyu
- Place of Presentation
  佐賀大学(佐賀)
- Year and Date
  2011-09-26
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] A Case Study of Dependability Estimationfor SRAM-based FPGA Circuits2011
- Author(s)
  T.Kimura, Y.Ichinomiya, M.Koga,M.Amagasaki, M.Kuga and T.Sueyoshi
- Organizer
  Proc. the6th International Student Conference onAdvanced Science and Technology(ICAST)
- Place of Presentation
  Jinan(China)
- Year and Date
  2011-09-23
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] 動的再構成システムに向けた部分再構成データの再配置に関する一検討2011
- Author(s)
  宇佐川貞幹,一ノ宮佳裕,尼崎太樹,飯田全広,久我守弘,末吉敏則
- Organizer
  信学技報 RECONF2011-30
- Place of Presentation
  名古屋大学(名古屋)
- Year and Date
  2011-09-26
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] ソフトコアプロセッサシステムの高信頼化に向けたコンテキスト同期手法2011
- Author(s)
  藤野誠,甲斐統貴,一ノ宮佳裕,尼崎太樹,久我守弘,末吉敏則
- Organizer
  信学技報 RECONF2011-5
- Place of Presentation
  北海道大学(札幌)
- Year and Date
  2011-05-12
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] FPGA における二重冗長ソフトコアプロセッサの高信頼化手法2011
- Author(s)
  山本千重子,白石恭平,一ノ宮佳裕,尼崎太樹,久我守弘,末吉敏則
- Organizer
  若手の会セミナー2011 講演論文集, 情報処理学会九州支部
- Place of Presentation
  パレスインホテル鹿児島(鹿児島)
- Year and Date
  2011-09-17
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] A Case Study of Evaluation Technique for soft error Tolerance on SRAM-based FPGAs2010
- Author(s)
  T.Kimura, N.Kai, M.Amagasaki, M.Iida, M.Kuga, T.Sueyoshi
- Organizer
  Proc.of IEEE Region 10 International Technical Conference
- Place of Presentation
  福岡国際会議場(福岡市)
- Year and Date
  2010-11-22
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] A Robust Reconfigurable Logic Device Based on Less Configuration Memory Logic Cell2010
- Author(s)
  Q.Zhao, Y.Ichinomiya, Y.Okamoto, M.Amagasaki, M.Iida, T.Sueyoshi
- Organizer
  Proc.of International Conference on Field-Programmable Technology
- Place of Presentation
  清華大学(中国)
- Year and Date
  2010-12-09
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] A Case Study of Soft Error Emulation for SRAM-based FPGA Circuits2010
- Author(s)
  T.Kimura, N.Kai, M.Amagasaki, M.Iida, M.Kuga, T.Sueyoshi
- Organizer
  Proc.2010 Joint Conference of Electrical and Electronics Engineers in Kyushu
- Place of Presentation
  九州産業大学
- Year and Date
  2010-09-25
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] A Less Configuration Memory Reconfigurable Logic Device with Error Detect and Correct Circuit2010
- Author(s)
  Q.Zhao, Y.Ichinomiya, Y.Okamoto, M.Amagasaki, M.Iida, T.Sueyoshi
- Organizer
  Proc.of IEEE Region 10 International Technical Conference
- Place of Presentation
  福岡国際会議場(福岡市)
- Year and Date
  2010-11-22
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] Improving the Robustness of a Softcore Processor against SEUs by using TMR and Partial Reconfiguration2010
- Author(s)
  Y.Ichinomiya, S.Tanoue, M.Amagasaki, M.Iida, M.Kuga, T.Sueyoshi
- Organizer
  Proc.the 18th Annual International IEEE Symposium on Field-Programmable Custom Computing Machines
- Place of Presentation
  Hilton Charlotte University Place(USA)
- Year and Date
  2010-05-03
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] Improving the Reliability of FPGA system by using TMR and Partial Rconfiguration2010
- Author(s)
  Y.Ichinomiya, M.Amagasaki, M.Iida, M.Kuga, T.Sueyoshi
- Organizer
  Proc.International Workshop on Highly Efficient Accelerators and Reconfigurable Technologies
- Place of Presentation
  つくば国際会議場(つくば市)
- Year and Date
  2010-06-01
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] SRAM型FPGA上の実装回路におけるソフトエラー耐性評価手法の一検討2010
- Author(s)
  木村剛士, 甲斐統貴, 堤喜章, 尼崎太樹, 久我守弘, 末吉敏則
- Organizer
  電子情報通信学会技術研究報告書RECONF2010-7
- Place of Presentation
  やすらぎ伊王島(長崎市)
- Year and Date
  2010-05-13
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] Soft-error Tolerability Analysis for Triplicated Circuit on an FPGA2010
- Author(s)
  Y.Ichinomiya, Motoki Amagasaki, M.Kuga, Toshinori Sueyoshi
- Organizer
  Proc.16th Workshop on Synthesis And System Integration of Mixed Information Technologies
- Place of Presentation
  Grand Formosa Regent Taipei(台湾)
- Year and Date
  2010-10-19
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] An Error Detect and Correct Circuit Based Fault-tolerant Reconfigurable Logic Device2010
- Author(s)
  Q.Zhao, Y.Ichinomiya, Y.Okamoto, M.Amagasaki, M.Iida, T.Sueyoshi
- Organizer
  電子情報通信学会技術研究報告書RECONF2010-32
- Place of Presentation
  静岡大学
- Year and Date
  2010-09-17
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] Improving the Robustness ofs a SoftcoreProcessor against SEUs by using TMR andPartial Reconfiguration2010
- Author(s)
  Y.Ichinomiya, S.Tanoue, M.Amagasaki,M.Iida, M.Kuga and T.Sueyoshi
- Organizer
  Proc. the 18thAnnual International IEEE Symposium onField-Programmable Custom ComputingMachines (FCCM2010)
- Place of Presentation
  Charlotte, North Carolina(USA)
- Year and Date
  2010-05-03
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] A Case Study of Soft Error Emulation forSRAM-based FPGA Circuits2010
- Author(s)
  T.Kimura, N.Kai, M.Amagasak, M.Kugaand T.Sueyoshi
- Organizer
  Proc. 2010Joint Conference of Electrical andElectronics Engineers in Kyusyu
- Place of Presentation
  九州産業大学(福岡)
- Year and Date
  2010-09-25
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] SRAM 型 FPGA 上の実装回路におけるソフトエラー耐性評価手法の一検討2010
- Author(s)
  木村剛士,甲斐統貴,堤喜章,尼崎太樹,久我守弘,末吉敏則
- Organizer
  信学技報 RECONF2010-7
- Place of Presentation
  やすらぎ伊王島(長崎)
- Year and Date
  2010-05-13
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] Soft-error Tolerability Analysis forTriplicated Circuit on an FPGA2010
- Author(s)
  Y.Ichinomiya, M.Amagasaki, M.Kuga andT.Sueyoshi
- Organizer
  Proc. the16th Workshop on Synthesis And SystemIntegration of Mixed InformationTechnologies (SASIMI2010)
- Place of Presentation
  Taipei(Taiwan)
- Year and Date
  2010-10-19
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] A Case Study of Evaluation Technique forSoft error Tolerance on SRAM-based FPGAs2010
- Author(s)
  T.Kimura, N.Kai, M.Amagasaki, M.Kugaand T.Sueyoshi
- Organizer
  Proc. of IEEE Region 10 InternationalTechnical Conference (TENCON2010)
- Place of Presentation
  福岡国際会議場(福岡)
- Year and Date
  2010-11-22
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] A bitstream relocation technique to improve flexibility of partial reconfiguration
- Author(s)
  Y.Ichinomiya, M.Amagasaki, M.Iida, M.Kuga and T.Sueyoshi
- Organizer
  Proc. of 12th International Conference on Algorithms and Architectures for Parallel Processing(ICA3PP-12)
- Place of Presentation
  Kyushu Sangyo University, Fukuoka, Japan
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] Fault Detection and Avoidance of FPGA in Various Granularities
- Author(s)
  M.Fujino, H.Tanaka, Y.Ichinomiya, M.Kuga, M.Iida, M.Amagasaki and T.Sueyoshi
- Organizer
  Proc. of 12th International Conference on Algorithms and Architectures for Parallel Processing(ICA3PP-12)
- Place of Presentation
  Kyushu Sangyo University, Fukuoka, Japan
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] Designing flexible reconfigurable regions to relocate partial bitstreams
- Author(s)
  Y.Ichinomiya, S.Usagawa, M.Amagasaki, M.Iida, M.Kuga and T.Sueyoshi,
- Organizer
  Proc. the 20th Annual International IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM2012)
- Place of Presentation
  Toronto, Canada
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] FPGAシステムのソフトエラー耐性評価におけるブートストラップ法による高速化
- Author(s)
  高野光平，一ノ宮佳裕，尼崎太樹，久我守弘，飯田全広，末吉敏則
- Organizer
  信学技報 RECONF2012-45
- Place of Presentation
  立命館大，草津市，滋賀
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] 単一FPGA内における三重冗長モジュールの動的再配置によるハードエラー回避手法
- Author(s)
  田中宏樹，一ノ宮佳裕，宇佐川貞幹，尼崎太樹，飯田全広，久我守弘，末吉敏則
- Organizer
  信学技報 RECONF2012-11
- Place of Presentation
  沖縄県男女共同参画センター，那覇，沖縄
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] Accelerated evaluation of SEU failure-in-time using frame-based partial reconfiguration
- Author(s)
  Y.Ichinomiya, K.Takano, M.Amagasaki, M.Kuga, M.Iida and T.Sueyoshi
- Organizer
  Proc. International Conference on Field Programmable Technology(ICFPT2012)
- Place of Presentation
  Seoul, Korea
- Data Source
  KAKENHI-PROJECT-22300018
[Presentation] Self-repair Technique using Spare Resource in TMR Softcore Processor System
- Author(s)
  H.Tanaka, Y.Ichinomiya, M.Amagasaki, M.Kuga, M.Iida and T.Sueyoshi
- Organizer
  Proc. 2012 Joint Conference of Electrical and Electronics Engineers in Kyusyu
- Place of Presentation
  Nagasaki University, Nagasaki, Japan
- Data Source
  KAKENHI-PROJECT-22300018

1. KUGA Morihiro (80243989)

# of Collaborated Projects : 8results

# of Collaborated Products : 73results
2. SHIBAMURA Hidetomo (10264136)

# of Collaborated Projects : 5results

# of Collaborated Products : 12results
3. TOMITA Shinji (40026323)

# of Collaborated Projects : 4results

# of Collaborated Products : 0results
4. AMAGASAKI Motoki (50467974)

# of Collaborated Projects : 3results

# of Collaborated Products : 97results
5. FUKUDA Akira (80165282)

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6. MURAKAMI Kazuaki (10200263)

# of Collaborated Projects : 3results

# of Collaborated Products : 0results
7. YOSHIDA Norihiko (00182775)

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8. 富田真治

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9. IIDA Masahiro (70363512)

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10. HIRAKI Kei (20238348)

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11. TANAKA Hidehiko (60011102)

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12. KANEDA Yukio (80107979)

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13. AMANO Hideharu (60175932)

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14. APDUHAN Bernady (60238714)

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15. YASUURA Hiroto (80135540)

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16. IWAIHARA Mizuho (40253538)

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17. SATO Masao (30170781)

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18. ONODERA Hidetoshi (80160927)

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19. YAMAZAKI Katsuhiro (70134260)

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20. USHIJIMA Kazuo (40037750)

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21. TAKAGI Toshihisa (30110836)

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22. ARAKI Keijiro (40117057)

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23. TANIGUCHI Rin-ichiro (20136550)

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24. SHIROUZU Hiroshi

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25. YOSHIDA Takaichi (70200996)

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26. ARITA Itsujiro (00037764)

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27. TANAKA Koichiro (40253570)

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28. MURAKAMI Kazuaki (10299263)

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29. OHNISHI Yoshimasa (50213806)

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34. YOSHIKAWA Masatoshi (30182736)

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35. IMAI Hiroshi (80183010)

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36. FUJIMURA Naomi (40117239)

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37. FURUKAWA Zengo (30190135)

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SUEYOSHI Toshinori 末吉 敏則

末吉 俊則

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Development of Self-Repair Dependable system on FPGAPrincipal Investigator

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Research for Reconfigurable System Technology using Fine Grained Cell ArchitecturePrincipal Investigator

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Research and Development of Flexible Hardware and Remote Reconfiguration TechniquesPrincipal Investigator

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Study on Next Generation FPGA toward Reconfigurable ComputingPrincipal Investigator

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Rapid Prototyping Technology for Large Scale Logic CircuitsPrincipal Investigator

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Study of Reconfigurable Processor using Programmable LSIPrincipal Investigator

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Study of Cluster Computing on a High Speed Network EnvironmentPrincipal Investigator

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Study on Interconnection Networks Towards Realization of a Reconfigurable Parallel ComputerPrincipal Investigator

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SUEYOSHI Toshinori 末吉敏則

末吉俊則

[Book] FPGA活用チュートリアル 2012/2013年版，第7章部分再構成技術の特徴と高信頼化システムへの応用2012

[Book] FPGA 活用チュートリアル 2012/2013 年版,第7 章部分再構成技術の特徴と高信頼化システムへの応用2012