Ikeda Makoto 池田誠

… Alternative Names

IKEDA Makoto 池田誠

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Researcher Number	00282682
Other IDs
Affiliation (Current)	2025: 東京大学, 大学院工学系研究科(工学部), 教授
Affiliation (based on the past Project Information) *help	2013: 東京大学, 工学(系)研究科(研究院), 教授 2012: 東京大学, 大規模集積システム設計教育研究センター, 准教授 2011: 東京大学, 大規模集積シスアム設計教育研究センター, 准教授 2007 – 2008: The University of Tokyo, 大規模集積システム設計教育研究センター, 准教授 2006: 東京大学, 大規模集積システム設計教育研究センター, 助教授 2000: 東京大学, 大学院・工学系研究科, 講師 1997 – 1999: 東京大学, 大規模集積システム設計教育研究センター, 講師
Review Section/Research Field	Principal Investigator Electron device/Electronic equipment / 電子デバイス・機器工学 Except Principal Investigator 電子デバイス・機器工学
Keywords	Principal Investigator 歩留まり / 背景光 / 二次元構造光 / 三角測量 / 全画素並列 / 注目点のみ検波 / 背景光除去 / イメージセンサ / 時間符号化二次元パタン / 二進木探索 … More / ピクセル読み出し回路共有 / 光走行時間法 / 検波 / ＲＯＩ / 検波回路 / 背景光抑圧 / ＴＯＦ / 光切断法 / 三次元形状計測 / 設計製造性 / セルレイアウト / 光学近接効果補正 / 光学近接効果 / レイアウト設計 / クリティカルエリア / セルレイアウト自動合成 / 露光時間 / 焦点深度 / セル歩留まり / セルリーク電流最小化 / 網羅的セルレイアウト生成 / OPC / マスクレイアウト設計 / 電子機器 / 電子デバイス / 製造ばらつき / 動作速度 / デジタルLSI / 自動設計 / winner-take-all回路 / 距離最小探索回路 / 時間領域方式 / 自己相関 / 疑似バスデータ系列 / 統計的処理 / 最小ハミング距離検出 / データ圧縮 / 消費電力削減 / 大規模集積回路 / 符号化アルゴリズム / チップインターフェース / 適応型 / コード帳符号化 … More Except Principal Investigator data encoding / chip interface / microprocessor / power reduction / average operation speed / pseudo-asynchronous / completion prediction / adder / 終了予測型加算器 / LSI IP / 加算器 / シフトレジスタ / 疑似非同期 / データ符号化 / チップインターフェース / マイクロプロセッサ / 消費電力削減 / 平均演算速度 / 擬似非同期 / 演算終了予測 / 加算回路 / open / short / Voltage scan-path / voltage sampler / Power line noise / Design rule / Power supply lines / VLSI / 電源線ノイズ / 断線 / 短絡 / 電圧スキャンパス / 電圧サンプラ / 電源線雑音 / 設計規則 / 電源配線 / 大規模集積回路 Less

High-speed, Accurate 3D range finding system tolerant against ambient illuminationPrincipal Investigator
- Principal Investigator
  
  IKEDA Makoto
- Project Period (FY)
  2011 – 2013
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  Electron device/Electronic equipment
- Research Institution
  The University of Tokyo
Yield optimum layout generation under optical proximity effectPrincipal Investigator
- Principal Investigator
  
  IKEDA Makoto
- Project Period (FY)
  2006 – 2008
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  Electron device/Electronic equipment
- Research Institution
  The University of Tokyo
最短距離探索機構を有する機能メモリーの研究Principal Investigator
- Principal Investigator
  
  池田誠
- Project Period (FY)
  1999 – 2000
- Research Category
  
  Grant-in-Aid for Encouragement of Young Scientists (A)
- Research Field
  
  電子デバイス・機器工学
- Research Institution
  The University of Tokyo
Research on Intelligent Design Verification of VLSIs
- Principal Investigator
  
  ASADA Kunihiro
- Project Period (FY)
  1998 – 1999
- Research Category
  
  Grant-in-Aid for Scientific Research (A)
- Research Field
  
  電子デバイス・機器工学
- Research Institution
  The University of Tokyo
Research on Processor architecture based on pseudo-asynchronous concept
- Principal Investigator
  
  ASADA Kunihiro
- Project Period (FY)
  1998 – 1999
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  電子デバイス・機器工学
- Research Institution
  The University of Tokyo
大規模集積システムのチップインターフェースにおける消費電力削減に関する研究Principal Investigator
- Principal Investigator
  
  池田誠
- Project Period (FY)
  1997 – 1998
- Research Category
  
  Grant-in-Aid for Encouragement of Young Scientists (A)
- Research Field
  
  電子デバイス・機器工学
- Research Institution
  The University of Tokyo

All 2014 2013 2012 2011 2009 2008 2007

All Journal Article Presentation Patent

[Journal Article] A Structured Light 3-D Acquisition System with a CMOS Image Sensor for Background Suppression and Frequency and Phase Detection2014
- Author(s)
  Hiroki Yabe, Makoto Ikeda
- Journal Title
  
  ITE Transactions on Media Technology and Applications
  
  Volume: Vol. 2, No.2 Pages: 154-160
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23360147
[Journal Article] A Structured Light 3-D Acquisition System with a CMOS Image Sensor for Background Suppression and Frequency and Phase Detection2014
- Author(s)
  H. Yabe, M. Ikeda
- Journal Title
  
  ITE Transactions on Media Technology and Applications
  
  Volume: Vol. 2, No. 2 Pages: 154-160
- Data Source
  KAKENHI-PROJECT-23360147
[Journal Article] 3-D Range Map Acquisition System Based on CMOS Image Sensor Using Time-Multiplexing Structured Pattern2012
- Author(s)
  H. Yabe and M. Ikeda
- Journal Title
  
  IEICE Trans. on Electronics
  
  Volume: Vol. E95-C, No. 4 Pages: 635-642
- NAID
  10030940886
- Data Source
  KAKENHI-PROJECT-23360147
[Journal Article] Cascaded Time Difference Amplifier With Differential Logic Delay Cell2011
- Author(s)
  S. Mandai, T. Nakura, T. Iizuka, M. Ikeda and K. Asada
- Journal Title
  
  IEICE Trans. on Electronics
  
  Volume: Vol. E94-C, No.4 Pages: 654-662
- NAID
  10029505749
- Data Source
  KAKENHI-PROJECT-23360147
[Journal Article] 3次元形状計測カメラ～Smart Image Sensorを用いた高性能3次元形状測定システムの実現例～2011
- Author(s)
  池田誠
- Journal Title
  
  映像情報メディア学会誌
  
  Volume: Vol.66, No.3 Pages: 204-208
- NAID
  110009668969
- Data Source
  KAKENHI-PROJECT-23360147
[Journal Article] 1.0ps Resolution Time-to-Digital Converter based on Cascaded Time-Difference-Amplifier utilizing Differential Logic Delay Cells2011
- Author(s)
  S. Mandai, T. Iizuka, T. Nakura, M. Ikeda and K. Asada
- Journal Title
  
  IEICE Trans. on Electronics
  
  Volume: Vol. E94-C, No.6 Pages: 1098-1104
- NAID
  10029804423
- Data Source
  KAKENHI-PROJECT-23360147
[Journal Article] A Temperature Sensor With an Inaccuracy of-1/+0.8℃ Using 90-nm 1-V CMOS for Online Thermal Monitoring of VLSI Circuits2008
- Author(s)
  M. Sasaki, M. Ikeda and K. Aasada
- Journal Title
  
  IEEE Transactions on Semiconductor Manufacturing Vol.21
  
  Pages: 201-208
- Data Source
  KAKENHI-PROJECT-18560327
[Journal Article] A Temperature Sensor With an Inaccuracy of -1/+0.8℃ Using 90-nm 1-V CMOS for Online Thermal Monitoring of VLSI Circuits2008
- Author(s)
  M. Sasaki M. Ikeda and K. Aasada
- Journal Title
  
  IEEE Transactions on Semiconductor Manufact uring 21
  
  Pages: 201-208
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-18560327
[Journal Article] Timing-Aware Cell Layout De-Compaction for Yield Optimization by Critical Area Minimization2007
- Author(s)
  T. Iizuka, M. Ikeda and K. Asada,
- Journal Title
  
  IEEE Transactions on Very Large Scale Intergration(VLSI) Systems Vol.15,No.6
  
  Pages: 716-720
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-18560327
[Journal Article] Timing-Aware Cell Layout De-Compactionfor Yield Optimization by Critical Area Minimization2007
- Author(s)
  T. Iizuka, M. Ikeda and K. Asada
- Journal Title
  
  IEEE Transactions on Very Large Scale Integration(VLSI)Systems Vol.15, No.6
  
  Pages: 716-720
- Data Source
  KAKENHI-PROJECT-18560327
[Patent] 固体撮像素子による高速三次元計測2013
- Inventor(s)
  池田誠, 太田宗吾, 山口琢己
- Industrial Property Rights Holder
  株式会社Rosnes,国立大学法人東京大学
- Industrial Property Rights Type
  特許
- Industrial Property Number
  2013-156472
- Filing Date
  2013-07-29
- Data Source
  KAKENHI-PROJECT-23360147
[Patent] イメージセンサ2013
- Inventor(s)
  池田誠他
- Industrial Property Rights Holder
  池田誠他
- Industrial Property Rights Type
  特許
- Industrial Property Number
  2013-256973
- Filing Date
  2013-12-12
- Data Source
  KAKENHI-PROJECT-23360147
[Patent] イメージセンサ2013
- Inventor(s)
  池田誠, 松島多佳彦
- Industrial Property Rights Holder
  国立大学法人東京大学
- Industrial Property Rights Type
  特許
- Industrial Property Number
  2013-256973
- Filing Date
  2013-12-12
- Data Source
  KAKENHI-PROJECT-23360147
[Presentation] A Proposal for A Method of High Speed Texture Mapping with Dual Imager Core Chip(デュアル・イメージャコア・チップを用いた高速テクスチャマッピング手法の提案)2014
- Author(s)
  R. Ishikawa, M. Ikeda
- Organizer
  IEICE General Conference
- Place of Presentation
  C-12-14
- Data Source
  KAKENHI-PROJECT-23360147
[Presentation] デュアル・イメージャコア・チップを用いた高速テクスチャマッピング手法の提案2014
- Author(s)
  R.Ishikawa, M. Ikeda
- Organizer
  電子情報通信学会２０１４年総合大会
- Place of Presentation
  新潟大学,新潟市
- Data Source
  KAKENHI-PROJECT-23360147
[Presentation] ピクセル面上での最小電圧回路を用いた線位置検出2014
- Author(s)
  H. Yabe and M. Ikeda
- Organizer
  電子情報通信学会２０１４年総合大会
- Place of Presentation
  新潟大学,新潟市
- Data Source
  KAKENHI-PROJECT-23360147
[Presentation] ビニング読み出し処理と高速エッジ検出によるToF 法および光切断法に基づく3 次元撮像用CMOS イメージセンサ2014
- Author(s)
  松島, 池田
- Organizer
  電子情報通信学会総合大会
- Place of Presentation
  C-12-16
- Data Source
  KAKENHI-PROJECT-23360147
[Presentation] ピクセル面上での最小電圧回路を用いた線位置検出2014
- Author(s)
  矢部, 池田
- Organizer
  IEICE Society Conference
- Place of Presentation
  C-12-15
- Data Source
  KAKENHI-PROJECT-23360147
[Presentation] A 3D Image Sensor with Binning Readout and Fast Edge Detection Using ToF Method and Light-Section Method2014
- Author(s)
  T. Matsushima and M. Ikeda
- Organizer
  IEICE Society Conference
- Place of Presentation
  C-12-16
- Data Source
  KAKENHI-PROJECT-23360147
[Presentation] ビニング読み出し処理と高速エッジ検出によるToF法および光切断法に基づく3次元撮像用CMOSイメージセンサ2014
- Author(s)
  松島多佳彦, 池田誠
- Organizer
  電子情報通信学会２０１４年総合大会
- Place of Presentation
  新潟大学,新潟市
- Data Source
  KAKENHI-PROJECT-23360147
[Presentation] CMOS Image Sensor for 3-D Range Map Acquisition With Pixel-Parallel Correlation In Region of Interest2013
- Author(s)
  T. Mastsushima and M. Ikeda
- Organizer
  Proceedings of the 2013 International Image Sensor Workshop
- Data Source
  KAKENHI-PROJECT-23360147
[Presentation] System LSI Design and VDEC Activities toward More Than Moore2013
- Author(s)
  M. Ikeda
- Organizer
  The 60th JSAP Spring Meeting, 2013
- Place of Presentation
  神奈川県・神奈川工科大学
- Invited
- Data Source
  KAKENHI-PROJECT-23360147
[Presentation] A CMOS Image Sensor for In-Pixel Background Suppression and Frequency and Phase Detection for Structured Light 3-D Acquisition Systems2013
- Author(s)
  H. Yabe and M. Ikeda
- Organizer
  International Image Sensor Workshop(IISW)
- Place of Presentation
  Snowbird Resort, Utah, USA
- Data Source
  KAKENHI-PROJECT-23360147
[Presentation] Introduction2013
- Author(s)
  M. Ikeda
- Organizer
  IEEE International Solid-State Circuits Conference (ISSCC 2013), Scientific Imaging Forum
- Invited
- Data Source
  KAKENHI-PROJECT-23360147
[Presentation] Measurement of a Pulse Frequency Modulator for Correlation Image Sensor2013
- Author(s)
  H. Yabe and M. Ikeda
- Organizer
  IEICE General Conference 2013
- Data Source
  KAKENHI-PROJECT-23360147
[Presentation] ￥A CMOS Image Sensor for In-Pixel Background Suppression and Frequency and Phase2013
- Author(s)
  H. Yabe and M. Ikeda
- Organizer
  Detection for Structured Light III-D Acquisition Systems in Proceedings of the 2013 International Image Sensor Workshop
- Data Source
  KAKENHI-PROJECT-23360147
[Presentation] A CMOS Image Sensor for In-Pixel Background Suppression and Frequency Fig. 2 Reconstructed 3-D image of a 1cm step Fig. 3 Detection of stripes for a plane and Phase Detection for Structured Light 3-D Acquisition Systems2013
- Author(s)
  H. Yabe and M. Ikeda
- Organizer
  Report on IISW
- Data Source
  KAKENHI-PROJECT-23360147
[Presentation] CMOS Image Sensor for 3-D Range Map Acquisition With Pixel-Parallel Correlation In Region of Interest2013
- Author(s)
  T. Mastsushima and M. Ikeda
- Organizer
  International Image Sensor Workshop(IISW)
- Place of Presentation
  Snowbird Resort, Utah, USA
- Data Source
  KAKENHI-PROJECT-23360147
[Presentation] Introduction2012
- Author(s)
  Makoto Ikeda
- Organizer
  IEEE International Solid-state Circuits Conference (ISSCC), Computational Imaging Forum
- Place of Presentation
  米国サンフランシスコ(招待講演)
- Year and Date
  2012-02-23
- Data Source
  KAKENHI-PROJECT-23360147
[Presentation] System LSI Design and VDEC2012
- Author(s)
  M. Ikeda
- Organizer
  IEEJ 29th Symposium on Sensors, Micro-Machines and Application Systems
- Place of Presentation
  福岡県・北九州国際会議場/西日本総合展示場
- Invited
- Data Source
  KAKENHI-PROJECT-23360147
[Presentation] "Evaluation of Background Light Suppression Characteristic and Range Finding Accuracy for 3-D Measurement using Smart Image Sensor2012
- Author(s)
  X. Hu and M. Ikeda
- Organizer
  ITE Technical Report
- Data Source
  KAKENHI-PROJECT-23360147
[Presentation] A study on improving modulated light detection performance in the presence of background light2012
- Author(s)
  H. Yabe and M. Ikeda
- Organizer
  ITE Technical Group on Information Sensing Technologies
- Data Source
  KAKENHI-PROJECT-23360147
[Presentation] Evaluation of Background Light Suppression Characteristics and Range Accuracy for Time-of-Flight Image Sensors2012
- Author(s)
  X. Hu and M. Ikeda
- Organizer
  ITE Technical Group on Information Sensing Technologies
- Data Source
  KAKENHI-PROJECT-23360147
[Presentation] Introduction2012
- Author(s)
  M. Ikeda
- Organizer
  IEEE International Solid-State Circuits Conference (ISSCC) Computational Imaging Forum
- Invited
- Data Source
  KAKENHI-PROJECT-23360147
[Presentation]2012
- Author(s)
  H. Yabe and M. Ikeda
- Organizer
  IEEE International Solid-State Circuit Conference (ISSCC) Student Research Preview
- Data Source
  KAKENHI-PROJECT-23360147
[Presentation] High-Speed Real-Time Range-finding based on Triangulation by Focal Plane Image Processing2011
- Author(s)
  Makoto Ikeda
- Organizer
  4^<th> Int.Symp.On Pohotoelectronic Detection and Imaging (ISPDI 2011)
- Place of Presentation
  中国北京市(招待講演)
- Year and Date
  2011-05-25
- Data Source
  KAKENHI-PROJECT-23360147
[Presentation] CMOS Image Sensor for 3-D range map acquisition Using Time Encoded 2-D Structured Pattern2011
- Author(s)
  H. Yabe and M. Ikeda
- Organizer
  International Image Sensor Workshop
- Place of Presentation
  Hokkaido, Japan
- Data Source
  KAKENHI-PROJECT-23360147
[Presentation] Overview of SoC Design2011
- Author(s)
  池田誠
- Organizer
  電子情報通信学会ソサイエティ大会
- Place of Presentation
  北海道(招待講演)
- Year and Date
  2011-09-15
- Data Source
  KAKENHI-PROJECT-23360147
[Presentation] High-Speed Real-Time Range-finding based on Triangulation by Focal Plane Image Processing2011
- Author(s)
  M. Ikeda
- Organizer
  4th Int. Symp. On Pohotoelectronic Detection and Imaging (ISPDI 2011)
- Invited
- Data Source
  KAKENHI-PROJECT-23360147
[Presentation] Variation Tolerant Transceiver Design for System -on-Glass2009
- Author(s)
  J. Kim J. Kim, K. Ikai, T. Nakura, M. Ikeda, K. Asada
- Organizer
  IEEE 34th European Solid-State Circuits Conference (ESSCIRC) Fringe
- Place of Presentation
  イギリス・エジンバラ
- Year and Date
  2009-09-15
- Data Source
  KAKENHI-PROJECT-18560327
[Presentation] Circuit Design using Stripe-Shaped TFTson Glass2009
- Author(s)
  K. Ikai, J. Kim, M. Ikeda, and K. Asada
- Organizer
  IEEE Asia and South Pacific Design Automation Conference
- Place of Presentation
  Yokohama
- Year and Date
  2009-01-20
- Data Source
  KAKENHI-PROJECT-18560327
[Presentation] Circuit Design using Stripe2009
- Author(s)
  K. Ikai, J. Kim, M. Ikeda, and K. Asada
- Organizer
  IEEE Asia and South Pacific Design Automati on Conference
- Place of Presentation
  横浜市
- Year and Date
  2009-01-20
- Data Source
  KAKENHI-PROJECT-18560327
[Presentation] Delay Variation Measurements on DCVSL Using Logic Tester2008
- Author(s)
  M. Ikeda
- Organizer
  University of Tokyo-UC Santa Barbara Joi nt Workshop
- Place of Presentation
  米国・カリフォルニア州・サンタバーバラ市
- Year and Date
  2008-09-08
- Data Source
  KAKENHI-PROJECT-18560327
[Presentation] Delay Variation Measurements on DCVSL Using Logic Tester2008
- Author(s)
  M. Ikeda
- Organizer
  University of Tokyo-UC Santa Barbara Joint Workshop
- Place of Presentation
  Santa Barbara, USA
- Year and Date
  2008-09-08
- Data Source
  KAKENHI-PROJECT-18560327
[Presentation] Variation Tolerant Transceiver Design for System-on-Glass2008
- Author(s)
  J.Kim, K.Ikai, T.Nakura, M.Ikeda, K.Asada,
- Organizer
  IEEE 34th European Solid-State Circuits Conference(ESSCIRC)Fringe
- Place of Presentation
  Edinburgh,UK
- Year and Date
  2008-09-15
- Data Source
  KAKENHI-PROJECT-18560327
[Presentation] Analysis of Noise Margins Due to Device Parameter Variations in Sub-100nm CMOS Technology2007
- Author(s)
  Z. Liang, M. Ikeda and K. Asada
- Organizer
  IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS)
- Place of Presentation
  Krakow, Poland
- Year and Date
  2007-04-11
- Data Source
  KAKENHI-PROJECT-18560327
[Presentation] Datapath Delay Distributions for Data/Instruction Against PVT Variations in 90nm CMOS2007
- Author(s)
  M. Ikeda, K. Ishi, T. Sokabe and K. Asada
- Organizer
  IEEE International Conference on Electronics, Circuits and Systems (ICECS)
- Place of Presentation
  Marrakech, Morrocco
- Year and Date
  2007-12-12
- Data Source
  KAKENHI-PROJECT-18560327
[Presentation] Process Variation Aware Comprehensive Layout Synthesis for Yield Enhancement in Nano-Meter CMOS2007
- Author(s)
  M. Ikeda, K. Ishi, T. Sokabe and K. Asada
- Organizer
  IEEE International Conference on Electronics, Circuits and Systems(ICECS)
- Place of Presentation
  Marrakech, Morocco
- Year and Date
  2007-12-12
- Data Source
  KAKENHI-PROJECT-18560327
[Presentation] Process Variation Aware Comprehensive Layout Synthesis for YieldEnhancement in Nano-Meter CMOS2007
- Author(s)
  K. Kurihara, T. Iizuka, M. Ikeda and K. Asada
- Organizer
  IEEE International Conference on Electronics, Circuits and Systems(ICECS)
- Place of Presentation
  Marrakech, Morocco
- Year and Date
  2007-12-14
- Data Source
  KAKENHI-PROJECT-18560327
[Presentation] 40 Frames/sec 16×16 Temperature Probe Array using 90nm 1V CMOS for On line Thermal Monitoring on VLSI Chip2007
- Author(s)
  M. Sasaki, T. Inoue, M. Ikeda and K. Asada
- Organizer
  IEEE Asian Solid-State Circuits Conference(A-SSCC)
- Place of Presentation
  Jeju, Korea
- Year and Date
  2007-11-14
- Data Source
  KAKENHI-PROJECT-18560327
[Presentation] 40 Frames/sec 16x16 Temperature Probe Array using 90nm 1V CMOS for On line Thermal Monitoring on VLSI Chip2007
- Author(s)
  M. Sasaki, T. Inoue, M. Ikeda and K.Asada
- Organizer
  IEEE Asian Solid-State Circuits Conference(A-SSCC)
- Place of Presentation
  Jeju, Korea
- Year and Date
  2007-11-14
- Data Source
  KAKENHI-PROJECT-18560327
[Presentation] Process Variation Aware Comprehensive Layout Synthesis for Yield Enhancement in Nano-Neter CMOS2007
- Author(s)
  K. Kurihara, T. Iizuka, M. Ikeda and K. Asada
- Organizer
  IEEE International Conference on Electronics, Circuits and Systems (ICECS)
- Place of Presentation
  Marrakech, Morrocco
- Year and Date
  2007-12-12
- Data Source
  KAKENHI-PROJECT-18560327
[Presentation] Analysis of Noise Margins Due to Device Parameter Variations in Sub-100nm CMOS Technology2007
- Author(s)
  Z. Liang, M. Ikeda and K. Asada
- Organizer
  IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems(DDECS)
- Place of Presentation
  Krakow,Poland
- Year and Date
  2007-04-11
- Data Source
  KAKENHI-PROJECT-18560327

1. ASADA Kunihiro (70142239)

# of Collaborated Projects: 2 results

# of Collaborated Products: 0 results
2. SASAKI Masahiro (50339701)

# of Collaborated Projects: 1 results

# of Collaborated Products: 4 results
3. ZHENG Ruotong (50292959)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results

Ikeda Makoto 池田 誠

IKEDA Makoto 池田 誠

Research Projects

Research Products

Co-Researchers

High-speed, Accurate 3D range finding system tolerant against ambient illuminationPrincipal Investigator

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Yield optimum layout generation under optical proximity effectPrincipal Investigator

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最短距離探索機構を有する機能メモリーの研究Principal Investigator

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Research on Intelligent Design Verification of VLSIs

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Research on Processor architecture based on pseudo-asynchronous concept

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大規模集積システムのチップインターフェースにおける消費電力削減に関する研究Principal Investigator

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[Journal Article] A Structured Light 3-D Acquisition System with a CMOS Image Sensor for Background Suppression and Frequency and Phase Detection2014

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[Journal Article] A Structured Light 3-D Acquisition System with a CMOS Image Sensor for Background Suppression and Frequency and Phase Detection2014

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[Journal Article] 3-D Range Map Acquisition System Based on CMOS Image Sensor Using Time-Multiplexing Structured Pattern2012

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NAID

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[Journal Article] Cascaded Time Difference Amplifier With Differential Logic Delay Cell2011

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NAID

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[Journal Article] 3次元形状計測カメラ～Smart Image Sensorを用いた高性能3次元形状測定システムの実現例～2011

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NAID

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[Journal Article] 1.0ps Resolution Time-to-Digital Converter based on Cascaded Time-Difference-Amplifier utilizing Differential Logic Delay Cells2011

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NAID

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[Journal Article] A Temperature Sensor With an Inaccuracy of-1/+0.8℃ Using 90-nm 1-V CMOS for Online Thermal Monitoring of VLSI Circuits2008

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[Journal Article] A Temperature Sensor With an Inaccuracy of -1/+0.8℃ Using 90-nm 1-V CMOS for Online Thermal Monitoring of VLSI Circuits2008

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[Journal Article] Timing-Aware Cell Layout De-Compaction for Yield Optimization by Critical Area Minimization2007

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Ikeda Makoto 池田誠

IKEDA Makoto 池田誠