Suzuki Daisuke 鈴木大輔

… Alternative Names

Daisuke Suzuki 鈴木大輔

鈴木大輔スズキダイスケ

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Researcher Number	00574675
Other IDs
Affiliation (Current)	2025: 会津大学, コンピュータ理工学部, 准教授
Affiliation (based on the past Project Information) *help	2024: 会津大学, コンピュータ理工学部, 准教授 2020 – 2022: 会津大学, コンピュータ理工学部, 准教授 2017 – 2018: 東北大学, 学際科学フロンティア研究所, 助教 2015: 東北大学, 学際科学フロンティア研究所, 助教 2014: 東北大学, 国際集積エレクトロニクス研究開発センター, 助教 2013: 東北大学, 省エネルギー・スピントロニクス集積化システムセンター, 研究支援者
Review Section/Research Field	Principal Investigator Basic Section 60040:Computer system-related / Electron device/Electronic equipment Except Principal Investigator Engineering / Science and Engineering
Keywords	Principal Investigator 計算機アーキテクチャ / 不揮発ロジック / FPGA / 協調設計 / 回路技術 / ＩｏＴ / ＬＳＩ / 不揮発 / CADツール / 配置配線 … More / 回路設計 / 自動設計 / 電子回路 / デジタル回路 / CAD / 論理回路 / 半導体集積回路 / スピントロニクス / VLSI / ロジックインメモリ回路 / 高信頼 / 耐災害性 / ロジックインメモリ / 低消費電力 / MTJ素子 … More Except Principal Investigator スピンエレクトロニクス / 人工知能 / スピントロニクス Less

Challenge for a ultra-low-power nonvolatile logic LSI based on active-time minimization mechanismPrincipal Investigator
- Principal Investigator
  
  鈴木大輔
- Project Period (FY)
  2024 – 2026
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Review Section
  
  Basic Section 60040:Computer system-related
- Research Institution
  The University of Aizu
Optimization algorithm for nonvolatile FPGA and its CAD tool implementationPrincipal Investigator
- Principal Investigator
  
  Daisuke Suzuki
- Project Period (FY)
  2020 – 2022
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Review Section
  
  Basic Section 60040:Computer system-related
- Research Institution
  The University of Aizu
Spintronics-Based Hardware Paradigm for Artificial Intelligence
- Principal Investigator
  
  大野英男
- Project Period (FY)
  2017 – 2021
- Research Category
  
  Grant-in-Aid for Specially Promoted Research
- Review Section
  
  Science and Engineering
  Engineering
- Research Institution
  Tohoku University
Design of a nonvolatile FPGA with system self-recovery functionPrincipal Investigator
- Principal Investigator
  
  Suzuki Daisuke
- Project Period (FY)
  2013 – 2015
- Research Category
  
  Grant-in-Aid for Young Scientists (B)
- Research Field
  
  Electron device/Electronic equipment
- Research Institution
  Tohoku University

All 2022 2021 2020 2018 2016 2015 2014 2013 Other

All Journal Article Presentation Patent

[Journal Article] Design of an active-load-localized single-ended nonvolatile lookup-table circuit for energy-efficient binary-convolutional-neural-network accelerator2022
- Author(s)
  SUZUKI Daisuke, OKA Takahiro、HANYU Takahiro
- Journal Title
  
  Japanese Journal of Applied Physics
  
  Volume: 61 Issue: SC Pages: SC1083-SC1083
- DOI
  10.35848/1347-4065/ac51bf
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20K11725, KAKENHI-PROJECT-21H04868
[Journal Article] Nonvolatile Field-Programmable Gate Array Using a Standard-Cell-Based Design Flow2021
- Author(s)
  Daisuke Suzuki and Takahiro Hanyu
- Journal Title
  
  IEICE Trans. Information and Systems
  
  Volume: -
- NAID
  130008070391
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-20K11725
[Journal Article] Nonvolatile Field-Programmable Gate Array Using a Standard-Cell-Based Design Flow2021
- Author(s)
  SUZUKI Daisuke, HANYU Takahiro
- Journal Title
  
  IEICE Trans. Inf. & Syst.
  
  Volume: E104.D Issue: 8 Pages: 1111-1120
- DOI
  10.1587/transinf.2020LOP0010
- NAID
  130008070391
- ISSN
  0916-8532, 1745-1361
- Year and Date
  2021-08-01
- Language
  English
- Data Source
  KAKENHI-PROJECT-20K11725
[Journal Article] Magnetic-tunnel-junction based low-energy nonvolatile flip-flop using an area-efficient self-terminated write driver2015
- Author(s)
  Daisuke Suzuki and Takahiro Hanyu
- Journal Title
  
  Journal of Applied Physics
  
  Volume: 117 Issue: 17
- DOI
  10.1063/1.4906760
- Peer Reviewed / Acknowledgement Compliant / Open Access
- Data Source
  KAKENHI-PROJECT-25870067
[Journal Article] Nonvolatile Field-Programmable Gate Array Using 2-Transistor-1-Magnetic-Tunnel-Junction-Vell-Based Multi-Context Array for Power and Area Efficient Dynamically Reconfigurable Logic2015
- Author(s)
  Daisuke Suzuki and Takahiro Hanyu
- Journal Title
  
  Japanese Journal of Applied Physics
  
  Volume: 54 Issue: 4S Pages: 04DE01-04DE01
- DOI
  10.7567/jjap.54.04de01
- Peer Reviewed / Acknowledgement Compliant / Open Access
- Data Source
  KAKENHI-PROJECT-25870067
[Journal Article] Cost-Efficient Self-Terminated Write Driver for Spin-Transfer-Torque RAM and Logic2014
- Author(s)
  Daisuke Suzuki, Masanori Natsui, Akira Mochizuki, and Takahiro Hanyu
- Journal Title
  
  IEEE Transactions on Magnetics
  
  Volume: 50 Issue: 11 Pages: 3402104-3402104
- DOI
  10.1109/tmag.2014.2322387
- Peer Reviewed / Acknowledgement Compliant
- Data Source
  KAKENHI-PROJECT-25870067
[Patent] 抵抗変化型記憶素子へのデータ書き込み装置2014
- Inventor(s)
  羽生貴弘，鈴木大輔，夏井雅典，望月明
- Industrial Property Rights Holder
  東北大学
- Industrial Property Rights Type
  特許
- Industrial Property Number
  2014-060901
- Filing Date
  2014-03-24
- Data Source
  KAKENHI-PROJECT-25870067
[Presentation] Design of a Low-Power FPGA-Based CNN Accelerator Based on Nonvolatile Logic-in-Memory Circuitry2022
- Author(s)
  D. Suzuki, M. Natsui, A. Tamakoshi, Y. Takako, and T. Hanyu
- Organizer
  2022 Int. Symp. Nonlinear Theory and Its Applications
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-20K11725
[Presentation] Spintronics-Based Nonvolatile FPGA and Its Application to Edge-AI Accelerator2022
- Author(s)
  D. Suzuki and T. Hanyu
- Organizer
  IEEE 15h Int. Symp. Embedded Multicore/Many-core Systems-n-Chip
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-20K11725
[Presentation] Spintronics-based Field-Programmable Gate Array-Its Overview and Application to Edge-AI Hardware2022
- Author(s)
  D. Suzuki
- Organizer
  Physics2022
- Invited / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-20K11725
[Presentation] Design of an Energy-Efficient Nonvolatile Lookup Table Circuit Using Active-Load-Localized Circuitry with Self-Terminated Writing/Reading2022
- Author(s)
  D. Suzuki and T. Hanyu
- Organizer
  2022 Int. Conf. Solid-State Devices and Materials
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-20K11725
[Presentation] スピントロニクス素子ベース不揮発FPGA: 超低消費電力再構成可能ハードウェアプラットフォームへの挑戦2022
- Author(s)
  鈴木大輔, 夏井雅典, 羽生貴弘
- Organizer
  電子情報通信学会総合大会2022
- Invited
- Data Source
  KAKENHI-PROJECT-20K11725
[Presentation] MTJ-Based Nonvolatile FPGA: Circuit Technologies and Its Applications2021
- Author(s)
  Daisuke Suzuki
- Organizer
  Workshop on Computing with Unconventional Technologies
- Invited / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-20K11725
[Presentation] Design of an Energy-Efficient Nonvolatile-FPGA-Based BCNN Accelerator Using an Active-Load-Localized Single-Ended Circuit Style2021
- Author(s)
  SUZUKI Daisuke, OKA Takahiro、HANYU Takahiro
- Organizer
  2021 Int. Conf. Solid-State Devices and Materials
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-20K11725
[Presentation] Memory-Access-Minimized BCNN Accelerator Using Nonvolatile FPGA with Only-Once-Write Shifting2021
- Author(s)
  SUZUKI Daisuke, OKA Takahiro、HANYU Takahiro
- Organizer
  IEEE 14th Int. Symp. Embedded Multicore/Many-core Systems-n-Chip
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-20K11725
[Presentation] Design and Evaluation of a Synthesizable Standard-Cell-Based Nonvolatile FPGA2020
- Author(s)
  Daisuke Suzuki and Takahiro Hanyu
- Organizer
  ISMVL2020
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-20K11725
[Presentation] Systematic Design Flow for Realizing MTJ-Based Nonvolatile FPGAs2020
- Author(s)
  Yasuhiro Takako, Daisuke Suzuki, Masanori Natsui, and Takahiro Hanyu
- Organizer
  SSDM2020
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-20K11725
[Presentation] Design of an MTJ-Based Nonvolatile LUT Circuit with a Data-Update Minimized Shift Operation for an Ultra-Low-Power FPGA2018
- Author(s)
  Daisuke Suzuki and Takahiro Hanyu
- Organizer
  26th ACM/SIGDA Int. Symp. FPGA
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-17H06093
[Presentation] 不揮発FPGAを用いた脳型情報処理アクセラレータの構成2018
- Author(s)
  鈴木大輔，羽生貴弘
- Organizer
  第31回多値論理とその応用研究会
- Data Source
  KAKENHI-PROJECT-17H06093
[Presentation] Energy-Efficient and Highly-Reliable Nonvolatile FPGA Using Self-Terminated Power-Gating Scheme2016
- Author(s)
  Daisuke Suzuki and Takahiro Hanyu
- Organizer
  2016 IEEE International Symposium on Multiple-Valued Logic
- Place of Presentation
  北海道大学
- Year and Date
  2016-05-18
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-25870067
[Presentation] Self-Terminated 機構に基づくMTJ 書込み回路とその乱数生成器への応用2016
- Author(s)
  鈴木大輔，羽生貴弘
- Organizer
  電子情報通信学会2016総合大会
- Place of Presentation
  九州大学伊都キャンパス
- Year and Date
  2016-03-15
- Data Source
  KAKENHI-PROJECT-25870067
[Presentation] Design of an MTJ-based nonvolatile lookup table circuit using an energy-efficient single-ended logic-in-memory structure2015
- Author(s)
  Daisuke Suzuki and Takahiro Hanyu
- Organizer
  2015 IEEE 58th International Midwest Symposium on Circuits and Systems
- Place of Presentation
  Fort Collins, Colorado USA
- Year and Date
  2015-08-02
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-25870067
[Presentation] Optimally Self-Terminated Compact Switching Circuit Using Continuous Voltage Monitoring Achieving High Read Margin for STT MRAM and Logic2014
- Author(s)
  Daisuke Suzuki, Masanori Natsui, Akira Mochizuki, and Takahiro Hanyu
- Organizer
  IEEE Intermag 2014
- Place of Presentation
  Dresden, Germany
- Data Source
  KAKENHI-PROJECT-25870067
[Presentation] MTJ素子を用いた不揮発FPGAの電力効率最適化手法2013
- Author(s)
  鈴木大輔，夏井雅典，望月明，羽生貴弘
- Organizer
  デザインガイア2013 -VLSI設計の新しい大地-
- Place of Presentation
  鹿児島県鹿児島市
- Data Source
  KAKENHI-PROJECT-25870067
[Presentation] A Nonvolatile FPGA Using MTJ-Based Logic-in-Memory Structure for Ultra Low-Power Reconfigurable Systems
- Author(s)
  Daisuke Suzuki and Takahiro Hanyu
- Organizer
  International Workshop on Electronics and Communications
- Place of Presentation
  Chengdu (China)
- Year and Date
  2014-10-27 – 2014-10-28
- Data Source
  KAKENHI-PROJECT-25870067
[Presentation] MTJ-Based Low-Energy Nonvolatile Flip-Flop Using Area-Efficient Self-Terminated Write Driver
- Author(s)
  Daisuke Suzuki and Takahiro Hanyu
- Organizer
  59th Annual Conference on Magnetism and Magnetic Materials
- Place of Presentation
  Hawaii (America)
- Year and Date
  2014-11-03 – 2014-11-08
- Data Source
  KAKENHI-PROJECT-25870067
[Presentation] Optimally Self-Terminated Compact Switching Circuit Using Continuous Voltage Monitoring Achieving High Read Margin for STT MRAM and Logic
- Author(s)
  Daisuke Suzuki, Masanori Natsui, Akira Mochizuki, and Takahiro Hanyu
- Organizer
  IEEE International Magnetic Conference
- Place of Presentation
  Dresden (Germany)
- Year and Date
  2014-05-04 – 2014-05-08
- Data Source
  KAKENHI-PROJECT-25870067
[Presentation] ロジックインメモリベース不揮発FPGA用電源制御モジュールの設計
- Author(s)
  鈴木大輔，田畑祐樹, 羽生貴弘
- Organizer
  2015年電子情報通信学会総合大会
- Place of Presentation
  立命館大学びわこ・くさつキャンパス (滋賀県草津市)
- Year and Date
  2015-03-10 – 2015-03-13
- Data Source
  KAKENHI-PROJECT-25870067
[Presentation] Nonvolatile FPGA Using 2T-1MTJ-Cell-Based Multi-Context Array for Power and Area Efficient Dynamically Reconfigurable Logic
- Author(s)
  Daisuke Suzuki and Takahiro Hanyu
- Organizer
  International Conference on Solid State Devices and Material
- Place of Presentation
  つくば国際会議場 (茨城県つくば市)
- Year and Date
  2014-09-08 – 2014-09-11
- Data Source
  KAKENHI-PROJECT-25870067

1. 大野英男 (00152215)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
2. 遠藤哲郎 (00271990)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
3. 佐藤茂雄 (10282013)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
4. 堀尾喜彦 (60199544)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
5. 深見俊輔 (60704492)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results

Suzuki Daisuke 鈴木 大輔

Daisuke Suzuki 鈴木 大輔

鈴木 大輔 スズキ ダイスケ

Research Projects

Research Products

Co-Researchers

Challenge for a ultra-low-power nonvolatile logic LSI based on active-time minimization mechanismPrincipal Investigator

Principal Investigator

Project Period (FY)

Research Category

Review Section

Research Institution

Optimization algorithm for nonvolatile FPGA and its CAD tool implementationPrincipal Investigator

Principal Investigator

Project Period (FY)

Research Category

Review Section

Research Institution

Spintronics-Based Hardware Paradigm for Artificial Intelligence

Principal Investigator

Project Period (FY)

Research Category

Review Section

Research Institution

Design of a nonvolatile FPGA with system self-recovery functionPrincipal Investigator

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

[Journal Article] Design of an active-load-localized single-ended nonvolatile lookup-table circuit for energy-efficient binary-convolutional-neural-network accelerator2022

Author(s)

Journal Title

DOI

Data Source

[Journal Article] Nonvolatile Field-Programmable Gate Array Using a Standard-Cell-Based Design Flow2021

Author(s)

Journal Title

NAID

Data Source

[Journal Article] Nonvolatile Field-Programmable Gate Array Using a Standard-Cell-Based Design Flow2021

Author(s)

Journal Title

DOI

NAID

ISSN

Year and Date

Language

Data Source

[Journal Article] Magnetic-tunnel-junction based low-energy nonvolatile flip-flop using an area-efficient self-terminated write driver2015

Author(s)

Journal Title

DOI

Data Source

[Journal Article] Nonvolatile Field-Programmable Gate Array Using 2-Transistor-1-Magnetic-Tunnel-Junction-Vell-Based Multi-Context Array for Power and Area Efficient Dynamically Reconfigurable Logic2015

Author(s)

Journal Title

DOI

Data Source

[Journal Article] Cost-Efficient Self-Terminated Write Driver for Spin-Transfer-Torque RAM and Logic2014

Author(s)

Journal Title

DOI

Data Source

[Patent] 抵抗変化型記憶素子へのデータ書き込み装置2014

Inventor(s)

Industrial Property Rights Holder

Industrial Property Rights Type

Industrial Property Number

Filing Date

Data Source

[Presentation] Design of a Low-Power FPGA-Based CNN Accelerator Based on Nonvolatile Logic-in-Memory Circuitry2022

Author(s)

Organizer

Data Source

[Presentation] Spintronics-Based Nonvolatile FPGA and Its Application to Edge-AI Accelerator2022

Author(s)

Organizer

Data Source

[Presentation] Spintronics-based Field-Programmable Gate Array-Its Overview and Application to Edge-AI Hardware2022

Suzuki Daisuke 鈴木大輔

Daisuke Suzuki 鈴木大輔

鈴木大輔スズキダイスケ

[Presentation] Self-Terminated 機構に基づくMTJ 書込み回路とその乱数生成器への応用2016