shinohara hirofumi 篠原尋史

… Alternative Names

Researcher Number	50531810
Other IDs
Affiliation (Current)	2021: 早稲田大学, 理工学術院(情報生産システム研究科・センター), 特任教授
Affiliation (based on the past Project Information) *help	2021: 早稲田大学, 理工学術院, 教授 2017 – 2019: 早稲田大学, 理工学術院(情報生産システム研究科・センター), 特任教授
Review Section/Research Field	Principal Investigator Electron device/Electronic equipment / Basic Section 21060:Electron device and electronic equipment-related
Keywords	Principal Investigator PUF / TRNG / 乱数 / ビットエラー率 / ハードウェアセキュリティ / ホットエレクトロン注入 / 電子デバイス・機器 / セキュア・ネットワーク / 暗号・認証等

Research Projects
(2 results)
Research Products
(8 results)

暗号レスでIoT認証を軽量にするストロングPUFの研究Principal InvestigatorOngoing
- Principal Investigator
  
  篠原尋史
- Project Period (FY)
  2021 – 2023
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Review Section
  
  Basic Section 21060:Electron device and electronic equipment-related
- Research Institution
  Waseda University
Quality Improvement of Natural Data for Security by Controling Initial StatePrincipal Investigator
- Principal Investigator
  
  Shinohara Hirofumi
- Project Period (FY)
  2017 – 2019
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  Electron device/Electronic equipment
- Research Institution
  Waseda University

All 2020 2019 2018

All Journal Article Presentation

[Journal Article] A 373-F? 0.21%-Native-BER EE SRAM Physically Unclonable Function With 2-D Power-Gated Bit Cells and VSS Bias-Based Dark-Bit Detection2020
- Author(s)
  Liu Kunyang、Min Yue、Yang Xuan、Sun Hanfeng、Shinohara Hirofumi
- Journal Title
  
  IEEE Journal of Solid-State Circuits
  
  Volume: 5 Pages: 1719-1732
- DOI
  10.1109/jssc.2019.2963002
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-17K06404
[Presentation] A 0.5-V 2.07-fJ/b 497-F2 EE/CMOS Hybrid SRAM Physically Unclonable Function with < 1E-7 Bit Error Rate Achieved through Hot Carrier Injection Burn-in2020
- Author(s)
  Kunyang Liu, Hongliang Pu and Hirofumi Shinohara
- Organizer
  IEEE 2020 Custom Integrated Circuits Conf. (CICC)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-17K06404
[Presentation] High-Throughput & Power Efficiency 8 Bits Von Neumann Post-Processing with Waiting Strategy for True Random Number Generators2019
- Author(s)
  Ruilin Zhang and Hirofumi Shinohara
- Organizer
  TJCAS 2019
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-17K06404
[Presentation] A 373 F2 2D Power-Gated EE SRAM Physically Unclonable Function With Dark-Bit Detection Technique2018
- Author(s)
  Kunyang Liu, Yue Min, Xuan Yang, Hanfeng Sun and Hirofumi Shinohara
- Organizer
  IEEE 2018 A-SSCC, pp.161-164, Nov. 2018.
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-17K06404
[Presentation] 情報セキュリティのためのランダム回路2018
- Author(s)
  篠原　尋史
- Organizer
  電子情報通信学会、ICD研究会
- Invited
- Data Source
  KAKENHI-PROJECT-17K06404
[Presentation] High-Throughput Von Neumann Post-Processing for Random Number Generator2018
- Author(s)
  Ruilin Zhang, Sijia Chen, Chao Wan, Hirofumi Shinohara
- Organizer
  IEEE, 2018 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), D3-1, April 2018.
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-17K06404
[Presentation] Compensation of Temperature Induced Flipping-Bits in CMOS SRAM PUF by NMOS Body-Bias2018
- Author(s)
  Xuanhao Zhang, Xiang Chen, Hanfeng Sun and, Hirofumi Shinohara
- Organizer
  IEICE Technical Report, HWS2018-38, pp. 333-336, July 2018
- Data Source
  KAKENHI-PROJECT-17K06404
[Presentation] 情報セキュリティのためのランダム回路2018
- Author(s)
  篠原尋史
- Organizer
  信学技報、ICD2018-11, pp. 45-46, 2018年 4月
- Invited
- Data Source
  KAKENHI-PROJECT-17K06404

shinohara hirofumi 篠原 尋史

篠原 尋史 シノハラ ヒロフミ

Shinohara Hirofumi 篠原 尋史

Research Projects

Research Products

暗号レスでIoT認証を軽量にするストロングPUFの研究Principal InvestigatorOngoing

Principal Investigator

Project Period (FY)

Research Category

Review Section

Research Institution

Quality Improvement of Natural Data for Security by Controling Initial StatePrincipal Investigator

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

[Journal Article] A 373-F? 0.21%-Native-BER EE SRAM Physically Unclonable Function With 2-D Power-Gated Bit Cells and VSS Bias-Based Dark-Bit Detection2020

Author(s)

Journal Title

DOI

Data Source

[Presentation] A 0.5-V 2.07-fJ/b 497-F2 EE/CMOS Hybrid SRAM Physically Unclonable Function with < 1E-7 Bit Error Rate Achieved through Hot Carrier Injection Burn-in2020

Author(s)

Organizer

Data Source

[Presentation] High-Throughput & Power Efficiency 8 Bits Von Neumann Post-Processing with Waiting Strategy for True Random Number Generators2019

Author(s)

Organizer

Data Source

[Presentation] A 373 F2 2D Power-Gated EE SRAM Physically Unclonable Function With Dark-Bit Detection Technique2018

Author(s)

Organizer

Data Source

[Presentation] 情報セキュリティのためのランダム回路2018

Author(s)

Organizer

Data Source

[Presentation] High-Throughput Von Neumann Post-Processing for Random Number Generator2018

Author(s)

Organizer

Data Source

[Presentation] Compensation of Temperature Induced Flipping-Bits in CMOS SRAM PUF by NMOS Body-Bias2018

Author(s)

Organizer

Data Source

[Presentation] 情報セキュリティのためのランダム回路2018

Author(s)

Organizer

Data Source

shinohara hirofumi 篠原尋史

篠原尋史シノハラヒロフミ

Shinohara Hirofumi 篠原尋史