TAKEUCHI YOSHINORI 武内良典

… Alternative Names

TAKEUCHI Yoshinori 武内良典

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Researcher Number	70242245
Other IDs
External Links
Affiliation (Current)	2025: 近畿大学, 理工学部, 教授
Affiliation (based on the past Project Information) *help	2018 – 2023: 近畿大学, 理工学部, 教授 2012 – 2017: 大阪大学, 情報科学研究科, 准教授 2015: 大阪大学, 大学院情報科学研究科, 准教授 2008 – 2011: Osaka University, 大学院・情報科学研究科, 准教授 2002 – 2003: 大阪大学, 大学院・情報科学研究科, 助教授 … More 2000 – 2001: 大阪大学, 大学院・基礎工学研究科, 助教授 1997: Osaka Univ.DEPT of CHEM.SCI.ENG., Lectre, 大学院・基礎工学研究科, 講師 1997: 大阪大学大学院, 基礎工学研究科, 講師 1996: 大阪大学, 基礎工学部, 講師 Less
Review Section/Research Field	Principal Investigator Computer system / Computer system/Network Except Principal Investigator 計算機科学 / Computer system/Network / Medium-sized Section 61:Human informatics and related fields / Science and Engineering / Computer system
Keywords	Principal Investigator 組込みシステム / 情報システム / 情報センシングデバイス / データ圧縮手法 / 専用プロセッサ設計 / 低消費電力量化 / タスク割当 / スケジューリング / 高信頼性 / マルチプロセッサ・システム … More / ソフトウェア無線 / ダイナミック・リコンフィギュラブル / SoC / Forward Error Correction / 低消費電力 / 設計最適化 / VLSI設計技術 … More Except Principal Investigator GUI / 低消費電力 / JPEG2000 / VLSI / IPベース設計 / VLSI設計技術 / 人工視覚補綴 / 心理物理実験 / 脳刺激型人工視覚 / スパイクニューロン / 無線通信 / 視覚情報符号化 / 網膜 / 画像情報通信 / 画像情報圧縮 / ニューロモーフィック網膜 / 皮質電気刺激 / 視覚再建 / 光覚シミュレーション / 画像無線通信 / 画像圧縮 / シリコン網膜 / 人工視覚 / IP-base Design / Processor / Image Coding / 組込み機器 / システムオンチップ設計 / VLSIアーキテクチャ / プロセッサシステム / メディア処理 / プロセッサ / 画像符号化 / VLIW PROCESSOR / PROCESSOR MODEL / PIPELINE / PEAS-I / 最適化設計 / 機能分割 / パイプライン・アーキテクチャ / ASIP / VLIWプロセッサ / プロセッサ・モデル / パイプライン方式 / ARCHITECTURE MODEL / ARCHITECTURE DESIGN / 設計支援環境 / アーキテクチャ・モデル / アーキテクチャ設計教育 / タスク割り当て / ＬＳＩ設計技術 / タスク割当 / 統計的実行時間見積り手法 / 実行時間ばらつき / LSI設計技術 / オペランドアイソレーション / クロックゲーティング / プロセッサ設計 / 設計最適化 / マルチコアSoC / MPSoC(マルチプロセッサSoC) / MPSoC (マルチプロセッサSoC) / DVFS / マルチプロセッサ / マルチコア / MPSoC Less

網膜と視覚野の情報処理と通信に学んだ脳刺激型人工視覚の開発
- Principal Investigator
  
  八木哲也
- Project Period (FY)
  2020 – 2023
- Research Category
  
  Grant-in-Aid for Scientific Research (A)
- Review Section
  
  Medium-sized Section 61:Human informatics and related fields
- Research Institution
  Fukui University of Technology
  Osaka University
Study for Low Energy Information Sensing for IoT DevicesPrincipal Investigator
- Principal Investigator
  
  YOSHINORI TAKEUCHI
- Project Period (FY)
  2017 – 2019
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  Computer system
- Research Institution
  Kindai University
  Osaka University
Higher Reliable Task Assignment Method for Embedded MultiprocessorPrincipal Investigator
- Principal Investigator
  
  TAKEUCHI YOSHINORI
- Project Period (FY)
  2014 – 2016
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  Computer system
- Research Institution
  Osaka University
Research for Task assignment methods considering input data variability
- Principal Investigator
  
  IMAI Masaharu
- Project Period (FY)
  2013 – 2015
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  Computer system
- Research Institution
  Osaka University
極低消費電力プロセッサ生成手法
- Principal Investigator
  
  坂主圭史
- Project Period (FY)
  2012
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  Computer system/Network
- Research Institution
  Osaka University
Architecture Design Method for Multi-processor SoC
- Principal Investigator
  
  IMAI Masaharu
- Project Period (FY)
  2008 – 2011
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  Computer system/Network
- Research Institution
  Osaka University
Design Methodology for Dynamic Reconfigurable Component OptimizationPrincipal Investigator
- Principal Investigator
  
  TAKEUCHI Yoshinori
- Project Period (FY)
  2008 – 2010
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  Computer system/Network
- Research Institution
  Osaka University
High-Performance Processor Design for Image Processing
- Principal Investigator
  
  SHIRAKAWA Isao
- Project Period (FY)
  2000 – 2002
- Research Category
  
  Grant-in-Aid for Scientific Research on Priority Areas
- Review Section
  
  Science and Engineering
- Research Institution
  Osaka University
DEVELOPMENT OF MICROPROCESSOR ARCHITECURE DESIGN EDUCATION ENVIRONMENT
- Principal Investigator
  
  IMAI Masaharu
- Project Period (FY)
  1995 – 1997
- Research Category
  
  Grant-in-Aid for Scientific Research (A)
- Research Field
  
  計算機科学
- Research Institution
  Osaka University
  Toyohashi University of Technology
ARCHITECTURE LEVEL DESIGN OPTIMIZATION METHODS FOR MICROPROCESSORS
- Principal Investigator
  
  IMAI Masaharu
- Project Period (FY)
  1995 – 1997
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  計算機科学
- Research Institution
  Osaka University
  Toyohashi University of Technology

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All Journal Article Presentation

[Journal Article] CODEC system using EG2C chips and power control with a sleep mode for a visual prosthesis2024
- Author(s)
  Naoya Tanaka, Shogo Hirayama and Yoshinori Takeuchi
- Journal Title
  
  Proceedings of The 25th Workshop on Synthesis And System Integration of Mixed Information Technologies
  
  Volume: - Pages: 335-340
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20H00606
[Journal Article] オペコードコンパクト化によるプロセッサの回路面積低減の評価2023
- Author(s)
  吉澤翔悟、武内良典
- Journal Title
  
  DAシンポジウム2023論文集
  
  Volume: 123 Pages: 71-77
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20H00606
[Journal Article] 視覚野刺激型人工視覚システムの刺激データに対する圧縮プロセッサ設計2023
- Author(s)
  平山聖冴，田中尚哉，武内良典
- Journal Title
  
  情処研報
  
  Volume: SLDM-201, No.7 Pages: 90-96
- Data Source
  KAKENHI-PROJECT-20H00606
[Journal Article] 人工視覚システムのデータ圧縮伸長モジュールのFPGA実装2023
- Author(s)
  田中尚哉，平山聖冴，武内良典
- Journal Title
  
  情処研報
  
  Volume: SLDM-201, No.8, Pages: 97-102
- Data Source
  KAKENHI-PROJECT-20H00606
[Journal Article] An Efficient Performance Estimation Method for Configurable Multi-layer Bus-based SoC2015
- Author(s)
  Salita Sombatsiri, Yoshinori Takeuchi and Masaharu Imai
- Journal Title
  
  IPSJ Transactions on System LSI Design Methodology
  
  Volume: 8 Issue: 0 Pages: 26-37
- DOI
  10.2197/ipsjtsldm.8.26
- NAID
  130004952369
- Peer Reviewed / Acknowledgement Compliant
- Data Source
  KAKENHI-PROJECT-25330059
[Journal Article] A Low-power ASIP Generation Method by Extracting Minimum Execution Conditions2010
- Author(s)
  Hirofumi Iwato, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai
- Journal Title
  
  IPSJ Transactions on System LSI Design Methodology Vol.3
  
  Pages: 222-233
- NAID
  130000418473
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20300017
[Journal Article] Optimal Scheme for Search State Space and Scheduling on Multiprocessor systems2009
- Author(s)
  Hassan A.Youness, Keishi Sakanushi, Yoshinori Takeuchi, Ashraf Salem, Abdel-Moneim Wahdan, Masaharu Imai
- Journal Title
  
  IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences Vol.E92-A, No.4
  
  Pages: 1088-1095
- NAID
  10026857036
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20300017
[Presentation] Rocket-Chipへの三角関数演算命令の実装と評価2021
- Author(s)
  中尾怜史, 武内良典
- Organizer
  デザインガイア
- Data Source
  KAKENHI-PROJECT-20H00606
[Presentation] RISC-Vを用いた命令拡張のためのプロセッサ開発環境の検討2021
- Author(s)
  中尾怜史, 武内良典
- Organizer
  DAシンポジウム2021
- Data Source
  KAKENHI-PROJECT-20H00606
[Presentation] Challenges for Processor Instruction Extension in MPSoC Era2019
- Author(s)
  Yoshinori Takeuchi and Ryo Taketani
- Organizer
  19th International Forum on MPSoC for Software-defined Hardware 2019 (MPSoC 2019)
- Invited / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-17K00077
[Presentation] Configurable Processor Hardware Developing Environment for RISC-V with Vector Extension2019
- Author(s)
  Ryo Taketani and Yoshinori Takeuchi
- Organizer
  The 22nd Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2019)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-17K00077
[Presentation] RISC-Vを基本とする構成可変プロセッサのためのハードウェア開発環境の検討2019
- Author(s)
  竹谷凌，武内良典
- Organizer
  ETNET 2019, 情報処理学会研究報告, Vol. 2019, EMB-50, No. 12, pp.1-6, 2019年3月
- Data Source
  KAKENHI-PROJECT-17K00077
[Presentation] IoT時代の生体情報センシング2018
- Author(s)
  武内　良典
- Organizer
  2018年電子情報通信学会総合大会
- Invited
- Data Source
  KAKENHI-PROJECT-17K00077
[Presentation] Proposal of an Efficient Clock-Gating Mechanism for Multi-Core Processors to reduce Power Supply Noise2016
- Author(s)
  Jun Kawabe, Yoshinori Takeuchi, Jaehoon Yu, Masaharu Imai
- Organizer
  The 20th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2016)
- Place of Presentation
  Kyoto Research Park, Kyoto, Japan
- Year and Date
  2016-10-24
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26330064
[Presentation] 源ノイズ削減のためのマルチコアプロセッサ向けクロックゲーティング機構の提案2016
- Author(s)
  川部純, 武内良典, 劉載勲, 今井正治
- Organizer
  DAシンポジウム2016
- Place of Presentation
  山代温泉　ゆのくに天祥
- Year and Date
  2016-09-14
- Data Source
  KAKENHI-PROJECT-26330064
[Presentation] Higher reliable multiprocesosr system for embedded systems considering power source fluctuation2015
- Author(s)
  Yoshinori Takeuchi
- Organizer
  15th International Forum on MPSoC for Software-defined Hardware 2015 (MPSoC 2015)
- Place of Presentation
  Ventura Beach Marriott (Ventura, CA, USA)
- Year and Date
  2015-07-13
- Invited / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26330064
[Presentation] “A Efficient Performance Estimation Method of MPSoC with Configurable Multi-layer Bus System,"2015
- Author(s)
  Masaharu Imai, Salita Sombatsiri, and Yoshinori Takeuchi,
- Organizer
  5th International Forum on MPSoC for Software-defined Hardware 2015 (MPSoC 2015)　（招待講演）（国際学会）
- Place of Presentation
  Ventura Beach Marriott (Ventura, CA, USA)
- Year and Date
  2015-07-13
- Invited / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-25330059
[Presentation] An AMBA hierarchical shared bus architecture design space exploration method considering pipeline, burst and split transaction2013
- Author(s)
  Salita Sombatsiri, Kazuhiro Kobashi, Keishi Sakanushi, Yoshinori Takeuchi and Masaharu Imai
- Organizer
  IEEE 10th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology
- Place of Presentation
  Krabi, Thailand
- Data Source
  KAKENHI-PROJECT-25330059
[Presentation] 抽象度を変更可能な命令セットシミュレータの提案2012
- Author(s)
  井田健太, 坂主圭史, 武内良典, 今井正治
- Organizer
  組込み技術とネットワークに関するワークショップ(ETNET)
- Place of Presentation
  宮城県宮城郡松島町
- Year and Date
  2012-03-02
- Data Source
  KAKENHI-PROJECT-20300017
[Presentation] 開始温度を自動で設定するSA法を用いたマルチプロセッサ・タスク割当て最適化手法2012
- Author(s)
  柳父悠一郎, 坂主圭史, 武内良典, 今井正治
- Organizer
  第156回システムLSI設計技術研究会
- Place of Presentation
  北九州市
- Year and Date
  2012-05-30
- Data Source
  KAKENHI-PROJECT-20300017
[Presentation] Task Assignment Method for DVS based multiprocessor SoC2011
- Author(s)
  Yoshinori Takeuchi, Taichiro Shiraishi, Keishi Sakanushi, Masaharu Imai
- Organizer
  11th International Forum on Embedded MPSoC and Multicore (MPSoC 2011)
- Place of Presentation
  Beaune, France(招待講演)
- Year and Date
  2011-07-05
- Data Source
  KAKENHI-PROJECT-20300017
[Presentation] Task Assignment Method for DVS based multiprocessor SoC2011
- Author(s)
  Yoshinori Takeuchi, Taichiro Shiraishi, Keishi Sakanushi, and Masaharu Imai
- Organizer
  11th International Forum on Embedded MPSoC and Multicore(MPSoC 2011)
- Place of Presentation
  Beaune,France
- Year and Date
  2011-07-05
- Data Source
  KAKENHI-PROJECT-20300017
[Presentation] DVSを用いたマルチプロセッサ・システムのための低消費電力量タスク割当て手法2011
- Author(s)
  白石多一郎, 坂主圭史, 武内良典, 今井正治
- Organizer
  組込み技術とネットワークに関するワークショップETNET2011
- Place of Presentation
  沖縄県宮古島
- Year and Date
  2011-03-18
- Data Source
  KAKENHI-PROJECT-20300017
[Presentation] DVSを用いたマルチプロセッサ・システムのための低消費電力量タスク割当て手法2011
- Author(s)
  白石多一郎、坂主圭史、武内良典、今井正治
- Organizer
  組込み技術とネットワークに関するワークショップETNET2011
- Place of Presentation
  沖縄県宮古島市
- Year and Date
  2011-03-18
- Data Source
  KAKENHI-PROJECT-20300017
[Presentation] DVSを用いたマルチプロセッサ・システムのための低消費電力量タスク割当て手法2011
- Author(s)
  白石多一郎, 坂主圭史, 武内良典, 今井正治
- Organizer
  情報処理学会SLDM研究会
- Place of Presentation
  沖縄県宮古市
- Year and Date
  2011-03-18
- Data Source
  KAKENHI-PROJECT-20300017
[Presentation] Low Energy MDPC Implementation using Special Instructions on Application Domain Specific Instruction-Set Processor2010
- Author(s)
  Yoshinori Takeuchi, Hiroki Ohsawa, Tomohiro Kondo, Hirofumi Iwato, Keishi Sakanushi, Masaharu Imai
- Organizer
  Asia-Pacific Signal and Information Processing Association Annual Summit and Conference (APSIPA ACS 2010)
- Place of Presentation
  Singapore,シンガポール(招待講演)
- Year and Date
  2010-12-15
- Data Source
  KAKENHI-PROJECT-20500050
[Presentation] Design and Evaluation of Digital Receiver for Low Power Wireless Communication2010
- Author(s)
  Kazuki Ohya, Hirofumi Iwato, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai
- Organizer
  16th Workshop on Synthesis And System Integration of Mixed Information Technologies 2010 (SASIMI 2010)
- Place of Presentation
  台北，台湾
- Year and Date
  2010-10-19
- Data Source
  KAKENHI-PROJECT-20500050
[Presentation] Generation Method of Decomposed Small Area Instruction Decoder for Configurable Processor2010
- Author(s)
  Hiroki Ohsawa, Hirofumi Iwato, Keishi Sakanushi, Yoshinori Takeuchi, and Masaharu Imai
- Organizer
  The 16th Workshop on Synthesis And System Integration of Mixed Information Technologies 2010
- Place of Presentation
  Taipei, Taiwan
- Year and Date
  2010-10-18
- Data Source
  KAKENHI-PROJECT-20300017
[Presentation] Two-stage Configurable Decoder Model for Multiple Forward Error Correction Standards2010
- Author(s)
  谷口一徹, 小林礼貴, 坂主圭史, 武内良典, 今井正治
- Organizer
  8th IEEE Workshop on Embedded Systems for Real-time Multimedia (ESTIMedia 2010)
- Place of Presentation
  Scottsdale,アメリカ
- Year and Date
  2010-10-29
- Data Source
  KAKENHI-PROJECT-20500050
[Presentation] Design and Evaluation of Digital Receiver for Low Power Wireless Communication2010
- Author(s)
  Kazuki Ohya, Hirofumi Iwato, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai
- Organizer
  16th Workshop on Synthesis And System Integration of Mixed Information Technologies 2010 (SASIMI 2010)
- Place of Presentation
  台北,台湾
- Year and Date
  2010-10-19
- Data Source
  KAKENHI-PROJECT-20500050
[Presentation] 複数の誤り訂正符号に対応する再構成可能デコーダモデルの提案2010
- Author(s)
  谷口一徹, 小林礼貴, 坂主圭史, 武内良典, 今井正治
- Organizer
  情報処理学会,ETNET2010
- Place of Presentation
  東京
- Year and Date
  2010-03-26
- Data Source
  KAKENHI-PROJECT-20500050
[Presentation] Generation Method of Decomposed Small Area Instruction Decoder for Configurable Processor2010
- Author(s)
  Hiroki Ohsawa, Hirofumi Iwato, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai
- Organizer
  the 16th Workshop on Synthesis And System Integration of Mixed Information Technologies 2010 (SASIMI 2010)
- Place of Presentation
  台湾
- Year and Date
  2010-10-18
- Data Source
  KAKENHI-PROJECT-20300017
[Presentation] Generation of Application-domain Specific Instruction-set Processors2010
- Author(s)
  Yoshinori Takeuchi, Keishi Sakanushi, Masaharu Imai
- Organizer
  2010 International SoC Design Conference
- Place of Presentation
  Incheon, Korea(招待講演)
- Year and Date
  2010-11-22
- Data Source
  KAKENHI-PROJECT-20300017
[Presentation] Generation of Application-domain Specific Instruction-set Processors2010
- Author(s)
  Yoshinori Takeuchi, Keishi Sakanushi, and Masaharu Imai
- Organizer
  2010 International SoC Design Conference
- Place of Presentation
  Incheon, Korea
- Year and Date
  2010-11-22
- Data Source
  KAKENHI-PROJECT-20300017
[Presentation] 複数の誤り訂正符号に対応する再構成可能デコーダモデルの提案2010
- Author(s)
  谷口一徹, 小林礼貴, 坂主圭史, 武内良典, 今井正治
- Organizer
  情報処理学会ETNET2010
- Place of Presentation
  東京
- Year and Date
  2010-03-26
- Data Source
  KAKENHI-PROJECT-20500050
[Presentation] Simulator Generation Method of Configurable Processors for MPSoC2009
- Author(s)
  Yoshinori Takeuchi
- Organizer
  9th International Forum on Embedded MPSoC and Multicore(MPSoC'09)
- Place of Presentation
  Savannah,アメリカ
- Year and Date
  2009-08-05
- Data Source
  KAKENHI-PROJECT-20300017
[Presentation] 応用プログラムのプロファイル情報を用いたマルチプロセッサシステムの最適プロセッサ数の評価手法2009
- Author(s)
  今村多一郎, 坂主圭史, 武内良典, 今井正治
- Organizer
  電子情報通信学会2009 基礎・境界ソサイエティ大会
- Place of Presentation
  新潟県新潟市
- Year and Date
  2009-09-17
- Data Source
  KAKENHI-PROJECT-20300017
[Presentation] 応用プログラムのプロファイル情報を用いたマルチプロセッサシステムの最適プロセッサ数の評価手法2009
- Author(s)
  今村多一郎, 坂主圭史, 武内良典, 今井正治
- Organizer
  電子情報通信学会2009ソサイエティ大会
- Place of Presentation
  新潟
- Year and Date
  2009-09-17
- Data Source
  KAKENHI-PROJECT-20300017
[Presentation] 応用プログラムのプロファイル情報を用いたマルチプロセッサシステムの最適プロセッサ数の評価手法2009
- Author(s)
  今村多一郎, 坂主圭史, 武内良典, 今井正治
- Organizer
  電子情報通信学会2009ソサイエティ大会
- Place of Presentation
  新潟
- Year and Date
  2009-09-17
- Data Source
  KAKENHI-PROJECT-20500050
[Presentation] 共有メモリを考慮したSoCアーキテクチャ探索手法の提案2009
- Author(s)
  岡田千尋, 坂主圭史, 武内良典, 今井正治
- Organizer
  電子情報通信学会2009ソサイエティ大会
- Place of Presentation
  新潟
- Year and Date
  2009-09-17
- Data Source
  KAKENHI-PROJECT-20300017
[Presentation] Simulator Generation Method of Configurable Processors for MPSoC2009
- Author(s)
  Yoshinori Takeuchi
- Organizer
  9th International Forum on Embedded MPSoC and Multicore (MPSoC'09)
- Place of Presentation
  米国ジョージア州
- Year and Date
  2009-08-06
- Data Source
  KAKENHI-PROJECT-20300017
[Presentation] 共有メモリを考慮したSoCアーキテクチャ探索手法の提案2009
- Author(s)
  岡田千尋, 坂主圭史, 武内良典, 今井正治
- Organizer
  電子情報通信学会2009 基礎・境界ソサイエティ大会
- Place of Presentation
  新潟県新潟市
- Year and Date
  2009-09-17
- Data Source
  KAKENHI-PROJECT-20300017
[Presentation] Simulator Generation Method of Configurable Processors for MPSoC2009
- Author(s)
  Yoshinori Takeuchi
- Organizer
  9th International Forum on Embedded MPSoC and Multicore(MPSoC' 09)
- Place of Presentation
  Savannah,アメリカ
- Year and Date
  2009-08-05
- Data Source
  KAKENHI-PROJECT-20300017
[Presentation] 小型・低消費エネルギーなリコンフィギャラブル・アーキテクチャ向けスイッチボックス構成情報削減手法2008
- Author(s)
  谷口一徹, 小林礼貴, 坂主圭史, 武内良典, 今井正治
- Organizer
  情報処理学会DAシンポジウム2008
- Place of Presentation
  浜松
- Year and Date
  2008-08-26
- Data Source
  KAKENHI-PROJECT-20500050
[Presentation] プロセッサ記述からのSystemCベースシミュレータ生成手法の提案2008
- Author(s)
  樋口晃久, 坂主圭史, 武内良典, 今井正治
- Organizer
  情報処理学会DAシンポジウム2008
- Place of Presentation
  浜松
- Year and Date
  2008-08-26
- Data Source
  KAKENHI-PROJECT-20300017
[Presentation] 小型・低消費エネルギーなリコンフィギャラブル・アーキテクチャ向けスイッチボックス構成情報削減手法2008
- Author(s)
  谷口一徹, 小林礼貴, 坂主圭史, 武内良典, 今井正治
- Organizer
  情報処理学会,DAシンポジウム2008
- Place of Presentation
  浜松
- Year and Date
  2008-08-26
- Data Source
  KAKENHI-PROJECT-20500050
[Presentation] A Hierarchical Shared Bus Architecture Design Space Exploration
- Author(s)
  Yoshinori Takeuchi, Salita Sombatsiri, and Masaharu Imai
- Organizer
  14th International Forum on Embedded MPSoC and Multicore 2014 (MPSoC 2014)
- Place of Presentation
  Margaux, France
- Year and Date
  2014-07-07 – 2014-07-11
- Invited
- Data Source
  KAKENHI-PROJECT-25330059

1. IMAI Masaharu (50126926)

# of Collaborated Projects: 7 results

# of Collaborated Products: 33 results
2. SAKANUSHI Keishi (00346173)

# of Collaborated Projects: 3 results

# of Collaborated Products: 27 results
3. YU Jaehoon (70726976)

# of Collaborated Projects: 3 results

# of Collaborated Products: 2 results
4. SHIOMI Akichika (60242921)

# of Collaborated Projects: 2 results

# of Collaborated Products: 0 results
5. KIMURA Tsutomu (80225044)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
6. SATO Jun (10235351)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
7. SHIRAKAWA Isao (10029100)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
8. ONOYE Takao (60252590)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
9. 安浦寛人 (80135540)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
10. 八木哲也 (50183976)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
11. 石井和男 (10291527)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
12. 林田祐樹 (10381005)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
13. 廣瀬哲也 (70396315)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
14. 高橋啓介 (80236273)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
15. 末松尚史 (30779517)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
16. HIKICHI Nobuyuki

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results

TAKEUCHI YOSHINORI 武内 良典

TAKEUCHI Yoshinori 武内 良典

Research Projects

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Co-Researchers

網膜と視覚野の情報処理と通信に学んだ脳刺激型人工視覚の開発

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Study for Low Energy Information Sensing for IoT DevicesPrincipal Investigator

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Higher Reliable Task Assignment Method for Embedded MultiprocessorPrincipal Investigator

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Research for Task assignment methods considering input data variability

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極低消費電力プロセッサ生成手法

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Architecture Design Method for Multi-processor SoC

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Design Methodology for Dynamic Reconfigurable Component OptimizationPrincipal Investigator

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High-Performance Processor Design for Image Processing

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DEVELOPMENT OF MICROPROCESSOR ARCHITECURE DESIGN EDUCATION ENVIRONMENT

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ARCHITECTURE LEVEL DESIGN OPTIMIZATION METHODS FOR MICROPROCESSORS

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[Journal Article] CODEC system using EG2C chips and power control with a sleep mode for a visual prosthesis2024

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[Journal Article] オペコードコンパクト化によるプロセッサの回路面積低減の評価2023

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[Journal Article] 視覚野刺激型人工視覚システムの刺激データに対する圧縮プロセッサ設計2023

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[Journal Article] 人工視覚システムのデータ圧縮伸長モジュールのFPGA実装2023

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TAKEUCHI YOSHINORI 武内良典

TAKEUCHI Yoshinori 武内良典