SATOH Shinichi 佐藤真一

Researcher Number	80382258
Affiliation (based on the past Project Information) *help	2006: University of Hyogo, Graduate School of Engineering, Professor, 大学院工学研究科, 教授 2005: 兵庫県立大学, 大学院・工学研究科, 教授
Review Section/Research Field	Except Principal Investigator Applied materials science/Crystal engineering
Keywords	Except Principal Investigator interface trap / capacitance-voltage method / scanning capacitance microscopy / contactless characterization / high-k gate insulator / 過渡容量分光法 / フェルミピニング / 界面トラップ / C-V法 / 走査型容量顕微鏡 / 非接触評価 / High-k絶縁膜

Investigation of high-k gate insulator and its interface property by contactless capacitance transient spectroscopy
- Principal Investigator
  
  YOSHIDA Haruhiko
- Project Period (FY)
  2005 – 2006
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  Applied materials science/Crystal engineering
- Research Institution
  University of Hyogo

All 2007 2006

All Journal Article

[Journal Article] Local Characterization of Interface Properties of High-k Gate Stacks by Scanning Capacitance Microscopy.2007
- Author(s)
  S.Kuge, H.Yoshida, M.Inoue, S.Satoh
- Journal Title
  
  Proc. of The 2007 International Meeting for Future of Electron Devices, Kansai, IEEE
  
  Pages: 111-112
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-17560012
[Journal Article] Local Characterization of Interface Properties of High-k Gate Stacks by Scanning Capacitance Microscopy2007
- Author(s)
  S.Kuge, H.Yoshida, M.Inoue, S.Satoh
- Journal Title
  
  Proc. of The 2007 International Meeting for Future of Electron Devices, Kansai, IEEE
  
  Pages: 111-112
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-17560012
[Journal Article] Local Characterization of Interface Properties of High-k Gate Stacks by Scanning Capacitance Microscopy2007
- Author(s)
  S.Kuge, H.Yoshida, M.Inoue, S.Satoh
- Journal Title
  
  Proc. of The 2007 International Meeting for Future of Electron Devices, Kansai, IEEE (in press)
- Data Source
  KAKENHI-PROJECT-17560012
[Journal Article] Electrical Characterization of High-k Dielectrics/Si Interface by Contactless C-V Method2006
- Author(s)
  K.Fukano, H.Yoshida, M.Inoue, S.Satoh
- Journal Title
  
  Proc. of The 2006 International Meeting for Future of Electron Devices, Kansai, IEEE
  
  Pages: 63-64
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-17560012
[Journal Article] Electrical Characterization of High-k Dielectrics/Si Interface by Contactless C-V Method.2006
- Author(s)
  K.Fukano, H.Yoshida, M.Inoue, S.Satoh
- Journal Title
  
  Proc. of The 2006 International Meeting for Future of Electron Devices, Kansai, IEEE
  
  Pages: 63-64
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-17560012

1. YOSHIDA Haruhiko (90264837)

# of Collaborated Projects: 1 results

# of Collaborated Products: 5 results

SATOH Shinichi 佐藤真一

Research Projects

Research Products

Co-Researchers

Investigation of high-k gate insulator and its interface property by contactless capacitance transient spectroscopy

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

[Journal Article] Local Characterization of Interface Properties of High-k Gate Stacks by Scanning Capacitance Microscopy.2007

Author(s)

Journal Title

Description

Data Source

[Journal Article] Local Characterization of Interface Properties of High-k Gate Stacks by Scanning Capacitance Microscopy2007

Author(s)

Journal Title

Description

Data Source

[Journal Article] Local Characterization of Interface Properties of High-k Gate Stacks by Scanning Capacitance Microscopy2007

Author(s)

Journal Title

Data Source

[Journal Article] Electrical Characterization of High-k Dielectrics/Si Interface by Contactless C-V Method2006

Author(s)

Journal Title

Description

Data Source

[Journal Article] Electrical Characterization of High-k Dielectrics/Si Interface by Contactless C-V Method.2006

Author(s)

Journal Title

Description

Data Source

SATOH Shinichi 佐藤 真一

Research Projects

Research Products

Co-Researchers

Investigation of high-k gate insulator and its interface property by contactless capacitance transient spectroscopy

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

[Journal Article] Local Characterization of Interface Properties of High-k Gate Stacks by Scanning Capacitance Microscopy.2007

Author(s)

Journal Title

Description

Data Source

[Journal Article] Local Characterization of Interface Properties of High-k Gate Stacks by Scanning Capacitance Microscopy2007

Author(s)

Journal Title

Description

Data Source

[Journal Article] Local Characterization of Interface Properties of High-k Gate Stacks by Scanning Capacitance Microscopy2007

Author(s)

Journal Title

Data Source

[Journal Article] Electrical Characterization of High-k Dielectrics/Si Interface by Contactless C-V Method2006

Author(s)

Journal Title

Description

Data Source

[Journal Article] Electrical Characterization of High-k Dielectrics/Si Interface by Contactless C-V Method.2006

Author(s)

Journal Title

Description

Data Source

SATOH Shinichi 佐藤真一