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Sasao Tsutomu  笹尾 勤

… Alternative Names

SASAO Tsutomu  笹尾 勤

Less
Researcher Number 20112013
Other IDs
  • ORCIDhttps://orcid.org/0000-0001-7230-2161
External Links
Affiliation (Current) 2025: 明治大学, 研究・知財戦略機構(生田), 研究推進員(客員研究員)
Affiliation (based on the past Project Information) *help 2025: 明治大学, 研究・知財戦略機構(生田), 研究推進員(客員研究員)
2023: 明治大学, 研究・知財戦略機構(生田), 研究推進員(客員研究員)
2020 – 2022: 明治大学, 研究・知財戦略機構, 研究推進員(客員研究員)
2016 – 2019: 明治大学, 理工学部, 専任教授
2013 – 2015: 明治大学, 理工学部, 教授 … More
2011 – 2012: 九州工業大学, 大学院情報工学研究院, 教授
2008 – 2009: Kyushu Institute of Technology, 大学院・情報工学研究院, 教授
2007: Kyushu Institute of Technology, 情報工学部, 教授
1993 – 2005: Kyusyu Institute of Technology, Faculty of Information Engineering, 情報工学部, 教授
2002: Kyushu Institute of Technology Department of Computer Science and Electronics, Professor
1992: Kyushu Institute of Technology Department of Computer Science and Electronics, A
1988 – 1992: 九州工業大学, 情報工学部, 助教授
1991: Kyushu Institute of Technology Department of Computer Science and Technology, As
1989: Kyushu Institute of Technology Department of Computer Science and Technology, As
1986 – 1987: 大阪大学, 工学部, 助手 Less
Review Section/Research Field
Principal Investigator
計算機科学 / Computer system/Network / Basic Section 60040:Computer system-related / 情報工学 / Computer system / 計算機工学
Except Principal Investigator
計算機工学
Keywords
Principal Investigator
論理設計 / BDD / 関数分解 / FPGA / 多段論理回路 / LSIのCAD / 論理合成 / Logic Minimization / EXOR / 算術回路 … More / 線形関数 / パターンマッチング / インデックス生成関数 / CAM(連想メモリ) / 再構成可能論理 / AND-OR-EXOR / Reed-Muller Expansion / Multi-level Logic Synthesis / Binary Decision Diagrams / PLA / 書き換え可能回路 / 不完全定義関数 / 分類関数 / 変数最小化 / 国際研究者交流 / Logic design / FGPA / テスト生成 / Three-Level Logic / EXOR Logic Synthesis / Functional Decomposition / CAM(連想メモリ) / ルータ / 国際研究者交流、米国 / メモリ / パターン認識 / ハードウエア / 国際研究者交流, 米国 / データマイニング / 機械学習 / 国際研究者交流, 米国,スエーデン / モンテカルロ法 / CAM(連想メモリ) / AND-EXOR CIRCUITS / MULTI-LEVEL LOGIC SYNTHESIS / CAD FOR LSI / ENCODING PROBLEM / DECOMPOSITION OF LOGIC CIRCUITS / PROGRAMMABLE LOGIC ARRAY / LOGIC DESIGN / 制御回路 / 符号化問題 / 論理回路の分解 / functional decomposition / Binary decision diagram / Reconfigurable logic / Memory / 再構成可能倫理 / 再編成可能論理 / Logic synthesis / Reconfigurable logic device / Functional decomposition / Design verification / Logic simulator / 倫理シミュレータ / 設計検証 / 論理シミュレータ / Test pattern generation / Path selection / Path delay fault / Delay testing / High-performance VLSI / 遅延故障 / 故障検査 / VLSI / テストパターン変換 / ハフマン符号 / テストデータ圧縮 / ドント・ケア / 遅延故障テスト / テストパターン生成 / パス選択 / パス遅延故障 / 遅延テスト / 二分決定グラフ / 高性能VLSI / Multiple-Valued Logic / Time domain multiplexing (TDM) / Symmetric functions / Multiple-output logic function / Multilevel Logic Synthesis / FPGA design / 最小形 / 論理関数 / Complexity of logic networks / Programmable logic device / PLD / 非冗長論理和形 / 論理関数の複雑度 / 論理関数の分解 / 検査容易化設計 / Field Programmable Gate Array / EXOR Logic / Ternary Decision Diagrams / TDD / Representations of Logic Functions / 算術演算回路 / Multi-Level Logic Synthesis / AND-EXOR Circuits / Logic Design / Programmable Gate Array / LSlのCAD / プログラマブル・ゲ-トアレイ / PGA / EXOR論理合成 / 二分岐判定図 / 5 CAM(連想メモリ) / 国際研究者交流、米 / CAM(連想メモリ) / CAM(連想メモリ) / 米国 / 国際研究者交流, / コンピュータウイルス検出 / 線形変換 / LPM / IPアドレス / アドレス変換回路 / CAM / 電子デバイス / 計算機システム … More
Except Principal Investigator
図的言語 / VLSI / Diagrammatical Language / Data-driven / 流れ形処理概念 / データ駆動 / ULSI / Multiple Valued Logic / Programmable Logic Array / Flow-thru Processing / Ultra Parallel Processing Scheme / Ultra Parallel Algorithm / 多値論理 / プログラマブルロジックアレイ / デ-タ駆動 / 超並列処理方式 / 超並列アルゴリズム / Pico-program / "Flow-Thru processing" Mechanism / Highly-parallel Processing / トークンフローモデル / 連想処理 / ピコプログラム / 高度並列処理 / data-driven / compiler / prototyping method / software environment / user language / specification language / diagrammatical language / トップダウン設計 / データ駆動形並列処理方式 / 仕様記述言語 / 計算機アーキテクチャ / コンパイラ / プロトタイピング手法 / ソフトウェア環境 / 利用者言語 / 要求仕様記述言語 / データ駆動原理 / Multiple-Valued Integrated Devices / Device-Model Based Electronics / Small Interconnection Delay / Small Critical-Delay Path / Ultra Fine Integrated Circuits / Linear Digital System / Highly Parallel Multiple-Valued Arithmetic and Logic Circuits / Intelligent Integrated Systems / 空間的並列構造プロセッサ / 多値集積回路 / 専用VLSIプロセッサ / 高並列演算回路 / 多値情報処理 / 多値集積デバイス / デバイスモデルベーストエレクトロニクス / 微小配線遅延 / 微小クリティカルパス遅延 / 超微細集積回路 / 線形ディジタルシステム / 高並列多値演算回路 / 知能集積システム Less
  • Research Projects

    (21 results)
  • Research Products

    (282 results)
  • Co-Researchers

    (19 People)
  •  量子化ニューラルネットワーク用論理合成技術の開発Principal Investigator

    • Principal Investigator
      笹尾 勤
    • Project Period (FY)
      2025 – 2027
    • Research Category
      Grant-in-Aid for Scientific Research (C)
    • Review Section
      Basic Section 60040:Computer system-related
    • Research Institution
      Meiji University
  •  Minimization of variables for classification functions, and its applications.Principal Investigator

    • Principal Investigator
      笹尾 勤
    • Project Period (FY)
      2020 – 2024
    • Research Category
      Grant-in-Aid for Scientific Research (C)
    • Review Section
      Basic Section 60040:Computer system-related
    • Research Institution
      Meiji University
  •  Study on decompositions of index generation functions.Principal Investigator

    • Principal Investigator
      Sasao Tsutomu
    • Project Period (FY)
      2017 – 2019
    • Research Category
      Grant-in-Aid for Scientific Research (C)
    • Research Field
      Computer system
    • Research Institution
      Meiji University
  •  Research on the design of a fast updatable index generation circuitPrincipal Investigator

    • Principal Investigator
      Sasao Tsutomu
    • Project Period (FY)
      2014 – 2017
    • Research Category
      Grant-in-Aid for Scientific Research (C)
    • Research Field
      Computer system
    • Research Institution
      Meiji University
  •  Logic synthesis using linear transformation and memories.Principal Investigator

    • Principal Investigator
      SASAO Tsutomu
    • Project Period (FY)
      2011 – 2013
    • Research Category
      Grant-in-Aid for Scientific Research (B)
    • Research Field
      Computer system/Network
    • Research Institution
      Meiji University
      Kyushu Institute of Technology
  •  A study on the realization and application of content-addressable memory using general-purpose memoryPrincipal Investigator

    • Principal Investigator
      SASAO Tsutomu
    • Project Period (FY)
      2007 – 2009
    • Research Category
      Grant-in-Aid for Scientific Research (B)
    • Research Field
      Computer system/Network
    • Research Institution
      Kyushu Institute of Technology
  •  ルック・アップ・テーブル・リングの論理合成Principal Investigator

    • Principal Investigator
      笹尾 勤
    • Project Period (FY)
      2004 – 2005
    • Research Category
      Grant-in-Aid for Exploratory Research
    • Research Field
      Computer system/Network
    • Research Institution
      Kyushu Institute of Technology
  •  Research on programmable logic elements using the virtual wiring and their logic synthesis methodPrincipal Investigator

    • Principal Investigator
      SASAO Tsutomu
    • Project Period (FY)
      2002 – 2004
    • Research Category
      Grant-in-Aid for Scientific Research (B)
    • Research Field
      計算機科学
    • Research Institution
      Kyusyu Institute of Technology
  •  Development of hardware logic simulator using decision diagramsPrincipal Investigator

    • Principal Investigator
      SASAO Tsutomu
    • Project Period (FY)
      2000 – 2002
    • Research Category
      Grant-in-Aid for Scientific Research (B)
    • Research Field
      計算機科学
    • Research Institution
      Kyushu Institute of Technology
  •  Studies on logic design and testing methodology for very high performance VLSIsPrincipal Investigator

    • Principal Investigator
      SASAO Tsutomu
    • Project Period (FY)
      1999 – 2001
    • Research Category
      Grant-in-Aid for Scientific Research (B)
    • Research Field
      計算機科学
    • Research Institution
      Kyushu Institute of Technology
  •  Decomposition of Large-Scale Logic FunctionsPrincipal Investigator

    • Principal Investigator
      SASAO Tsutomu
    • Project Period (FY)
      1998 – 2000
    • Research Category
      Grant-in-Aid for Scientific Research (C)
    • Research Field
      計算機科学
    • Research Institution
      Kyushu Institute of Technology
  •  A Research on the realization of three-level logic networksPrincipal Investigator

    • Principal Investigator
      SASAO Tsutomu
    • Project Period (FY)
      1996 – 1997
    • Research Category
      Grant-in-Aid for Scientific Research (C)
    • Research Field
      計算機科学
    • Research Institution
      Kyusyu Institute of Technology
  •  A Research on the development of a logic synthesis system using EXOR gatesPrincipal Investigator

    • Principal Investigator
      SASAO Tsutomu
    • Project Period (FY)
      1993 – 1995
    • Research Category
      Grant-in-Aid for Developmental Scientific Research (B)
    • Research Field
      計算機科学
    • Research Institution
      Kyushu Institute of Technology
  •  A Research on the Representation and Manipulation of Logical Expressions using Ternary Decision DiagramsPrincipal Investigator

    • Principal Investigator
      SASAO Tsutomu
    • Project Period (FY)
      1993 – 1994
    • Research Category
      Grant-in-Aid for General Scientific Research (C)
    • Research Field
      計算機科学
    • Research Institution
      Kyushu Institute of Technology
  •  Study on Post-Binary ULSI Sstems

    • Principal Investigator
      KAMEYAMA Michitaka
    • Project Period (FY)
      1992 – 1993
    • Research Category
      Grant-in-Aid for international Scientific Research
    • Research Institution
      Tohoku University, Graduate School of Information Sciences
  •  Development of A Silicon Complilation System for Rewritable LSIsPrincipal Investigator

    • Principal Investigator
      SASAO Tsutomu
    • Project Period (FY)
      1990 – 1992
    • Research Category
      Grant-in-Aid for Developmental Scientific Research (B)
    • Research Field
      情報工学
    • Research Institution
      Kyushu Institute of Technology
  •  Logic synthesis using EXOR gatesPrincipal Investigator

    • Principal Investigator
      SASAO Tsutomu
    • Project Period (FY)
      1990 – 1991
    • Research Category
      Grant-in-Aid for General Scientific Research (C)
    • Research Field
      情報工学
    • Research Institution
      Kyushu Institute of Technology
  •  Decomposition of large-scale Programmable logic arraysPrincipal Investigator

    • Principal Investigator
      SASAO Tsutomu
    • Project Period (FY)
      1988 – 1989
    • Research Category
      Grant-in-Aid for General Scientific Research (C)
    • Research Field
      計算機工学
    • Research Institution
      Kyushu Institute of Technology
  •  Data-Driven Ultra-Parallel Processing Scheme Based on "Flow-Thru Processing" Concept

    • Principal Investigator
      TERADA Hiroaki
    • Project Period (FY)
      1988 – 1990
    • Research Category
      Grant-in-Aid for Developmental Scientific Research (B).
    • Research Field
      計算機工学
    • Research Institution
      Osaka University
  •  User-language processing system based on diagrammatical representations

    • Principal Investigator
      TERADA Hiroaki
    • Project Period (FY)
      1986 – 1988
    • Research Category
      Grant-in-Aid for General Scientific Research (B)
    • Research Field
      計算機工学
    • Research Institution
      Osaka University
  •  ULSI-oriented data-driven highly-parallel processing scheme based on diagrammatical languwges

    • Principal Investigator
      HIROAKI TERADA
    • Project Period (FY)
      1986 – 1987
    • Research Category
      Grant-in-Aid for Developmental Scientific Research
    • Research Field
      計算機工学
    • Research Institution
      Osaka University

All 2024 2023 2022 2021 2020 2019 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009 2008 2007 2005 2004 2003 2002 Other

All Journal Article Presentation Book Patent

  • [Book] Classification Functions for Machine Learning and Data Mining2023

    • Author(s)
      T. Sasao
    • Total Pages
      144
    • Publisher
      Springer Nature
    • ISBN
      9783031353468
    • Data Source
      KAKENHI-PROJECT-20K11739
  • [Book] Index Generation Functions2019

    • Author(s)
      Tsutomu Sasao
    • Total Pages
      165
    • Publisher
      Morgan and Glaypool
    • ISBN
      9781681736754
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Book] Further Improvements in the Boolean Domain2018

    • Author(s)
      Jon T. Butler and T. Sasao,
    • Total Pages
      536
    • Publisher
      Cambridge Scholars Publishe
    • ISBN
      9781527503717
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Book] Further Improvements in the Boolean Domain2018

    • Author(s)
      Jon T. Butler and T. Sasao
    • Total Pages
      536
    • Publisher
      Cambridge Scholars Publisher
    • ISBN
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Book] Advance of Logic Synthesis2017

    • Author(s)
      T. Sasao and J. T. Butler,
    • Total Pages
      232
    • Publisher
      Springer
    • ISBN
      9783319672946
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Book] Advance of Logic Synthesis2017

    • Author(s)
      T. Sasao and J. T. Butler
    • Total Pages
      232
    • Publisher
      Springer
    • ISBN
      9783319672946
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Book] Applications of Zero-Suppressed Decision Diagrams2014

    • Author(s)
      T. Sasao and J. T. Butler
    • Publisher
      Morgan-Claypool
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Book] Memory-Based Logic Synthesis2011

    • Author(s)
      T. Sasao
    • Total Pages
      189
    • Publisher
      Springer
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Book] Progress in Applications of Boolean Functions2010

    • Author(s)
      T.Sasao, J.T.Butler(ed)
    • Total Pages
      153
    • Publisher
      Morgan & Claypool Publishers
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Book] Progress in Applications of Boolean Functions, Morgan & Claypool Publishers

    • Author(s)
      T. Sasao, J. T. Butler
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Journal Article] On easily reconstructable logic functions2024

    • Author(s)
      T. Sasao
    • Journal Title

      IEICE Transactions on Information and Systems

      Volume: E107-D

    • Peer Reviewed / Open Access
    • Data Source
      KAKENHI-PROJECT-20K11739
  • [Journal Article] Realization of Multi-Terminal Universal Interconnection Networks Using Contact Switches2021

    • Author(s)
      T. Sasao, T.Matsubara, K. Tsuji and Y. Koga,
    • Journal Title

      IEICE Trans. Inf. & Syst.

      Volume: E104.D Issue: 8 Pages: 1068-1075

    • DOI

      10.1587/transinf.2020LOP0001

    • NAID

      130008070408

    • ISSN
      0916-8532, 1745-1361
    • Year and Date
      2021-08-01
    • Language
      English
    • Peer Reviewed
    • Data Source
      KAKENHI-PROJECT-20K11739
  • [Journal Article] Classification Functions for Handwritten Digit Recognition2021

    • Author(s)
      T. Sasao, Y. Horikawa, and Y. Iguchi,
    • Journal Title

      IEICE Trans. Inf. & Syst.

      Volume: E104.D Issue: 8 Pages: 1076-1082

    • DOI

      10.1587/transinf.2020LOP0002

    • NAID

      130008070403

    • ISSN
      0916-8532, 1745-1361
    • Year and Date
      2021-08-01
    • Language
      English
    • Peer Reviewed
    • Data Source
      KAKENHI-PROJECT-20K11739
  • [Journal Article] A Fast Updatable Implementation of Index Generation Functions Using Multiple IGUs2017

    • Author(s)
      SASAO Tsutomu
    • Journal Title

      IEICE Trans. Inf. & Syst.

      Volume: E100.D Issue: 8 Pages: 1574-1582

    • DOI

      10.1587/transinf.2016LOP0001

    • NAID

      130005876098

    • ISSN
      0916-8532, 1745-1361
    • Language
      English
    • Peer Reviewed
    • Data Source
      KAKENHI-PROJECT-17K00086, KAKENHI-PROJECT-26330072
  • [Journal Article] A linear decomposition of index generation functions: Optimization using autocorelation functions2017

    • Author(s)
      T. Sasao
    • Journal Title

      Journal of Multiple-Valued Logic and Soft Computing

      Volume: 28 Pages: 105-127

    • Peer Reviewed / Acknowledgement Compliant
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Journal Article] A Method to Detect Bit Flips in a Soft-Error Resilient TCAM2017

    • Author(s)
      Syafalni Infall、Sasao Tsutomu、Wen Xiaoqing
    • Journal Title

      IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

      Volume: 37-8 Issue: 6 Pages: 1-1

    • DOI

      10.1109/tcad.2017.2748019

    • Peer Reviewed / Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-17K00086, KAKENHI-PROJECT-26330072, KAKENHI-PROJECT-17H01716
  • [Journal Article] A Balanced Decision Tree Based Heuristic for Linear Decomposition of Index Generation Functions2017

    • Author(s)
      Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
    • Journal Title

      IEICE Trans. Inf. & Syst.

      Volume: E100.D Issue: 8 Pages: 1583-1591

    • DOI

      10.1587/transinf.2016LOP0013

    • NAID

      130005876136

    • ISSN
      0916-8532, 1745-1361
    • Language
      English
    • Peer Reviewed / Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-16K00079, KAKENHI-PROJECT-17K00086, KAKENHI-PROJECT-26330072
  • [Journal Article] A set partition number system2016

    • Author(s)
      J. T. Butler and T. Sasao
    • Journal Title

      Australasian Journal of Combinatorics

      Volume: 65 Pages: 152-168

    • Peer Reviewed / Acknowledgement Compliant / Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Journal Article] An Update Method for a Low Power CAM Emulator using an LUT Cascade Based on an EVMDD (k)2016

    • Author(s)
      H. Nakahara, T. Sasao, M. Matsuura, and H. Iwamoto
    • Journal Title

      Journal of Multiple-Valued Logic and Soft Computing

      Volume: 26 Pages: 109-123

    • Peer Reviewed / Acknowledgement Compliant
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Journal Article] LUT cascades based on edge-valued multi-valued decision diagrams: Application to packet classification2016

    • Author(s)
      H. Nakahara, T. Sasao, H. Iwamoto, and M. Matsuura
    • Journal Title

      IEEE Journal on Emerging and Selected Topics in Circuits and Systems

      Volume: 6 Issue: 1 Pages: 73-86

    • DOI

      10.1109/jetcas.2016.2528638

    • Peer Reviewed / Acknowledgement Compliant
    • Data Source
      KAKENHI-PROJECT-26330072, KAKENHI-PROJECT-15H05304
  • [Journal Article] High-speed hardware partition generation2015

    • Author(s)
      J. T. Butler and T. Sasao
    • Journal Title

      ACM Transactions on Reconfigurable Technology and Systems

      Volume: 7

    • Peer Reviewed / Acknowledgement Compliant
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Journal Article] A Memory-based IPv6 lookup architecture using parallel index generation units2015

    • Author(s)
      H. Nakahara,T. Sasao, M. Matsuura, H. Iwamoto, and Y. Terao,
    • Journal Title

      IEICE Trans. Inf. and Syst

      Volume: E98-D

    • NAID

      130004841817

    • Peer Reviewed / Acknowledgement Compliant
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Journal Article] Piecewise arithmetic expressions of numeric functions and their application to design of numeric function generators2014

    • Author(s)
      S. Nagayama, T. Sasao, and J. T. Butler
    • Journal Title

      Journal of Multiple-Valued Logic and Soft Computing

      Volume: 23

    • Peer Reviewed / Acknowledgement Compliant
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Journal Article] Index generation functions: Tutorial2014

    • Author(s)
      T. Sasao
    • Journal Title

      Journal of Multiple-Valued Logic and Soft Computing

      Volume: 23

    • Peer Reviewed / Acknowledgement Compliant
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Journal Article] A heterogeneous multi-valued decision diagram machine for encoded characteristic function for non-zero outputs2014

    • Author(s)
      H. Nakahara, T. Sasao, M. Matsuura
    • Journal Title

      Journal of Multiple-Valued Logic and Soft Computing

      Volume: 23

    • Peer Reviewed / Acknowledgement Compliant
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Journal Article] EVMDD-Based analysis and diagnosis methods of multi-state systems with multi-state components2014

    • Author(s)
      S. Nagayama, T. Sasao and J. T. Butler
    • Journal Title

      Journal of Multiple-Valued Logic and Soft Computing

      Volume: Vol. 22, No.1-2 Pages: 59-78

    • URL

      http://www.lsi-cad.com/sasao/Papers/pub2014.html

    • Data Source
      KAKENHI-PROJECT-23300016
  • [Journal Article] EVMDD-Based analysis and diagnosis methods of multi-state systems with multi-state components2014

    • Author(s)
      S. Nagayama, T. Sasao and J. T. Butler,
    • Journal Title

      Journal of Multiple-Valued Logic and Soft Computing

      Volume: 22

    • Peer Reviewed / Acknowledgement Compliant
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Journal Article] A packet classifier based on prefeching EVMDD(k) machines2014

    • Author(s)
      H. Nakahara, T. Sasao and M. Matsuura,
    • Journal Title

      IEICE Transactions on Information and Systems

      Volume: E97-D

    • Peer Reviewed / Acknowledgement Compliant
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Journal Article] A Method to find linear decompositions for incompletely specified index generation functions using difference matrix2014

    • Author(s)
      T. Sasao, Y. Urano, and Y. Iguchi
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics, Communication and Computer Sciences

      Volume: E97-A

    • NAID

      130004706405

    • Peer Reviewed / Acknowledgement Compliant
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Journal Article] Head-tail expressions for interval functions2014

    • Author(s)
      I. Syafalni and T. Sasao,
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics, Communication and Computer Sciences,

      Volume: E97-A

    • NAID

      130004696723

    • Peer Reviewed / Acknowledgement Compliant
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Journal Article] On optimizations of edge-valued MDDs for fast analysis of multi-state systems2014

    • Author(s)
      S. Nagayama, T. Sasao, J. T. Butler, M. A. Thornton, and T. W. Manikas
    • Journal Title

      IEICE Transactions on Information and Systems

      Volume: E97-D

    • NAID

      130004685463

    • Peer Reviewed / Acknowledgement Compliant
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Journal Article] On the number of products in prefix SOPs for interval functions2013

    • Author(s)
      I. Syafalni and T. Sasao
    • Journal Title

      IEICE Trans. on Information and Systems

      Volume: Vol. E96-D, No.5 Pages: 1086-1094

    • NAID

      10031193961

    • URL

      http://www.lsi-cad.com/sasao/Papers/pub2013.html

    • Data Source
      KAKENHI-PROJECT-23300016
  • [Journal Article] A virus scanning engine using an MPU and an IGU based on row-shift decomposition2013

    • Author(s)
      H. Nakahara, T. Sasao, and M. Matsuura
    • Journal Title

      IEICE Transactions on Information and Systems

      Volume: Vol.E96-D, No.8 Pages: 1667-1675

    • NAID

      130003370948

    • URL

      http://www.lsi-cad.com/sasao/Papers/pub2013.html

    • Data Source
      KAKENHI-PROJECT-23300016
  • [Journal Article] パターンマッチング用プログラマブル論理回路とその設計法2013

    • Author(s)
      笹尾勤
    • Journal Title

      電子情報通信学会誌

      Volume: Vol.96, No.2 Pages: 100-104

    • NAID

      110009586282

    • URL

      http://www.lsi-cad.com/sasao/Papers/pub2013.html

    • Data Source
      KAKENHI-PROJECT-23300016
  • [Journal Article] Multiple-valued index generation functions : Reduction of variables by linear transformation2013

    • Author(s)
      T. Sasao
    • Journal Title

      Journal of Multiple-Valued Logic and Soft Computing

      Volume: Vol. 21, No.5-6 Pages: 541-559

    • URL

      http://www.lsi-cad.com/sasao/Papers/pub2013.html

    • Data Source
      KAKENHI-PROJECT-23300016
  • [Journal Article] Multiple-valued index generation functions: Reduction of variables by linear transformation2013

    • Author(s)
      T. Sasao
    • Journal Title

      Journal of Multiple-Valued Logic and Soft Computing

      Volume: 21 Pages: 541-559

    • Peer Reviewed
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Journal Article] A design method of a regular expression matching circuit based on decomposed automaton2012

    • Author(s)
      H. Nakahara, T. Sasao, and M. Matsuura
    • Journal Title

      IEICE Transactions on Information and Systems

      Volume: Vol. E95-D, No.2 Pages: 364-373

    • NAID

      10030610597

    • URL

      http://www.lsi-cad.com/sasao/Papers/pub2012.html

    • Data Source
      KAKENHI-PROJECT-23300016
  • [Journal Article] A Comparison of multi-valued and heterogeneous decision diagram machines2012

    • Author(s)
      H. Nakahara, T. Sasao and M. Matsuura
    • Journal Title

      Journal of Multiple-Valued Logic and Soft Computing

      Volume: Vol. 19, No.1-3 Pages: 203-217

    • URL

      http://www.lsi-cad.com/sasao/Papers/pub2012.html

    • Data Source
      KAKENHI-PROJECT-23300016
  • [Journal Article] A Regular expression matching circuit: Decomposed non-deterministic realization with prefix sharing and multi-character transition2012

    • Author(s)
      H. Nakahara, T. Sasao, and M. Matsuura
    • Journal Title

      Microprocessors and Microsystems

      Volume: 36 Pages: 644-664

    • Peer Reviewed
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Journal Article] A Regular expression matching circuit : Decomposed non-deterministic realization with prefix sharing and multi-character transition2012

    • Author(s)
      H. Nakahara, T. Sasao, and M. Matsuura
    • Journal Title

      Microprocessors and Microsystems

      Volume: Vol. 36 Issue: 8 Pages: 644-664

    • DOI

      10.1016/j.micpro.2012.05.009

    • Data Source
      KAKENHI-PROJECT-23300016
  • [Journal Article] A fast segmentation algorithm for piecewise polynomial numeric function generators2011

    • Author(s)
      J.T. Butler, C. L. Frenzen, N. Macaria, and T. Sasao
    • Journal Title

      Journal of Computational and Applied Mathematics

      Volume: Vol. 235, Issue14 Issue: 14 Pages: 4076-4082

    • DOI

      10.1016/j.cam.2011.02.033

    • Data Source
      KAKENHI-PROJECT-23300016
  • [Journal Article] Programmable Architectures and design methods for two-variable numeric function generators2010

    • Author(s)
      S.Nagayama, T.Sasao, J.T.Butier
    • Journal Title

      IPSJ Transactions on System LSI Design Methodology 3

      Pages: 118-129

    • NAID

      130000251501

    • Peer Reviewed
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Journal Article] Complexities of graph-based representations for elementary functions2009

    • Author(s)
      S. Nagayama, T. Sasao
    • Journal Title

      IEEE Transactions on Computers Vol.C-58,No.1

      Pages: 106-119

    • NAID

      120002441442

    • Peer Reviewed
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Journal Article] Complexities of graph-based representations for elementary functions2009

    • Author(s)
      S. Nagayama, T. Sasao
    • Journal Title

      IEEE Transactions on Computers Vol. C-58

      Pages: 106-119

    • NAID

      120002441442

    • Peer Reviewed
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Journal Article] On the design of LPM adress generators using multiple LUT Cascades on FPGAs2007

    • Author(s)
      H.Qin, T.Sasao, and J.T.Butler
    • Journal Title

      International Journal of Electronics Vol.94

      Pages: 905-914

    • Peer Reviewed
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Journal Article] A new equivalence relation of logic funtions and its application in the design of AND-OR-EXOR networks2007

    • Author(s)
      D.Debnath and T.Sasao
    • Journal Title

      IEICE Transaction, Special Section of Discrete Mathematics and Its Applications Vol.E90-A

      Pages: 932-940

    • Peer Reviewed
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Journal Article] On designs of radix converters using arithmetic decompositions2007

    • Author(s)
      Y.Iguchi, T.Sasao, and M.Matsuura
    • Journal Title

      Journal of Multiple-Valued Logic Vol.13

      Pages: 503-520

    • NAID

      110004822621

    • Peer Reviewed
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Journal Article] On designs of radix converters using arithmetic decompositions2007

    • Author(s)
      Y. Iguchi, T. Sasao, M. Matsuura
    • Journal Title

      Journal of Multiple-Valued Logic Vol.13,No.4-6

      Pages: 503-520

    • NAID

      110004822621

    • Peer Reviewed
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Journal Article] Design method for numerical function generators using recursive segmentation and EVBDDs2007

    • Author(s)
      S. Nagayama, T. Sasao, J.T. Butler
    • Journal Title

      IEICE Transaction on Fundamentals of Electronics, Communications and Computer Sciences Vol.E90-A,No.12

      Pages: 2752-2761

    • NAID

      110007538021

    • Peer Reviewed
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Journal Article] Design methods of radix converters using arithmetic decompositions2007

    • Author(s)
      Y.Iguchi, T.Sasao, and M.Matsuura
    • Journal Title

      IEICE Trans.on Information and Systems Vol.E90-D

      Pages: 905-914

    • NAID

      110007522146

    • Peer Reviewed
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Journal Article] BDD representation for incompletely specified multipleoutput logic functions and its application to the design of LUT cascades2007

    • Author(s)
      M. Matsuura, T. Sasao
    • Journal Title

      IEICE Transaction on Fundamentals of Electronics, Communications and Computer Sciences Vol.E90-A,No.12

      Pages: 2770-2777

    • Peer Reviewed
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Journal Article] A new equivalence relation of logic functions and its application in the design of AND-OR-EXOR networks2007

    • Author(s)
      D. Debnath, T. Sasao
    • Journal Title

      IEICE Transaction, Special Section of Discrete Mathematics and Its Applications Vol.E90-A,No.5

      Pages: 932-940

    • NAID

      110007519156

    • Peer Reviewed
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Journal Article] Numerical function generators using LUT cascades2007

    • Author(s)
      T.Sasao, S.Nagayama and J.T.Butler
    • Journal Title

      IEEE Transactions on Computers Vol.56

      Pages: 826-838

    • Peer Reviewed
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Journal Article] BDD representation for incompletely specified multiple-output logic functions and its application to the design of LUT cascades2007

    • Author(s)
      M.Matsuura and T.Sasao
    • Journal Title

      IEICE Transaction on Fundamentals of Electronics, Communications and Computer Sciences Vol.E90-A

      Pages: 2770-2777

    • NAID

      110007538022

    • Peer Reviewed
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Journal Article] On the design of LPM address generators using multiple LUT Cascades on FPGAs2007

    • Author(s)
      H. Qin, T. Sasao, J.T. Butler
    • Journal Title

      International Journal of Electronics Vol.94,Issue5

      Pages: 451-467

    • Peer Reviewed
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Journal Article] Numerical function generators using LUT cascades2007

    • Author(s)
      T. Sasao, S. Nagayama, J.T. Butler
    • Journal Title

      IEEE Transactions on Computers Vol.56,No.6

      Pages: 826-838

    • Peer Reviewed
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Journal Article] Design methods of radix converters using arithmetic decompositions2007

    • Author(s)
      Y. Iguchi, T. Sasao, M. Matsuura
    • Journal Title

      IEICE Trans. on Information and Systems Vol.E90-D,No.6

      Pages: 905-914

    • NAID

      110007522146

    • Peer Reviewed
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Journal Article] Design method for numerical function generators using recursive segmentation and EVBDDs2007

    • Author(s)
      S.Nagayama, T.Sasao, and J.T.Butler
    • Journal Title

      IEICE Transaction on Fundamentals of Electronics, Communications and Computer Sciences Vol.E90-A

      Pages: 2752-2761

    • NAID

      110007538021

    • Peer Reviewed
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Journal Article] On the optimization of heterogeneous MDDs2005

    • Author(s)
      S.Nagayama, T.Sasao
    • Journal Title

      IEEE Transactions on CAD Vol.24, No.11

      Pages: 1645-1659

    • NAID

      120002440792

    • Data Source
      KAKENHI-PROJECT-16650013
  • [Journal Article] A design algorithm for sequential circuits using LUT rings2005

    • Author(s)
      H.Nakahara, T.Sasao, M.Matsuura
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences Vol.88-A, No.12

      Pages: 3342-3350

    • NAID

      110004019435

    • Data Source
      KAKENHI-PROJECT-16650013
  • [Journal Article] Exact minimization of FPRMs for incompletely specified functions by using MTBDDs2005

    • Author(s)
      D.Debnath, T.Sasao
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences Vol.88-A, No.12

      Pages: 3332-3341

    • NAID

      110004019434

    • Data Source
      KAKENHI-PROJECT-16650013
  • [Journal Article] Unified algorithm to generate Walsh functions in four different orderings and its programmable hardware implementation2005

    • Author(s)
      B.Falkowski, T.Sasao
    • Journal Title

      IEE Proc.Vision, Image & Signal Processing Vol.152, No.6

      Pages: 819-826

    • Data Source
      KAKENHI-PROJECT-16650013
  • [Journal Article] Output phase optimization for AND-OR-EXOR PLAs with decoders and its application to design of adders," in "Special Issue on Recent Advances in Circuits and Systems"2005

    • Author(s)
      D.Debnath, T.Sasao
    • Journal Title

      IEICE Transactions on Information and Systems Vol.E88-D.No.7

      Pages: 1492-1500

    • Data Source
      KAKENHI-PROJECT-16650013
  • [Journal Article] Average path length of binary decision diagrams2005

    • Author(s)
      J.T.Butler, T.Sasao, M.Matsuura
    • Journal Title

      IEEE Transactions on Computers Vol.54, No.9

      Pages: 1041-1053

    • NAID

      120002440793

    • Data Source
      KAKENHI-PROJECT-16650013
  • [Journal Article] Exact and heuristic minimization of the average path length in decision diagrams2005

    • Author(s)
      S.Nagayama, A.Mishchenko T.Sasao, Jon T.Butler
    • Journal Title

      Journal of Multiple-Valued Logic and Soft Computing Vol.11, No.5-6

      Pages: 437-465

    • Data Source
      KAKENHI-PROJECT-16650013
  • [Journal Article] Area-time complexities of multi-valued decision diagrams2004

    • Author(s)
      S.Nagayama, T.Sasao, Y.Iguchi, M.Matsuura
    • Journal Title

      EICE Transactions on Fundamentals of Electronics Vol.e87-A, No.5

      Pages: 1020-1028

    • NAID

      110003212997

    • Data Source
      KAKENHI-PROJECT-14380146
  • [Journal Article] Area-time complexities of multi-valued decision diagrams2004

    • Author(s)
      S.Nagayama, T.Sasao, Y.Iguchi, M.Matsuura
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics Vol.E87-A, No.5

      Pages: 1020-1028

    • NAID

      110003212997

    • Data Source
      KAKENHI-PROJECT-16650013
  • [Journal Article] Area-time complexities of multi-valued decision diagrams2004

    • Author(s)
      S.Nagayama, T.Sasao, Y.Iguchi, M.Matsuura
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics Vol.e87-A, No.5

      Pages: 1020-1028

    • NAID

      110003212997

    • Description
      「研究成果報告書概要(和文)」より
    • Data Source
      KAKENHI-PROJECT-14380146
  • [Journal Article] Fast Boolean matching under permutation by efficient computation of canonical form2004

    • Author(s)
      D.Debnath, T.Sasao
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics Vol.E87-A

      Pages: 3134-3140

    • NAID

      110003212850

    • Data Source
      KAKENHI-PROJECT-16650013
  • [Journal Article] Fault diagnosis for RAMs using Walsh spectrum2004

    • Author(s)
      A.Iseno, Y.Iguchi, T.Sasao
    • Journal Title

      IEICE Trans.Information and Systems Vol.E87-D, No.3

      Pages: 592-600

    • NAID

      110003213916

    • Description
      「研究成果報告書概要(和文)」より
    • Data Source
      KAKENHI-PROJECT-14380146
  • [Journal Article] A realization of multiple-output functions by a look-up table ring2004

    • Author(s)
      H.Qin, T.Sasao, M.Matsuura, K.Nakamura S.Nagayama, Y.Iguchi
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics Vol.e87-A

      Pages: 3141-3150

    • NAID

      110003212851

    • Description
      「研究成果報告書概要(欧文)」より
    • Data Source
      KAKENHI-PROJECT-14380146
  • [Journal Article] A realization of multiple-output functions by a look-up table ring2004

    • Author(s)
      H.Qin, T.Sasao, M.Matsuura, K.Nakamura, S.Nagayama, Y.Iguchi
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics Vol.E87-A

      Pages: 3141-3150

    • NAID

      110003212851

    • Data Source
      KAKENHI-PROJECT-16650013
  • [Journal Article] Fast Boolean matching under permutation by efficient computation of canonical form2004

    • Author(s)
      D.Debnath, T.Sasao
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics Vol.e87-A

      Pages: 3134-3140

    • NAID

      110003212850

    • Description
      「研究成果報告書概要(和文)」より
    • Data Source
      KAKENHI-PROJECT-14380146
  • [Journal Article] A realization of multiple-output functions by a look-up table ring2004

    • Author(s)
      H.Qin, T.Sasao, M.Matsuura, K.Nakamura, S.Nagayama, Y.Iguchi
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics Vol.e87-A

      Pages: 3141-3150

    • NAID

      110003212851

    • Description
      「研究成果報告書概要(和文)」より
    • Data Source
      KAKENHI-PROJECT-14380146
  • [Journal Article] Compact representations of logic functions using heterogeneous MDDs2003

    • Author(s)
      S.Nagayama, T.Sasao
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics Vol.E86-A, No.12

      Pages: 3168-3175

    • NAID

      110003173551

    • Description
      「研究成果報告書概要(和文)」より
    • Data Source
      KAKENHI-PROJECT-14380146
  • [Journal Article] Bi-partition of shared binary decision diagrams2002

    • Author(s)
      M.Matsuura, T.Sasao, J.T.Butler, Y.Iguchi
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics Vol.E85-A, No.12

      Pages: 2693-2700

    • NAID

      110003212440

    • Description
      「研究成果報告書概要(和文)」より
    • Data Source
      KAKENHI-PROJECT-14380146
  • [Patent] Content addressable memory, an index generator, and a registered information update method2018

    • Inventor(s)
      Tsutomu Sasao
    • Industrial Property Rights Holder
      Meiji University
    • Industrial Property Rights Type
      特許
    • Filing Date
      2018
    • Acquisition Date
      2018
    • Overseas
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Patent] Content addressable memory, an index generator, and a registered information update method2018

    • Inventor(s)
      Tsutomu Sasao
    • Industrial Property Rights Holder
      明治大学
    • Industrial Property Rights Type
      特許
    • Filing Date
      2018
    • Acquisition Date
      2018
    • Overseas
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Patent] 連想記憶装置、インデックス生成器、及び登録情報更新方法2015

    • Inventor(s)
      笹尾勤
    • Industrial Property Rights Holder
      学校法人明治大学
    • Industrial Property Rights Type
      特許
    • Filing Date
      2015-09-19
    • Overseas
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Patent] 連想記憶装置、インデックス生成器、及び登録情報更新方法2014

    • Inventor(s)
      笹尾勤
    • Industrial Property Rights Holder
      笹尾勤
    • Industrial Property Rights Type
      特許
    • Industrial Property Number
      2014-168777
    • Filing Date
      2014-08-21
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] Decomposition-based representation of symmetric multiple-valued functions2023

    • Author(s)
      S. Nagayama, T. Sasao and J. Butler
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2023),
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-20K11739
  • [Presentation] A logical method to predict outcomes after coronary artery bypass grafting2023

    • Author(s)
      T. Sasao, A. Holmgren and P. Eklund
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2023),
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-20K11739
  • [Presentation] Enumeration of symmetric boolean functions by sensitivity,2023

    • Author(s)
      J.T.Butler, T. Sasao, S. Nagayama
    • Organizer
      Reed-Muller Workshop (RM-2023)
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-20K11739
  • [Presentation] Data mining using multi-valued logic minimization2023

    • Author(s)
      T. Sasao
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2023),
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-20K11739
  • [Presentation] Easily reconstructable functions2023

    • Author(s)
      T. Sasao
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2023),
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-20K11739
  • [Presentation] On the sensitivity of binary and multiple-valued symmetric functions2022

    • Author(s)
      J. T. Butler, T. Sasao
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2022),
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-20K11739
  • [Presentation] LUT cascade realization of threshold functions and its application to implementation of ternary weight neural networks2022

    • Author(s)
      T. Sasao
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2022),
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-20K11739
  • [Presentation] Two-level minimization for partially defined functions2022

    • Author(s)
      T. Sasao
    • Organizer
      International Workshop on Logic & Synthesis (IWLS-2022)
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-20K11739
  • [Presentation] On decision diagrams for maximally asymmetric functions2022

    • Author(s)
      S. Nagayama, T. Sasao and J. Butler
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2022),
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-20K11739
  • [Presentation] A method to generate classification rules from examples2022

    • Author(s)
      T. Sasao
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2022),
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-20K11739
  • [Presentation] Fast literal transformations for symmetric functions2021

    • Author(s)
      T. Sasao, J. T. Butler
    • Organizer
      RM Workshop, (RM2021)
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-20K11739
  • [Presentation] On a design of multi-layer LUT network2021

    • Author(s)
      T. Sasao
    • Organizer
      International Workshop on Logic & Synthesis (IWLS-2021)
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-20K11739
  • [Presentation] An improved SAT-based ESOP minimizer:A list of simplified ESOPs for 8-variable symmetric functions2021

    • Author(s)
      T. Fujita, T. Sasao, and Y. Iguchi
    • Organizer
      RM Workshop, (RM2021)
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-20K11739
  • [Presentation] Improvement in quality of solutions of heuristic linear decomposer for index generation functions2021

    • Author(s)
      S. Nagayama, T. Sasao and J. Butler
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2021),
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-20K11739
  • [Presentation] Linear Decompositions for multi-valued input classification functions2021

    • Author(s)
      T. Sasao, J. T. Butler
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2021),
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-20K11739
  • [Presentation] A design method for multiclass classifiers2021

    • Author(s)
      T. Sasao, Y. Horikawa, Y. Iguchi
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2021),
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-20K11739
  • [Presentation] On the number of variables to represent classification functions using linear decompositions2021

    • Author(s)
      T. Sasao
    • Organizer
      The 23rd Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2021)
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-20K11739
  • [Presentation] On a realization of universal connection networks using contact switches.2020

    • Author(s)
      T. Sasao, T. Matsubara, K. Tsuji, Y. Koga
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2020),
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-20K11739
  • [Presentation] Handwritten digit recognition based on classification functions2020

    • Author(s)
      T. Sasao, Y. Horikawa, Y. Iguchi
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2020),
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-20K11739
  • [Presentation] On optimum linear decomposition of symmetric index generation functions2020

    • Author(s)
      S. Nagayama, T. Sasao and J. Butler
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2020),
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-20K11739
  • [Presentation] On the minimization of partially defined classification functions2020

    • Author(s)
      T. Sasao
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2020),
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-20K11739
  • [Presentation] Reduction methods of variables for large-scale classification functions2020

    • Author(s)
      T. Sasao
    • Organizer
      International Workshop on Logic & Synthesis (IWLS-2020)
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-20K11739
  • [Presentation] Properties of multiple-valued partition functions2020

    • Author(s)
      J. T. Butler T. Sasao and S. Nagayama
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2020),
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-20K11739
  • [Presentation] On a minimization of variables to represent sparse multi-valued input decision functions2019

    • Author(s)
      T. Sasao
    • Organizer
      DATE-2019 Workshop
    • Invited / Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Presentation] On irreducible index generation functions2019

    • Author(s)
      T. Sasao, K. Matsuura and Y. Iguchi,
    • Organizer
      International Workshop on Logic and Synthesis (IWLS-2019),
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Presentation] Maximally asymmetric multiple-valued functions2019

    • Author(s)
      J. T. Butler and T. Sasao
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2019)
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Presentation] An improved bound on the number of variables to represent index generation functions using linear decompositions2019

    • Author(s)
      T. Sasao
    • Organizer
      International Workshop on Logic and Synthesis (IWLS-2019),
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Presentation] On a minimization of variables to represent sparse multi-valued input decision functions2019

    • Author(s)
      T. Sasao
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2019)
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Presentation] Remarks on the design of first digital computer in Japan - Contributions of Yasuo Komamiya2019

    • Author(s)
      R.S. Stankovic, T. Sasao, J. T. Astola, and ,A. Yamada,
    • Organizer
      International Conference on Computer Aided Systems Theory(EUROCAST-2019)
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Presentation] A dynamic programming based method for optimum linear decomposition of index generation functions2019

    • Author(s)
      S. Nagayama, T. Sasao and J. T. Butler,
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2019)
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Presentation] Enumerative analysis of asymmetric functions,2019

    • Author(s)
      J. T. Butler and T. Sasao,
    • Organizer
      Reed-Muller Workshop (RM-2019)
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Presentation] Thirty six years of EXOR logic synthesis: Memoir2019

    • Author(s)
      T. Sasao
    • Organizer
      Reed-Muller Workshop (RM-2019)
    • Invited / Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Presentation] Realizing all index generation functions by the row-shift method2019

    • Author(s)
      J. T. Butler and T. Sasao
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2019)
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Presentation] Logic minimizers for partially defined functions2019

    • Author(s)
      T. Sasao, K. Matsuura, K. Kai, and Y. Iguchi,
    • Organizer
      University Booth at Design, Automation and Test in Europe (DATE 2019)
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Presentation] An exact method to enumerate decomposition charts for index generation functions2018

    • Author(s)
      J. T. Butler and T. Sasao
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2018),
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Presentation] On a memory-based realization of sparse multiple-valued functions2018

    • Author(s)
      T. Sasao
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2018),
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Presentation] Bit-flip errors detection using random partial don't-care keys for a soft-error-tolerant TCAM2018

    • Author(s)
      I. Syafalni, T. Sasao, and X. Wen
    • Organizer
      International Workshop on Logic & Synthesis (IWLS-2018)
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Presentation] Netlist conversion from costumer logic interface format (CLIF) to Verilog for legacy circuits2018

    • Author(s)
      I. Syafalni, K. Wakasugi, Y. Tongxin, T. Sasao and X. Wen,
    • Organizer
      Workshop on Synthesis And System Integration of Mixed Information Technologies" (SASIMI 2018),
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Presentation] An exact optimization method using ZDDs for linear decomposition of index generation function2018

    • Author(s)
      S. Nagayama, T. Sasao and J. Butler
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2018),
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Presentation] A Method to identify affine equivalence classes of logic functions2018

    • Author(s)
      T. Sasao, K. Matsuura and Y. Iguchi
    • Organizer
      The 21st Workshop on Synthesis And System Integration of Mixed Information Technologies
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Presentation] Analysis of cyclic row-shift decompositions for index generation functions2018

    • Author(s)
      J. T. Butler and T. Sasao
    • Organizer
      The 21st Workshop on Synthesis And System Integration of Mixed Information Technologies
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Presentation] A Method to identify affine equivalence classes of logic functions2018

    • Author(s)
      T. Sasao, K. Matsuura and Y. Iguchi
    • Organizer
      The 21st Workshop on Synthesis And System Integration of Mixed Information Technologies
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] Analysis of cyclic row-shift decompositions for index generation functions2018

    • Author(s)
      J. T. Butler and T. Sasao,
    • Organizer
      The 21st Workshop on Synthesis And System Integration of Mixed Information Technologies
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] A Method to identify affine equivalence classes of logic functions2018

    • Author(s)
      T. Sasao, K. Matsuura and Y. Iguchi
    • Organizer
      Workshop on Synthesis And System Integration of Mixed Information Technologies" (SASIMI 2018),
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Presentation] Netlist conversion from costumer logic interface format (CLIF) to Verilog for legacy circuits,2018

    • Author(s)
      I. Syafalni, K. Wakasugi, Y. Tongxin, T. Sasao and X. Wen,
    • Organizer
      The 21st Workshop on Synthesis And System Integration of Mixed Information Technologies
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] Netlist conversion from costumer logic interface format (CLIF) to Verilog for legacy circuits2018

    • Author(s)
      I. Syafalni, K. Wakasugi, Y. Tongxin, T. Sasao and X. Wen,
    • Organizer
      The 21st Workshop on Synthesis And System Integration of Mixed Information Technologies
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Presentation] A logic synthesis for multiple-output linear circuits2018

    • Author(s)
      T. Sasao
    • Organizer
      International Workshop on Logic & Synthesis (IWLS-2018)
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Presentation] A High-speed low-power deep neural network on an FPGA based on the nested RNS: Applied to an object detector2018

    • Author(s)
      H. Nakahara and T. Sasao
    • Organizer
      International Symposium on Circuits and Systems (ISCAS-2018)
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Presentation] Analysis of cyclic row-shift decompositions for index generation functions2018

    • Author(s)
      J. T. Butler and T. Sasao
    • Organizer
      Workshop on Synthesis And System Integration of Mixed Information Technologies" (SASIMI 2018),
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Presentation] Probe location checker for IC physical verification2017

    • Author(s)
      I. Syafalni, K. Wakasugi, and T. Sasao
    • Organizer
      2017 IEEE TENCON
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] A random forest using a multi-valued decision diagram2017

    • Author(s)
      H. Nakahara, A. Jinguji, S. Sato and T. Sasao
    • Organizer
      International Symposium on Multiple-Valued Logic
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] On affine equivalence of logic functions2017

    • Author(s)
      T. Sasao and M. Maeta
    • Organizer
      International Workshop on Logic and Synthesis
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Presentation] An exact optimization algorithm for linear decomposition of index generation function2017

    • Author(s)
      S. Nagayama, T. Sasao, and J. T. Butler,
    • Organizer
      International Symposium on Multiple-Valued Logic
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] An exact optimization algorithm for linear decomposition of index generation functions2017

    • Author(s)
      S. Nagayama, T. Sasao and J.T. Butler
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2017)
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Presentation] A random forest using a multi-valued decision diagram2017

    • Author(s)
      H. Nakahara, A. Jinguji, S. Sato and T. Sasao,
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2017)
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Presentation] Index generation functions: Minimization methods2017

    • Author(s)
      T. Sasao,
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2017)
    • Invited / Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Presentation] On affine equivalence of logic functions2017

    • Author(s)
      T. Sasao and M. Maeta,
    • Organizer
      International Workshop on Logic and Synthesis
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] Probe location checker for IC physical verification2017

    • Author(s)
      I. Syafalni, K. Wakasugi, and T. Sasao,
    • Organizer
      2017 IEEE TENCON
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-17K00086
  • [Presentation] An algorithm to find optimum support-reducing decompositions for index generation functions2017

    • Author(s)
      T. Sasao, K. Matsuura, Y. Iguchi
    • Organizer
      Design Automation and Test in Europe
    • Place of Presentation
      Lausanne, Switzerland
    • Year and Date
      2017-03-27
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] Index generation functions: Minimization methods2017

    • Author(s)
      T. Sasao
    • Organizer
      International Symposium on Multiple-Valued Logic
    • Invited / Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] An efficient heuristic algorithm for linear decomposition of index generation functions2016

    • Author(s)
      S. Nagayama, T. Sasao, and J. T. Butler
    • Organizer
      International Symposium on Multiple-valued Logic
    • Place of Presentation
      Sappro, Japan
    • Year and Date
      2016-05-18
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] Decomposition of index generation functions using a Monte Carlo method2016

    • Author(s)
      T. Sasao and J. T. Butler
    • Organizer
      International Workshop on Logic and Synthesis
    • Place of Presentation
      Austin, Texas, USA
    • Year and Date
      2016-06-10
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] Multiple-bit-flip detection scheme for a soft-error resilient TCAM2016

    • Author(s)
      I. Syafalni, T. Sasao and X. Wen
    • Organizer
      IEEE Computer Society Annual Symposium on VLSI
    • Place of Presentation
      Pittsburgh, Pennsylvania,USA
    • Year and Date
      2016-07-11
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] A heuristic decomposition of index generation functions with many variables2016

    • Author(s)
      T. Sasao, K. Matsuura, Y. Iguchi
    • Organizer
      The 20th Workshop on Synthesis And System Integration of Mixed Information Technologies
    • Place of Presentation
      Kyoto, Japan
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] Analysis of the number of variables to represent index generation functions2016

    • Author(s)
      J. T. Butler and T. Sasao
    • Organizer
      International Workshop on Boolean Problems
    • Place of Presentation
      Freiberg, Germany
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] A realization of index generation functions using multiple IGUs2016

    • Author(s)
      T. Sasao
    • Organizer
      International Symposium on Multiple-valued Logic
    • Place of Presentation
      Sapporo, Japan
    • Year and Date
      2016-05-18
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] On the inadmissible class of multiple-valued faulty functions under stuck-at fault2016

    • Author(s)
      D. Chowdhury, D. Das, B. Bhattacharya and T. Sasao
    • Organizer
      International Symposium on Multiple-valued Logic
    • Place of Presentation
      Sapporo, Japan
    • Year and Date
      2016-05-18
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] An FFT circuit using nested RNS in a digital spectrometer for a radio telescope2016

    • Author(s)
      H. Nakahara, T. Sasao, H. Nakanishi, K. Iwai, T. Nagao and N. Ogawa,
    • Organizer
      International Symposium on Multiple-valued Logic
    • Place of Presentation
      Sapporo, Japan
    • Year and Date
      2016-05-18
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] An RNS FFT circuit using LUT cascades based on a modulo EVMDD2015

    • Author(s)
      H. Nakahara,T. Sasao, H. Nakanishi, and K. Iwai,
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2015)
    • Place of Presentation
      Waterloo, Canada
    • Year and Date
      2015-05-18
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] A soft-error tolerant TCAM for multiple-bit flips using partial don’t-care keys2015

    • Author(s)
      I. Syafalni, T. Sasao, and X. Wen,
    • Organizer
      International Workshop on Logic and Synthesis,
    • Place of Presentation
      Mountain View, CA, USA
    • Year and Date
      2015-06-12
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] A dynamically reconfigurable mixed analog-digital filter bank:Applied to an acoustic diagnostic system2015

    • Author(s)
      H. Nakahara, H. Yoshida, S-I. Shioya, R. Mikami, and T. Sasao,
    • Organizer
      the 11th International Symposium on Applied Reconfigurable Computing (ARC-2015),
    • Place of Presentation
      Bochum, Germany
    • Year and Date
      2015-04-13
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] Edge reduction for EVMDDs to speed up analysis of multi-state systems2015

    • Author(s)
      S. Nagayama, T. Sasao, J. T. Butler, M. Thornton, and T. Malikas,
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2015),
    • Place of Presentation
      Waterloo, Canada
    • Year and Date
      2015-05-18
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] A reduction method for the number of variables to represent index generation functions: s-Min method2015

    • Author(s)
      T. Sasao,
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2015),
    • Place of Presentation
      Waterloo, Canada
    • Year and Date
      2015-05-18
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] Index generation functions: Logic synthesis for pattern matching,"2015

    • Author(s)
      T. Sasao
    • Organizer
      EPFL Workshop on Logic Synthesis and Verification
    • Place of Presentation
      Lausanne, Switzerland
    • Year and Date
      2015-12-10
    • Invited / Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] 高速パターンマッチング用ハードウエアについて2015

    • Author(s)
      笹尾勤
    • Organizer
      電子情報通信学会、DC, CPSY研究会
    • Place of Presentation
      明治大学中野キャンパス
    • Year and Date
      2015-04-17
    • Invited
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] A method to minimize variables for incompletely specified index generation functions using a SAT solver,2015

    • Author(s)
      T. Sasao, I. Fumishi, and Y. Iguchi,
    • Organizer
      International Workshop on Logic and Synthesis,
    • Place of Presentation
      Mountain View, CA, USA
    • Year and Date
      2015-06-12
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] A deep convolutional neural network using nested residue number system2015

    • Author(s)
      H. Nakahara and T. Sasao,
    • Organizer
      The International Conference on Field-programmable Logic and Applications (FPL-2015),
    • Place of Presentation
      London, United Kingdom,
    • Year and Date
      2015-09-03
    • Int'l Joint Research
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] A lower bound on the number of variables to represent incompletely specified index generation functions2014

    • Author(s)
      T. Sasao, Y. Urano and Y. Iguchi,
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2014)
    • Place of Presentation
      Bremen, Germany
    • Year and Date
      2014-05-19
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] Inadmissible class of Boolean functions under stuck-at faults2014

    • Author(s)
      D. K. Das, D. Chowdhury, B. B. Bhattacharya and T. Sasao,
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2014),
    • Place of Presentation
      Bremen, Germany
    • Year and Date
      2014-05-21
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] An update method for a CAM emulator using an LUT cascade based on an EVMDD(k)2014

    • Author(s)
      H. Nakahara, T. Sasao and M. Matsuura
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2014)
    • Place of Presentation
      Bremen, Germany
    • Year and Date
      2014-05-19
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] Analysis methods of multi-state systems partially having dependent components using multiple-valued decision diagrams2014

    • Author(s)
      S. Nagayama, T. Sasao, J. T. Butler, M. A. Thornton, and T. W. Manikas,
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2014),
    • Place of Presentation
      Bremen, Germany
    • Year and Date
      2014-05-21
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] インデックス生成関数を表現するために必要な変数の個数の平均値について2014

    • Author(s)
      笹尾勤
    • Organizer
      2014年 Design & Test Colloquium, (DTC2014)
    • Place of Presentation
      沼津
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] 不完全定義インデックス生成関数の線形変換を求める発見的手法2014

    • Author(s)
      笹尾勤、浦野雄太,井口幸洋
    • Organizer
      電子情報通信学会, 第27回多値論理とその応用研究会,
    • Place of Presentation
      鹿児島
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] A TCAM generator for packet classification2013

    • Author(s)
      I. Syafalni and T. Sasao
    • Organizer
      The 31st IEEE International Conference on Computer Design (ICCD-2013)
    • Place of Presentation
      Asheville, NC, USA
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] A heuristic method to find linear decompositions for incompletely specified index generation functions2013

    • Author(s)
      T. Sasao, Y. Urano, and Y. Iguchi
    • Organizer
      The 18th workshop on Synthesis and system Integration of Mixed Information Technologies
    • Place of Presentation
      Sapporo, Japan
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] Hardware index to set partition converter2013

    • Author(s)
      J. T. Butler and T. Sasao
    • Organizer
      The 9th International Symposium on Applied Reconfigurable Computing (ARC2013)
    • Place of Presentation
      Los Angeles
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] Cyclic row-shift decompositions for incompletely specified index generation functions2013

    • Author(s)
      T. Sasao
    • Organizer
      IWLS-2013
    • Place of Presentation
      Austin, Texas
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] インデックス生成関数の表現に必要な変数の個数の下界について2013

    • Author(s)
      浦野雄太、笹尾勤、井口幸洋
    • Organizer
      第36回多値論理フォーラム
    • Place of Presentation
      姫路
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] A packet classifier using LUT cascades based on EVMDDs(k)2013

    • Author(s)
      H. Nakahara, T. Sasao, and M. Matsuura,
    • Organizer
      The 23rd International Conference on Field Programmable Logic and Applications
    • Place of Presentation
      Porto, Portugal
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] A packet classifier using parallel EVMDD(k) machine2013

    • Author(s)
      H. Nakahara, T. Sasao, and M. Matsuura
    • Organizer
      7th IEEE International Symposium on Embedded Multicore SoCs (MCSoC-13)
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] Cyclic row-shift decompositions for incompletely specified index generation functions2013

    • Author(s)
      T. Sasao
    • Organizer
      Internatioal Workshop on Logic and Synthesis
    • Place of Presentation
      Austin, Texas
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] An architecture for IPv6 lookup using parallel index generation units2013

    • Author(s)
      H. Nakahara, T. Sasao and M. Matsuura
    • Organizer
      The 9th International Symposium on Applied Reconfigurable Computing (ARC2013)
    • Place of Presentation
      Los Angeles
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] A TCAM generator for packet classification2013

    • Author(s)
      I. Syafalni and T. Sasao
    • Organizer
      International Conference on Computer Design (ICCD-2013)
    • Place of Presentation
      Asheville, NC, USA
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] An application of autocorrelation functions to find linear decompositions for incompletely specified index generation functions2013

    • Author(s)
      T. Sasao
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2013)
    • Place of Presentation
      富山
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] A packet classifier using parallel EVMDD(k) machine2013

    • Author(s)
      H. Nakahara, T. Sasao, and M. Matsuura
    • Organizer
      7th IEEE International Symposium on Embedded Multicore SoCs
    • Place of Presentation
      東京
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] Forty years of logic synthesis : Memoir2013

    • Author(s)
      T. Sasao
    • Organizer
      RM-2013
    • Place of Presentation
      Toyama, Japan
    • Year and Date
      2013-05-24
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] An architecture for IPv6 lookup using parallel index generation units2013

    • Author(s)
      H. Nakahara, T. Sasao and M. Matsuura
    • Organizer
      The 9th International Symposium on Applied Reconfigurable Computing (ARC2013)
    • Place of Presentation
      Los Angeles, USA
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] A Packet Classifier using LUT cascades Based on EVMDDs(k)2013

    • Author(s)
      H. Nakahara, T. Sasao, and M. Matsuura
    • Organizer
      The 23rd International Conference on Field Programmable Logic and Applications (FPL-2013)
    • Place of Presentation
      Porto, Portugal
    • Year and Date
      2013-09-02
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] A heuristic method to find linear decompositions for incompletely specified index generation functions2013

    • Author(s)
      T. Sasao, Y. Urano, and Y. Iguchi
    • Organizer
      The 18th workshop on Synthesis and system Integration of Mixed Information
    • Place of Presentation
      札幌
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] A machine to evaluate decomposed multi-terminal multi-valued decision diagrams for characteristic functions2013

    • Author(s)
      H. Nakahara, T. Sasao and M. Matsuura
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2013)
    • Place of Presentation
      富山
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] Hardware index to set partition converter2013

    • Author(s)
      J. T. Butler and T. Sasao
    • Organizer
      The 9th International Symposium on Applied Reconfigurable Computing (ARC2013)
    • Place of Presentation
      Los Angeles, USA
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] A fast simplification algorithm for packet classification2013

    • Author(s)
      I.Syafalni and T. Sasao
    • Organizer
      The 18th workshop on Synthesis and system Integration of Mixed Information Technologies
    • Place of Presentation
      Sapporo, Japan
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] Four decades of multi-valued logic: Lists of highly cited papers2013

    • Author(s)
      T. Sasao
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2013)
    • Place of Presentation
      富山
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] A fast head-tail expression generator for TCAM: Application to packet classification2012

    • Author(s)
      I. Syafalni and T. Sasao
    • Organizer
      IEEE Computer Society Annual Symposium on VLSI (ISVLSI-2012)
    • Place of Presentation
      Amherst, USA
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] Hardware index to permutation converter2012

    • Author(s)
      J. T. Butler and T. Sasao
    • Organizer
      19th Reconfigurable Architectures Workshop
    • Place of Presentation
      Shanghai, China
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] On a wideband fast Fourier transform using piecewise linear approximations: Application to a radio telescope spectrometer2012

    • Author(s)
      H. Nakahara, H. Nakanishi, and T. Sasao
    • Organizer
      The 12th IEEE International Conference on Algorithms and Architectures for Parallel Processing (ICA3PP2012)
    • Place of Presentation
      Fukuoka, Japan
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] On a wideband fast Fourier transform for a radio telescope2012

    • Author(s)
      H. Nakahara, H. Nakanishi, and T. Sasao
    • Organizer
      The 3rd International Workshop on Highly Efficient Accelerators and Reconfigurable Technologies (HEART 2012)
    • Place of Presentation
      Okinawa, Japan
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] Row-shift decompositions for index generation functions2012

    • Author(s)
      T. Sasao
    • Organizer
      Design, Automation and Test in Europe, (DATE-2012)
    • Place of Presentation
      Dresden, Germany
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] Multiple-valued input index generation functions : Optimization by linear transformation2012

    • Author(s)
      T. Sasao
    • Organizer
      International Symposium on Multiple-Valued Logic
    • Place of Presentation
      Victoria, Canada
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] Analysis of multi-state systems with multi-state components using EVMDDs2012

    • Author(s)
      S. Nagayama, T. Sasao, and J. T. Butler
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2012)
    • Place of Presentation
      Victoria, Canada
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] On a wideband fast Fourier transform using piecewise linear approximations : Application to a radio telescope spectrometer2012

    • Author(s)
      H. Nakahara, H. Nakanishi, and T. Sasao
    • Organizer
      The 12th IEEE International Conference on Algorithms and Architectures for Parallel Processing
    • Place of Presentation
      Lecture Notes in Computer Science
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] A fast head-tail expression generator for TCAM : Application to packet classification2012

    • Author(s)
      I. Syafalni and T. Sasao
    • Organizer
      IEEE Computer Society Annual Symposium on VLSI (ISVLSI-2012)
    • Place of Presentation
      Amherst, USA21
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] Multiple-valued input index generation functions: Optimization by linear transformation2012

    • Author(s)
      T. Sasao
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2012)
    • Place of Presentation
      Victoria, Canada
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] On a wideband fast Fourier transform for a radio telescope2012

    • Author(s)
      H. Nakahara, H. Nakanishi, and T. Sasao
    • Organizer
      the 3rd International Workshop on Highly Efficient Accelerators and Reconfigurable Technologies (HEART 2012)
    • Place of Presentation
      Okinawa, Japan
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] Linear decomposition of index generation functions2012

    • Author(s)
      T. Sasao
    • Organizer
      17th Asia and South Pacific Design Automation Conference (ASP-DAC 2012)
    • Place of Presentation
      Sydney, Australia
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] Analysis of multi-state systems with multi-state components using EVMDDs2012

    • Author(s)
      S. Nagayama, T. Sasao, and J. T. Butler
    • Organizer
      International Symposium on Multiple-Valued Logic
    • Place of Presentation
      Victoria, Canada
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] Multi-terminal multiple-valued decision diagrams for characteristic function representing cluster decomposition2012

    • Author(s)
      H. Nakahara, T. Sasao, and M. Matsuura
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2012)
    • Place of Presentation
      Victoria, Canada
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] A low-cost and high-performance virus scanning engine using a binary CAM emulator and an MPU2012

    • Author(s)
      H. Nakahara, T. Sasao and M. Matsuura
    • Organizer
      8th International Symposium on Applied Reconfigurable Computing
    • Place of Presentation
      Hong-Kong
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] On a prefetching heterogeneous MDD machine2011

    • Author(s)
      H. Nakahara, T. Sasao, and M. Matsuura
    • Organizer
      The 54th IEEE International Midwest Symposium on Circuits and Systems
    • Place of Presentation
      Korea
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] Fast hardware computation of x mod z2011

    • Author(s)
      J. T. Butler and T. Sasao
    • Organizer
      18th Reconfigurable Architectures Workshop (RAW 2011)
    • Place of Presentation
      Anchorage, Alaska, USA
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] A Comparison of heterogeneous multi-valued decision diagram machines for multiple-output logic functions2011

    • Author(s)
      H. Nakahara, T. Sasao and M. Matsuura
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2011)
    • Place of Presentation
      Tuusula, Finland
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] Index generation functions : Recent developments2011

    • Author(s)
      T. Sasao
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2011)
    • Place of Presentation
      Tuusula, Finland
    • Invited
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] On a prefetching heterogeneous MDD machine2011

    • Author(s)
      H. Nakahara, T. Sasao and M. Matsuura
    • Organizer
      The 54th IEEE International Midwest Symposium on Circuits and Systems
    • Place of Presentation
      Seoul, Korea
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] Fast constant weight codeword to index converter2011

    • Author(s)
      J. T. Butler and T. Sasao
    • Organizer
      The 54th IEEE International Midwest Symposium on Circuits and Systems
    • Place of Presentation
      Korea
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] Numeric function generators using piecewise arithmetic expressions2011

    • Author(s)
      S. Nagayama, T. Sasao, and J. T. Butler
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2011)
    • Place of Presentation
      Tuusula, Finland
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] Index generation functions: Recent developments (招待講演)2011

    • Author(s)
      T. Sasao
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2011)
    • Place of Presentation
      Tuusula, Finland
    • Invited
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] Fast constant weight codeword to index converter2011

    • Author(s)
      J. T. Butler and T. Sasao
    • Organizer
      The 54th IEEE International Midwest Symposium on Circuits and Systems
    • Place of Presentation
      Seoul, Korea
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] Smith-WatemanアルゴリズムのFPGA上への実装とその評価に関する研究2010

    • Author(s)
      清水敬介, 笹尾勤, 中原啓貴
    • Organizer
      電子情報通信学会第23回多値とその応用研究会
    • Place of Presentation
      東京
    • Year and Date
      2010-01-09
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] 並列ブランチング・プログラム・マシンを用いたパケット分類器について2010

    • Author(s)
      中原啓貴, 笹尾勤, 松浦宗寛, 川村嘉郁
    • Organizer
      電子情報通信学会RECONF研究会
    • Place of Presentation
      慶応大
    • Year and Date
      2010-01-27
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] 4値CAMを用いた分類関数の実現について2010

    • Author(s)
      笹尾勤
    • Organizer
      電子情報通信学会第23回多値とその応用研究会
    • Place of Presentation
      東京
    • Year and Date
      2010-01-09
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] 種々の決定グラフマシンのアーキテクチャの比較について2010

    • Author(s)
      中原啓貴, 笹尾勤, 松浦宗寛
    • Organizer
      電子情報通信学会第23回多値とその応用研究会
    • Place of Presentation
      東京
    • Year and Date
      2010-01-09
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] FPGA上に実現したいくつかの近似マッチングアルゴリズムの比較に関する研究2010

    • Author(s)
      清水敬介, 中原啓貴, 笹尾勤, 松浦宗寛
    • Organizer
      電子情報通信学会VLSI設計技術研究会
    • Place of Presentation
      沖縄
    • Year and Date
      2010-03-12
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] 種々の決定グラフマシンのアーキテクチャの比較について2010

    • Author(s)
      中原啓貴, 笹尾勤, 松浦宗寛
    • Organizer
      電子情報通信学会「第23回多値論理とその応用研究会」
    • Place of Presentation
      明治大学
    • Year and Date
      2010-01-09
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] Smith- WatermanアルゴリズムのFPGA上への実装とその評価に関する研究2010

    • Author(s)
      清水敬介, 笹尾勤, 中原啓貴
    • Organizer
      電子情報通信学会「第23回多値論理とその応用研究会」
    • Place of Presentation
      明治大学
    • Year and Date
      2010-01-09
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] 並列ブランチング・プログラム・マシンを用いたパケット分類器について2010

    • Author(s)
      中原啓貴, 笹尾勤, 松浦宗寛, 川村嘉郁
    • Organizer
      電子情報通信学会RECONF研究会
    • Place of Presentation
      東京
    • Year and Date
      2010-01-27
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] 4値CAMを用いた分類関数の実現について2010

    • Author(s)
      笹尾勤
    • Organizer
      電子情報通信学会「第23回多値論理とその応用研究会」
    • Place of Presentation
      明治大学
    • Year and Date
      2010-01-09
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] FPGA上に実現した二つの近似文字列マッチングアルゴリズムの比較2010

    • Author(s)
      清水敬介, 中原啓貴, 笹尾勤, 松浦宗寛
    • Organizer
      電子情報通信学会VLSI設計技術研究会
    • Place of Presentation
      那覇
    • Year and Date
      2010-03-12
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] Emulation of sequential circuits by a parallel branching program machine2009

    • Author(s)
      H. Nakahara, T. Sasao, M. Matsuura, Y. Kawamura
    • Organizer
      5th International Workshop on Applied Reconfigurable Computing
    • Place of Presentation
      Karlsruhe, Germany
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] 並列ふるい法とMPUを用いたウイルス検出エンジンについて2009

    • Author(s)
      中原啓貴, 笹尾勤, 松浦宗寛, 川村嘉郁
    • Organizer
      電子情報通信学会RECONF研究会
    • Place of Presentation
      高知
    • Year and Date
      2009-12-03
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] A quaternary decision diagram machine and the optimization of its code2009

    • Author(s)
      T.Sasao, H.Nakahara, M.Matsuura, Y.Kawamura, J.T.Butler
    • Organizer
      39th International Symposium on Multiple-Valued Logic
    • Place of Presentation
      Okinawa, Japan
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] The Parallel sieve method for a virus scanning engine2009

    • Author(s)
      H. Nakahara, T. Sasao, M. Matsuura, Y. Kawamura
    • Organizer
      12th EUROMICRO Conference on Digital System Design, Architectures, Methods and Tools (DSD 2009)
    • Place of Presentation
      Patras, Greece
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] On the number of LUTS to realize sparse logic functions2009

    • Author(s)
      T. Sasao
    • Organizer
      18th International Workshop on Logic and Synthesis, (IWLS- 2009)
    • Place of Presentation
      Berkeley, CA, U.S.A.
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] A virus scanning engine using a parallel finite-input memory machine and MPUs2009

    • Author(s)
      H.Nakahara, T.Sasao, M.Matsuura, Y.Kawamura
    • Organizer
      19th International Conference on Field Programmable Logic and Applications
    • Place of Presentation
      Prague, Czech Republic
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] Floating-point numerical function generators using EVMDDs for monotone elementary functions2009

    • Author(s)
      S. Nagayama, T. Sasao, J.T. Butler
    • Organizer
      39th International Symposium on Multiple-Valued Logic (ISMVL 2009)
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] 並列ブランチング・プログラム・マシンを用いた順序回路の模擬について2009

    • Author(s)
      中原啓貴, 笹尾勤, 松浦宗寛, 川村嘉郁
    • Organizer
      電子情報通信学会VLSI設計技術研究会
    • Place of Presentation
      那覇
    • Year and Date
      2009-03-12
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] On the number of LUTs to realize sparse logic functions2009

    • Author(s)
      T.Sasao
    • Organizer
      18th International Workshop on Logic and Synthesis
    • Place of Presentation
      Berkeley, CA, U.S.A.
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] LUTMIN : FPGA logic synthesis with MUX-based and cascade realizations2009

    • Author(s)
      T.Sasao, A.Mishchenko
    • Organizer
      18th International Workshop on Logic and Synthesis
    • Place of Presentation
      Berkeley, CA, U.S.A.
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] A virus scanning engine using a parallel finite-input memory machines and MPUs2009

    • Author(s)
      H. Nakahara, T. Sasao, M. Matsuura, Y. Kawamura
    • Organizer
      19th International Conference on Field Programmable Logic and Applications (FPL-2009)
    • Place of Presentation
      Prague. Czech Republic
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] 並列プランチンク・プログラム・マシンを用いた順序回路の模擬について2009

    • Author(s)
      中原啓貴, 笹尾勤, 松浦宗寛, 川村嘉郁
    • Organizer
      電子情報通信学会, VLSI設計技術研究会
    • Place of Presentation
      那覇市
    • Year and Date
      2009-03-11
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] 不完全定義インデックス生成関数の変数最小化について2009

    • Author(s)
      中村高明, 笹尾勤, 松浦宗寛
    • Organizer
      電子情報通信学会, VLSI設計技術研究会
    • Place of Presentation
      那覇市
    • Year and Date
      2009-03-11
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] LUTMIN: FPGA logic synthesis with MUX-based and cascade realizations2009

    • Author(s)
      T. Sasao, A. Mishchenko
    • Organizer
      18th International Workshop on Logic and Synthesis, (IWLS- 2009)
    • Place of Presentation
      Berkeley
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] Logic functions for cryptography-A tutorial2009

    • Author(s)
      J.T.Butler, T.Sasao
    • Organizer
      Reed-Muller Workshop
    • Place of Presentation
      Okinawa, Japan
    • Year and Date
      2009-05-24
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] Bent functions and their relation to switching circuit theory2009

    • Author(s)
      J.T.Butler, T.Sasao
    • Organizer
      Reed-Muller Workshop
    • Place of Presentation
      Okinawa, Japan
    • Year and Date
      2009-05-24
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] Logic functions for cryptography- A tutorial2009

    • Author(s)
      J.T. Butler, T. Sasao
    • Organizer
      Reed-Muller Workshop (RM2009)
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] A quaternary decision diagram machine and the optimization of its code2009

    • Author(s)
      T. Sasao, H. Nakahara, M. Matsuura, Y. Kawamura, J.T. Butler
    • Organizer
      39th International Symposium on Multiple-Valued Logic (ISMVL 2009)
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] Representation of incompletely specified index generation functions using minimal number of compound variables2009

    • Author(s)
      T. Sasao, T. Nakamura, M. Matsuura
    • Organizer
      12th EUROMICRO Conference on Digital System Design, Architectures, Methods and Tools (DSD 2009)
    • Place of Presentation
      Patras, Greece
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] A parallel sieve method for the virus scanning engine2009

    • Author(s)
      H.Nakahara, T.Sasao, M.Matsuura, Y.Kawamura
    • Organizer
      11th EUROMICRO Conference on Digital System Design, Architectures, Methods and Tools
    • Place of Presentation
      Patras, Greece
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] 3アドレスQDDマシン用コードの最適アルゴリズムについて2009

    • Author(s)
      福山泰介, 笹尾勤, 松浦宗寛
    • Organizer
      電子情報通信学会RECONF研究会
    • Place of Presentation
      高知
    • Year and Date
      2009-12-04
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] Representation of incompletely specified index generation functions using minimal number of compound variables2009

    • Author(s)
      S.Nagayama, T.Sasao, J.T.Butler
    • Organizer
      39th International Symposium on Multiple-Valued Logic
    • Place of Presentation
      Okinawa, Japan
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] 不完全定義インデックス生成関数の変数最小化について2009

    • Author(s)
      中村高明, 笹尾勤, 松浦宗寛
    • Organizer
      電子情報通信学会VLSI設計技術研究会
    • Place of Presentation
      那覇
    • Year and Date
      2009-03-11
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] Representation of incompletely specified index generation functions using minimal number of compound variables2009

    • Author(s)
      T.Sasao, T.Nakamura, M.Matsuura
    • Organizer
      11th EUROMICRO Conference on Digital System Design, Architectures, Methods and Tools
    • Place of Presentation
      Patras, Greece
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] 書換え可能な二変数関数の数値計算回路について2008

    • Author(s)
      永山忍, 笹尾勤, J.T. Butler
    • Organizer
      電子情報通信学会リコンフィギャラブルシステム研究会
    • Place of Presentation
      北九州市
    • Year and Date
      2008-11-18
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] Representations of two-variable elementary functions using EVMDDs and their applications to function generators2008

    • Author(s)
      S. Nagayama, T. Sasao
    • Organizer
      International Symposium on Multiple-valued Logic (ISMVL-2008)
    • Place of Presentation
      Dallas, TX
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] Numerical function generators using bilinear interpolation2008

    • Author(s)
      S. Nagayama, T. Sasao, J. T. Butler
    • Organizer
      The International Conference on Field Programmable Logic and Applications (FPL-2008)
    • Place of Presentation
      Heidelberg, Germany
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] Programmable numerical function generators for two-variable functions2008

    • Author(s)
      S. Nagayama, J.T. Butler, T. Sasao
    • Organizer
      DSD 2008, 10th EUROMICRO Conference on Digital System Design, Architectures, Methods and Tools
    • Place of Presentation
      Parma, Italy
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] On the number of variables to represent sparse logic functions2008

    • Author(s)
      T. Sasao
    • Organizer
      The 2008 International Conference on Computer-Aided Design (ICCAD-2008)
    • Place of Presentation
      San Jose, California, USA
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] On the number of variables to represent sparse logic functions2008

    • Author(s)
      T. Sasao
    • Organizer
      ICCAD-2008
    • Place of Presentation
      San Jose, California, USA
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] On the complexity of classification functions2008

    • Author(s)
      T. Sasao
    • Organizer
      International Symposium on Multiple-valued Logic (ISMVL-2008)
    • Place of Presentation
      Dallas, TX
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] On the complexity of classification functions2008

    • Author(s)
      T. Sasao
    • Organizer
      International Symposium on Multiple-valued Logic (ISMVL-2008)
    • Place of Presentation
      Dallas, TX, USA
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] メモリ構造をしたプログラム可能論理素子とその応用2008

    • Author(s)
      笹尾勤
    • Organizer
      電子情報通信学会2008総合全国大会
    • Place of Presentation
      北九州学術研究都市
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] Programmable numerical function generators for two-variable functions2008

    • Author(s)
      S. Nagayama, J. T. Butler, T. Sasao
    • Organizer
      10th EUROMICRO Conference on Digital System Design, Architectures, Methods and Tools(DSD 2008)
    • Place of Presentation
      Parma, Italy
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] On the complexity of single-digit error detection function in redundant residue number system2008

    • Author(s)
      T. Sasao, Y. Iguchi
    • Organizer
      10th EUROMICRO Conference on Digital System Design, Architectures, Methods and Tools
    • Place of Presentation
      Parma, Italy
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] On the number of variables to represent sparse logic functions2008

    • Author(s)
      T. Sasao
    • Organizer
      17th InternationalWorkshop on Logic & Synthesis (IWLS- 2008)
    • Place of Presentation
      Lake Tahoe, California, USA
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] On the complexity of single-digit error detection function in redundant residue number system2008

    • Author(s)
      T. Sasao, Y. Iguchi
    • Organizer
      10th EUROMICRO Conference on Digital System Design, Architectures, Methods and Tools(DSD2008)
    • Place of Presentation
      Parma, Italy
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] Representations of two-variable elementary functions using EVMDDs and their applications to function generators2008

    • Author(s)
      S. Nagayama, T. Sasao
    • Organizer
      International Symposium on Multiple-valued Logic (ISMVL-2008)
    • Place of Presentation
      Dallas, TX, USA
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] Numerical function generators using bilinear interpolation2008

    • Author(s)
      S. Nagayama, T. Sasao, , J.T. Butler
    • Organizer
      FPL-2008
    • Place of Presentation
      Heidelberg, Germany
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] 書換え可能な二変数関数の数値計算回路について2008

    • Author(s)
      永山忍, 笹尾勤, Jon T. Butler
    • Organizer
      電子情報通信学会, リコンフィギヤラブルシステム研究会, RECONF2008-49
    • Place of Presentation
      北九州市
    • Year and Date
      2008-11-18
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] On the number of variables to represent sparse logic funotions2008

    • Author(s)
      T. Sasao
    • Organizer
      17th International Workshop on Logic & Synthesis (IWLS-2008)
    • Place of Presentation
      Lake Tahoe, California, USA
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] An implementation of an address generator using hash memories2007

    • Author(s)
      T.Sasao and M.Matsuura
    • Organizer
      10th EUROMICRO Conference on Digital System Design, Architectures, Methods and Tools
    • Place of Presentation
      Lubeck,Germany
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] The eigenfunction of the Reed-Muller transformation2007

    • Author(s)
      T.Sasao and J.T.Butler
    • Organizer
      RM-2007
    • Place of Presentation
      Oslo,Norway
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] Implementations of reconfigurable logic arrays on FPGAs2007

    • Author(s)
      T. Sasao, H. Nakahara
    • Organizer
      International Conference on Field-Programmable Technology 2007 (ICFPT'07)
    • Place of Presentation
      Kitakyushu, Japan
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] Representations of elementary functions using edge-valued MDDs2007

    • Author(s)
      S. Nagayama, T. Sasao
    • Organizer
      ISMVL-2007
    • Place of Presentation
      Oslo, Norway
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] An Application of 16-Valued logic to design of reconfigurable logic arrays2007

    • Author(s)
      T.Sasao
    • Organizer
      ISMVL-2007
    • Place of Presentation
      Oslo,Norway
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] Sum-of-generalized products expressions:Applications and minimization2007

    • Author(s)
      T.Sasao
    • Organizer
      IWLS-2007
    • Place of Presentation
      San Diego,U.S.A
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] An implementation of an address generator using hash memories2007

    • Author(s)
      T. Sasao, M. Matsuura
    • Organizer
      DSD 2007, 10th EUROMICRO Conference on Digital System Design, Architectures, Methods and Tools
    • Place of Presentation
      Lubeck, Germany
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] The eigenfunction of the Reed-Muller transformation2007

    • Author(s)
      T. Sasao, J.T. Butler
    • Organizer
      RM- 2007
    • Place of Presentation
      Oslo, Norway
    • Year and Date
      2007-05-16
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] Implementations of reconfigurable logic arrays on FPGAs2007

    • Author(s)
      T.Sasao and H.Nakahara
    • Organizer
      International Conference on Field-Programmable Technology 2007
    • Place of Presentation
      Kitakyushu,Japan
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] A hybrid logic simulator using LUT cascade emulators2007

    • Author(s)
      H.Nakahara, T.Sasao, and M.Matsuura
    • Organizer
      The 14th Workshop on Synthesis And System Integration of Mixed Information technologies
    • Place of Presentation
      Sapporo,Japan
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] An Application of 16-Valued logic to design of reconfigurable logic arrays2007

    • Author(s)
      T. Sasao
    • Organizer
      ISMVL-2007
    • Place of Presentation
      Oslo, Norway
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] On designs of radix converters using arithmetic decompositions2007

    • Author(s)
      Y.Iguchi, T.Sasao, and M.Matsuura
    • Organizer
      ISMVL-2007
    • Place of Presentation
      Oslo,Norway
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] Design method of numerical function generators based on polynomial approximation for FPGA implementation2007

    • Author(s)
      S. Nagayama, T. Sasao, J.T. Butler
    • Organizer
      DSD 2007, 10th EUROMICRO Conference on Digital System Design, Architectures, Methods and Tools
    • Place of Presentation
      Lubeck, Germany
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] Sum-of-generalized products expressions: Applications and minimization2007

    • Author(s)
      T. Sasao
    • Organizer
      IWLS-2007
    • Place of Presentation
      San Diego, California, U.S. A
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] Representations of elementary functions using edge-valued MDDs2007

    • Author(s)
      S.Nagayama and T.Sasao
    • Organizer
      ISMVL-2007
    • Place of Presentation
      Oslo,Norway
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] Design method of numerical function generators based on polynomial approximation for FPGA implementation2007

    • Author(s)
      S.Nagayama, T.Sasao, and J.T.Butler
    • Organizer
      10th EUROMICRO Coference on Digital System Design, Architectures, Methods and Tools
    • Place of Presentation
      Lubeck,Germany
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] On designs of radix converters using arithmetic decompositions2007

    • Author(s)
      Y. Iguchi, T. Sasao, M. Matsuura
    • Organizer
      ISMVL-2007
    • Place of Presentation
      Oslo, Norway
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] An application of autocorrelation functions to find linear decompositions for incompletely specified index generation functions

    • Author(s)
      T. Sasao
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2013)
    • Place of Presentation
      Toyama, Japan
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] A machine to evaluate decomposed multi-terminal multi-valued decision diagrams for characteristic functions

    • Author(s)
      H. Nakahara, T. Sasao and M. Matsuura
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2013)
    • Place of Presentation
      Toyama, Japan
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] A hybrid logic simulator using LUT cascade emulators

    • Author(s)
      H. Nakahara, T. Sasao, M. Matsuura
    • Organizer
      The 14th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2007)
    • Place of Presentation
      Sapporo, Japan
    • Data Source
      KAKENHI-PROJECT-19300013
  • [Presentation] Soft-error tolerant TCAMs for high-reliability packet classifications

    • Author(s)
      Infall Syafalni, Tsutomu Sasao, Xiaoqing Wen, Stefan Holst, Kohei Miyase
    • Organizer
      APCCAS 2014
    • Place of Presentation
      Ishigaki, Japan
    • Year and Date
      2014-11-17 – 2014-11-20
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] On the average number of variables to represent incompletely specified index generation functions

    • Author(s)
      T. Sasao
    • Organizer
      International Workshop on Logic and Synthesis
    • Place of Presentation
      San Francisco, USA
    • Year and Date
      2014-05-20 – 2014-06-01
    • Data Source
      KAKENHI-PROJECT-26330072
  • [Presentation] Minimization of the number of edges in an EVMDD by variable grouping for fast analysis of multi-state systems

    • Author(s)
      S. Nagayama, T. Sasao, and J. T. Butler
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2013)
    • Place of Presentation
      Toyama, Japan
    • Data Source
      KAKENHI-PROJECT-23300016
  • [Presentation] Four decades of multi-valued logic : Lists of highly cited papers

    • Author(s)
      T. Sasao
    • Organizer
      International Symposium on Multiple-Valued Logic
    • Place of Presentation
      Toyama, Japan
    • Data Source
      KAKENHI-PROJECT-23300016
  • 1.  IGUCHI Yukihiro (60201307)
    # of Collaborated Projects: 8 results
    # of Collaborated Products: 26 results
  • 2.  KAJIHARA Seiji (80252592)
    # of Collaborated Projects: 6 results
    # of Collaborated Products: 0 results
  • 3.  KODA Norio (10099864)
    # of Collaborated Projects: 5 results
    # of Collaborated Products: 0 results
  • 4.  TERADA Hiroaki (80028985)
    # of Collaborated Projects: 3 results
    # of Collaborated Products: 0 results
  • 5.  NISHIKAWA Hiroaki (60180593)
    # of Collaborated Projects: 3 results
    # of Collaborated Products: 0 results
  • 6.  BUTLER Jon T
    # of Collaborated Projects: 3 results
    # of Collaborated Products: 27 results
  • 7.  ASADA Katsuhiko (10029093)
    # of Collaborated Projects: 2 results
    # of Collaborated Products: 0 results
  • 8.  KAMEYAMA Michitaka (70124568)
    # of Collaborated Projects: 1 results
    # of Collaborated Products: 0 results
  • 9.  HANYU Takahiro (40192702)
    # of Collaborated Projects: 1 results
    # of Collaborated Products: 0 results
  • 10.  HIGUCHI Tatsuo (20005317)
    # of Collaborated Projects: 1 results
    # of Collaborated Products: 0 results
  • 11.  SMITH Kenneth C.
    # of Collaborated Projects: 1 results
    # of Collaborated Products: 0 results
  • 12.  SILIO Charle
    # of Collaborated Projects: 1 results
    # of Collaborated Products: 0 results
  • 13.  SILIO Carles B.
    # of Collaborated Projects: 1 results
    # of Collaborated Products: 0 results
  • 14.  CHARLES B Si
    # of Collaborated Projects: 1 results
    # of Collaborated Products: 0 results
  • 15.  JON T Butler
    # of Collaborated Projects: 1 results
    # of Collaborated Products: 0 results
  • 16.  KENNETH C Sm
    # of Collaborated Projects: 1 results
    # of Collaborated Products: 0 results
  • 17.  HIKOAKI NI@sHIKAWA
    # of Collaborated Projects: 1 results
    # of Collaborated Products: 0 results
  • 18.  KATSUHIKO ASADA
    # of Collaborated Projects: 1 results
    # of Collaborated Products: 0 results
  • 19.  TSUTOMU SASAo
    # of Collaborated Projects: 1 results
    # of Collaborated Products: 0 results

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