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Hiraishi Hiromi  平石 裕実

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HIRAISHI Hiromi  平石 裕実

平石 裕美  ヒライシ ヒロミ

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Researcher Number 40093299
Other IDs
External Links
Affiliation (Current) 2021: 京都産業大学, 情報理工学部, 教授
Affiliation (based on the past Project Information) *help 2008: Kyoto Sangyo University, コンピュータ理工学部, 教授
2006 – 2007: 京都産業大学, 工学部, 教授
2001 – 2002: 京都産業大学, 先端科学技術研究所, 教授
2000: 京都産業大学, 工学部, 教授
1991 – 1998: 京都産業大学, 工学部, 教授 … More
1989 – 1991: Faculty of Engineering, Kyoto Univ., Assoc. Professor, 工学部, 助教授
1989: 京都大学, 工学部, 助手
1989: 京都大学, 工学部・, 助教授
1987: Associate Professor, Faculty of Engineering, Kyoto Unversity, 工学部, 助教授
1986: Faculty of Engineering,Kyoto University, 工学部, 講師 Less
Review Section/Research Field
Principal Investigator
計算機科学 / Computer system/Network / 計算機工学 / 情報工学
Except Principal Investigator
計算機工学 / 情報工学 / 計算機科学 / Informatics
Keywords
Principal Investigator
形式的検証 / 設計検証 / 時相論理 / 論理設計 / 記号モデル検査 / Temporal Logic / Formal Verification / Logic Design / 論理設計検証 / 順序機械 … More / モデル検査 / 共有二分決定グラフ / 並列アルゴリズム / Logic Design Verification / 分散アルゴリズム / Symbolic Model Checking / BDD / 耐故障設計 / セルフテスト / セルフチェック / モジュール分割 / 遷移関係 / 仕様記述 / 正則集合 / 記号シミュレ-ション / Model Checking / 計算機援設計 / 二分決定グラフ / 計算機援用設計 / ベクトル計算機 / Computer Aided Design / Binary Decision Diagram / 形式的設計検証 / 有限状態システム / 抽象化 / Formal Design Verification / Finite State Systems / 様相論理 / Design Verification / Distributed Algorithm / 並列処理 / 分散処理 / クラスタシステム / Design \verification / Parallel Processing / Distributed Processing / Cluster System … More
Except Principal Investigator
論理設計検証 / 時相論理 / Logic Design Verification / Logic Simulation / 二分決定グラフ / 論理関数処理 / タイミング検証 / 論理シミュレ-ション / 記号シミュレ-ション / 論理設計 / Timing Verification / Symbolic Simulation / Logic Design / Binary Decision Diagram / 順序回路 / temporal logic / モデルチェッキング / 仕様記述 / Temporal Logic / ハードウェアアルゴリズム / 算術演算回路 / Hardware Algorithm / 論理シミュレーション / デ-タベ-ス / 非同期式順序回路 / ハザ-ド / 論立設計検証 / Asynchronous Sequential Circuit / Hazard / 論理関数 / 計算機援用設計 / 計算複雑さ / Boolean Function / Boolean Function Manipulation / computer Aided Design / Computational complexity / 論理合成 / 論理関数簡単化 / 状態割当て / 論理設計支援 / logic synthesis / logic design verification / sequential circuits / logic function optimization / state assignment / computer-aided logic design / 形式的検証 / 論理開数処理 / 形式的論理設計検証 / Formal Verification / Logic Function Manipulation / Formal Specification / Model Checking / 形式的設計検証 / 機能レベル設計 / 第一階述語論理 / マイクロプロセッサ / 調理関数処理 / 二分モーメントグラフ / 三分決定グラフ / 機能レベル検証 / 算術演算回路検証 / Formal design verification / Function level design / First-order Predicate logic / model checking / logic function manipulation / binary decision diagram / 冗長表現 / 超LSI / 冗長2進表現 / 剰余数表示法 / 単一化操作 / ハードウェア設計言語 / Redundant Representation / VLSI; Redundant Binary Representation / Arithmetic Operation / Residue Number Representation / Unification / ベクトルプロセッサ / ワークステーション / マルチスクリーン / 論理シミュレータ / 高水準ハードウェア記述 / 正則時相論理 / 代数的仕様記述 / Vector Processof / Specification Desctiption / Workstation / ハ-ドウェアアルゴリズム / 耐故障設計 / オンライン誤り検出 / 故障シミュレ-ション / テスト生成 / 冗長符号化 / 故障シミュレーション / Arithmetic Circuits / Fault-Tolerant Design / On-Line Error Detection / Fault Simulation / Test Generation / Redundant Coding / マルチメディア / オブジェクト指向 / 意味モデル / 視覚的言語 / 計算幾何学 / 質問処理 / グラフィックス / データベース / 地理情報処理 / 利用者インタフェース / Multi-media / Database / Object-Oriented / Semantic Model / Visual Language / Computational Geometry / Query Processing / Graphics / 並行処理 / ホットスポット / 並列トランザクション / バックアップ / 主記憶デ-タベ-ス / 回復処理 / ログ / ハ-ドウェア並行処理制御 / ハ-ドウェアバックアップ機構 / ホットスポットデ-タ / ハ-ドウェアログ / プロトタイピング / 並行処理制御 / ハ-ドウェア / シミュレ-ション / 2ポ-トメモリ / 大容量主記憶 / トランザクションマシン / ハードウェア / シミュレーション / concurrency / hotspot / parallel transaction / backup / database / main memory database / recovery / log Less
  • Research Projects

    (18 results)
  • Research Products

    (4 results)
  • Co-Researchers

    (20 People)
  •  Parallel Logic Design Verification Based on Module DependencePrincipal Investigator

    • Principal Investigator
      HIRAISHI Hiromi
    • Project Period (FY)
      2006 – 2008
    • Research Category
      Grant-in-Aid for Scientific Research (C)
    • Research Field
      Computer system/Network
    • Research Institution
      Kyoto Sangyo University
  •  Parallel and Distributed Formal Logic Design Verification for Workstation Cluster SystemPrincipal Investigator

    • Principal Investigator
      HIRAISHI Hiromi
    • Project Period (FY)
      2000 – 2002
    • Research Category
      Grant-in-Aid for Scientific Research (C)
    • Research Field
      計算機科学
    • Research Institution
      Kyoto Sangyo University
  •  Studies on Formal Logic Design VerificationPrincipal Investigator

    • Principal Investigator
      HIRAISHI Hiromi
    • Project Period (FY)
      1997 – 1998
    • Research Category
      Grant-in-Aid for Scientific Research (C)
    • Research Field
      計算機科学
    • Research Institution
      Kyoto Sangyo University
  •  大規模論理設計の形式的検証に関する研究Principal Investigator

    • Principal Investigator
      平石 裕実
    • Project Period (FY)
      1996
    • Research Category
      Grant-in-Aid for Scientific Research (C)
    • Research Field
      計算機科学
    • Research Institution
      Kyoto Sangyo University
  •  時相理論を用いた形式的論理設計検証に関する研究Principal Investigator

    • Principal Investigator
      平石 裕実
    • Project Period (FY)
      1995
    • Research Category
      Grant-in-Aid for General Scientific Research (C)
    • Research Field
      計算機科学
    • Research Institution
      Kyoto Sangyo University
  •  Research on Development of Formal Logic Design Verifier for Microprocessors

    • Principal Investigator
      YAJIMA Shuzo
    • Project Period (FY)
      1995 – 1996
    • Research Category
      Grant-in-Aid for Scientific Research (A)
    • Research Field
      計算機科学
    • Research Institution
      KYOTO UNIVERSITY
  •  Research on Formal Verifier of Logic Design Based on Temporal Logic

    • Principal Investigator
      YAJIMA Shuzo
    • Project Period (FY)
      1993 – 1994
    • Research Category
      Grant-in-Aid for Developmental Scientific Research (B)
    • Research Field
      計算機科学
    • Research Institution
      KYOTO UNIVERSITY
  •  Research on Formal Verification of Finite State SystemsPrincipal Investigator

    • Principal Investigator
      HIRAISHI Hiromi
    • Project Period (FY)
      1993 – 1994
    • Research Category
      Grant-in-Aid for General Scientific Research (C)
    • Research Field
      計算機科学
    • Research Institution
      Kyoto Sangyo University
  •  Research on Development of Logic Synthesizer and Design Verifier for Sequential Circuits Based on Boolean Function Manipulation

    • Principal Investigator
      YAJIMA Shuzo
    • Project Period (FY)
      1991 – 1992
    • Research Category
      Grant-in-Aid for Developmental Scientific Research (B)
    • Research Field
      情報工学
    • Research Institution
      KYOTO UNIVERSITY
  •  Research on Computer Aided Formal Verification Based on Temporal LogicsPrincipal Investigator

    • Principal Investigator
      HIRAISHI Hiromi
    • Project Period (FY)
      1991 – 1992
    • Research Category
      Grant-in-Aid for General Scientific Research (C)
    • Research Field
      情報工学
    • Research Institution
      Kyoto Sangyo University
  •  Research on Efficient Manipulation of Boolean Functions Using Shared Binary Decision Diagrams and Its Application to Computer Aided Logic Design

    • Principal Investigator
      YAJIMA Shuzo
    • Project Period (FY)
      1990 – 1991
    • Research Category
      Grant-in-Aid for General Scientific Research (B)
    • Research Field
      情報工学
    • Research Institution
      Kyoto University
  •  Researches on Formal Logic Design Verification Based on Regular Temporal LogicPrincipal Investigator

    • Principal Investigator
      HIRAISHI Hiromi
    • Project Period (FY)
      1989 – 1990
    • Research Category
      Grant-in-Aid for General Scientific Research (C)
    • Research Field
      計算機工学
    • Research Institution
      Kyoto University
  •  Research on Development of a Logic Design Verification System Based on Time-Symbolic Simulation

    • Principal Investigator
      YAJIMA Shuzo
    • Project Period (FY)
      1989 – 1990
    • Research Category
      Grant-in-Aid for Developmental Scientific Research (B).
    • Research Field
      計算機工学
    • Research Institution
      Kyoto University
  •  Researches on the Design of Highly Reliable High-Speed Arithmetic Circuits with Redundant Coding

    • Principal Investigator
      YAJIMA Shuzo
    • Project Period (FY)
      1988 – 1989
    • Research Category
      Grant-in-Aid for General Scientific Research (B)
    • Research Field
      計算機工学
    • Research Institution
      KYOTO UNIVERSITY
  •  Studies on Development of Advanced Multi-Media Databases Based on Semantic Structures

    • Principal Investigator
      KAMBAYASHI Yahiko
    • Project Period (FY)
      1988 – 1990
    • Research Category
      Grant-in-Aid for General Scientific Research (B)
    • Research Field
      Informatics
    • Research Institution
      Kyoto University
      Kyushu University
  •  Studies on High-Speed Transaction Machines Utilizing Hardware Concurrency Control Mechanisms

    • Principal Investigator
      KAMBAYASHI Yahiko
    • Project Period (FY)
      1988 – 1990
    • Research Category
      Grant-in-Aid for Developmental Scientific Research (B).
    • Research Field
      計算機工学
    • Research Institution
      Kyoto University
      Kyushu University
  •  Research on Development of High-Speed Logic Simulators Using a Vector Processor and Logic Design Verification Systems

    • Principal Investigator
      YAJIMA Shuzo
    • Project Period (FY)
      1986 – 1987
    • Research Category
      Grant-in-Aid for Developmental Scientific Research
    • Research Field
      計算機工学
    • Research Institution
      Kyoto University
  •  Research on Design of VLSI Oriented Hardware Algorithms Using Redundant Representation

    • Principal Investigator
      YAJIMA Shuzo
    • Project Period (FY)
      1985 – 1986
    • Research Category
      Grant-in-Aid for General Scientific Research (B)
    • Research Field
      計算機工学
    • Research Institution
      Kyoto University

All 2009 2008 2007

All Presentation

  • [Presentation] 記号モデル検査器SMVにおけるBDDの変数順について2009

    • Author(s)
      平石 裕実
    • Organizer
      DTC研究会
    • Place of Presentation
      箱根千代田荘
    • Year and Date
      2009-03-29
    • Data Source
      KAKENHI-PROJECT-18500043
  • [Presentation] 記号モデル検査器SMVにおけるBDDの変数順について2009

    • Author(s)
      平石裕実
    • Organizer
      DTC研究会
    • Place of Presentation
      箱根千代田壮
    • Year and Date
      2009-03-29
    • Data Source
      KAKENHI-PROJECT-18500043
  • [Presentation] SATアルゴリズムを利用した記号モデル検査について2008

    • Author(s)
      平石裕実
    • Organizer
      DTC研究会
    • Place of Presentation
      京都ガーデンパレス
    • Year and Date
      2008-03-02
    • Data Source
      KAKENHI-PROJECT-18500043
  • [Presentation] 記号モデル検査のスケールアップについて2007

    • Author(s)
      平石裕実
    • Organizer
      DTC研究会
    • Place of Presentation
      別府豊泉荘
    • Year and Date
      2007-03-03
    • Data Source
      KAKENHI-PROJECT-18500043
  • 1.  OGINO Hiroyuki (40144323)
    # of Collaborated Projects: 9 results
    # of Collaborated Products: 0 results
  • 2.  TAKAGI Naofumi (10171422)
    # of Collaborated Projects: 8 results
    # of Collaborated Products: 0 results
  • 3.  YAJIMA Shuzo (20025901)
    # of Collaborated Projects: 8 results
    # of Collaborated Products: 0 results
  • 4.  ISHIURA Nagisa (60193265)
    # of Collaborated Projects: 6 results
    # of Collaborated Products: 0 results
  • 5.  TAKENAGA Yasuhiko (20236491)
    # of Collaborated Projects: 4 results
    # of Collaborated Products: 0 results
  • 6.  IWAMA Kazuo (50131272)
    # of Collaborated Projects: 3 results
    # of Collaborated Products: 0 results
  • 7.  HAMAGUCHI Kiyoharu (80238055)
    # of Collaborated Projects: 3 results
    # of Collaborated Products: 0 results
  • 8.  KAWAKUBO Kazuo (10186067)
    # of Collaborated Projects: 2 results
    # of Collaborated Products: 0 results
  • 9.  YASUURA Hiroto (80135540)
    # of Collaborated Projects: 2 results
    # of Collaborated Products: 0 results
  • 10.  KAMBAYASHI Yahiko (00026311)
    # of Collaborated Projects: 2 results
    # of Collaborated Products: 0 results
  • 11.  ARIKAWA Masatoshi (30202758)
    # of Collaborated Projects: 2 results
    # of Collaborated Products: 0 results
  • 12.  WATANABE Masako (70127158)
    # of Collaborated Projects: 2 results
    # of Collaborated Products: 0 results
  • 13.  MINO Michihiko (70166099)
    # of Collaborated Projects: 2 results
    # of Collaborated Products: 0 results
  • 14.  SAISHO Keizo (50170486)
    # of Collaborated Projects: 2 results
    # of Collaborated Products: 0 results
  • 15.  古川 哲也 (00209165)
    # of Collaborated Projects: 2 results
    # of Collaborated Products: 0 results
  • 16.  今井 浩 (80183010)
    # of Collaborated Projects: 2 results
    # of Collaborated Products: 0 results
  • 17.  掛下 哲郎 (10214272)
    # of Collaborated Projects: 1 results
    # of Collaborated Products: 0 results
  • 18.  吉川 正俊 (30182736)
    # of Collaborated Projects: 1 results
    # of Collaborated Products: 0 results
  • 19.  中村 千秋 (00217861)
    # of Collaborated Projects: 1 results
    # of Collaborated Products: 0 results
  • 20.  田中 克己 (00127375)
    # of Collaborated Projects: 1 results
    # of Collaborated Products: 0 results

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