ONOE TAKAO 尾上孝雄

… Alternative Names

ONOYE Takao 尾上孝雄

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Researcher Number	60252590
Other IDs
External Links
Affiliation (Current)	2025: 大阪大学, 大学院情報科学研究科, 教授
Affiliation (based on the past Project Information) *help	2011 – 2016: 大阪大学, 情報科学研究科, 教授 2007 – 2008: Osaka University, 大学院・情報科学研究科, 教授 2003: Osaka University, Graduate School of Information Science and Technology, Professor, 大学院・情報科学研究科, 教授 2002: 大阪大学, 大学院・情報科学研究科, 助教授 1999 – 2001: Department of Communications and Computer Engineering, Kyoto University, Associate Professor, 大学院・情報学研究科, 助教授 … More 1999 – 2001: 京都大学, 情報学研究科, 助教授 1998: 大阪大学, 大型計算機センター, 講師 1994 – 1997: 大阪大学, 工学部, 助手 Less
Review Section/Research Field	Principal Investigator 情報通信工学 / Computer system/Network / 計算機科学 / Computer system / System engineering Except Principal Investigator 情報通信工学 / Science and Engineering / System engineering
Keywords	Principal Investigator VLSI / マルチメディア / 画像処理 / MPEG2 / プロセッサ / 3D sound localization / low power / multimedia communication / 3D音像定位 / 低消費電力 … More / マルチメディア情報通信 / video processing / media processing / memory / interface / embedded / processor / メモリ / インタフェース / 組込み / アーキテクチャ / 機械学習 / フレーム補間 / 音響レンダリング / 空間認識 / 環境情報処理 / 情報通信工学 / 計算機システム / システムオンチップ / ディベンダビリティ / 動作隠蔽 / 自己診断 / 暗号化 / 冗長化 / 製造ばらつき / ソフトエラー / 再構成可能集積回路 / 再構成可能アーキテクチャ / ディペンダビリティ / 計算機アーキテクチャ / 画像符号化 / MPEG4 / 階層化2 / 動き予測 / CAD / ASIC … More Except Principal Investigator VLSI / JPEG2000 / 低消費電力 / MPEG-4 / VLSI implementation / retargetable compiler / low power / MPEG / CAD / MPEG2 / プロセッサ / discrete wavelet transform / 画像圧縮 / ウエーブレット変換 / 4相NMOS / 離散ウェーブレット変換 / Computer Aided Design / VLSI Test / VLSI Design / Plastic Cell Architecture / Reconfigurable Logic / Programmable Logic Device / 動的資源割当 / 論理関数表現 / 回路設計 / 並列計算 / プログラマブル・ロジック / リコンフィギャラブル・ロジック / リコンフィギィラルブル・ロジック / 設計・検証技術 / チップ設計・試作 / プラスティック・セル・アーキテクチャ / リコンフィギュラブル・ロジック / 再構成可能論理デバイス / IP-base Design / Processor / Image Coding / 組込み機器 / システムオンチップ設計 / VLSIアーキテクチャ / プロセッサシステム / メディア処理 / IPベース設計 / 画像符号化 / コンパイラ / MPEG4 / リターゲッタブルコンパイラ / DSP / リターゲッタブル・コンパイラ / FIR filter / digital signal processing / ディジタル記号処理 / FIRフィルタ / VLSI化設計 / ディジタル信号処理 / processor / multithreaded architecture / high-level synthesis / ASIC / マルチスレッド / 高速合成 / 画像生成 / 多重スレッド / 高位合成 Less

VLSI Implementation of Generic Hardware for Machine LearningPrincipal Investigator
- Principal Investigator
  
  Onoye Takao
- Project Period (FY)
  2014 – 2016
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  Computer system
- Research Institution
  Osaka University
Embedded system implementation of ambient media processing enginePrincipal Investigator
- Principal Investigator
  
  ONOYE Takao
- Project Period (FY)
  2011 – 2013
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  Computer system/Network
- Research Institution
  Osaka University
Reconfigurable architecture with flexible dependabilityPrincipal Investigator
- Principal Investigator
  
  ONOYE Takao
- Project Period (FY)
  2007 – 2008
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  Computer system/Network
- Research Institution
  Osaka University
Low Power VLSI Design for Portable Multimedia CommunicationPrincipal Investigator
- Principal Investigator
  
  ONOYE Takao, 白川功
- Project Period (FY)
  2002 – 2003
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  情報通信工学
- Research Institution
  Osaka University
High-Performance Processor Design for Image Processing
- Principal Investigator
  
  SHIRAKAWA Isao
- Project Period (FY)
  2000 – 2002
- Research Category
  
  Grant-in-Aid for Scientific Research on Priority Areas
- Review Section
  
  Science and Engineering
- Research Institution
  Osaka University
Computer Architecture bayed on Autonomous Reconfigurable Logic Device
- Principal Investigator
  
  NAKAMURA Yukihiro
- Project Period (FY)
  2000 – 2001
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  情報通信工学
- Research Institution
  KYOTO UNIVERSITY
VLSI Architecture for Video Codec Based on Discrete Wavelet Transform
- Principal Investigator
  
  SHIRAKAWA Isao
- Project Period (FY)
  2000 – 2001
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  情報通信工学
- Research Institution
  Osaka University
Enhanced Memory Accessing Mechanism for Embedded ProcessorsPrincipal Investigator
- Principal Investigator
  
  ONOYE Takao
- Project Period (FY)
  1999 – 2000
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  計算機科学
- Research Institution
  KYOTO UNIVERSITY
VLSI architecture for MPEG-4 Audio Visual Codec
- Principal Investigator
  
  SHIRAKAWA Isao
- Project Period (FY)
  1998 – 1999
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  情報通信工学
- Research Institution
  Osaka University
超低ビットレート画像圧縮符号化アルゴリズムのVLSI化に関する研究Principal Investigator
- Principal Investigator
  
  尾上孝雄
- Project Period (FY)
  1996
- Research Category
  
  Grant-in-Aid for Encouragement of Young Scientists (A)
- Research Field
  
  情報通信工学
- Research Institution
  Osaka University
VLSI Implementation for Digital Video Transmission and Compression
- Principal Investigator
  
  SHIRAKAWA Isao
- Project Period (FY)
  1996 – 1997
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  情報通信工学
- Research Institution
  Osaka University
MPEG2における動き予測機構のVLSI化に関する研究Principal Investigator
- Principal Investigator
  
  尾上孝雄
- Project Period (FY)
  1995
- Research Category
  
  Grant-in-Aid for Encouragement of Young Scientists (A)
- Research Field
  
  情報通信工学
- Research Institution
  Osaka University
マルチメディアプロセッサの設計に関する研究Principal Investigator
- Principal Investigator
  
  尾上孝雄
- Project Period (FY)
  1994
- Research Category
  
  Grant-in-Aid for Encouragement of Young Scientists (A)
- Research Field
  
  System engineering
- Research Institution
  Osaka University
VLSI Implementation of New Architectures Using High-Level Synthesis System-Design of Multithreaded Processor
- Principal Investigator
  
  SHIRAKAWA Isao
- Project Period (FY)
  1994 – 1995
- Research Category
  
  Grant-in-Aid for General Scientific Research (B)
- Research Field
  
  System engineering
- Research Institution
  Osaka University

All 2017 2016 2015 2014 2013 2012 2011 2009 2008 2007 Other

All Journal Article Presentation Patent

[Journal Article] Performance Evaluation of Software-based Error Detection Mechanisms for Supply Noise induced Timing Errors2017
- Author(s)
  Y. Masuda,T. Onoye,M. Hashimoto
- Journal Title
  
  IEICE Trans. Fundamentals
  
  Volume: E100-A
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-26330065
[Journal Article] Implementation of Viterbi Decoder toward GPU-Based SDR Receiver2015
- Author(s)
  Kosuke Tomita, Masahide Hatanaka, Takao Onoye
- Journal Title
  
  IEICE Trans. Fundamentals
  
  Volume: E98.A Issue: 11 Pages: 2246-2253
- DOI
  10.1587/transfun.E98.A.2246
- NAID
  130005105527
- ISSN
  0916-8508, 1745-1337
- Language
  English
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-26330065
[Journal Article] Partial Encryption Method That Enhances MP3 Security2015
- Author(s)
  Twe Ta Oo, Takao Onoye, Kilho Shin
- Journal Title
  
  IEICE Trans. Fundamentals
  
  Volume: E98.A Issue: 8 Pages: 1760-1768
- DOI
  10.1587/transfun.E98.A.1760
- NAID
  130005089905
- ISSN
  0916-8508, 1745-1337
- Language
  English
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-26330065
[Journal Article] Reliability-Configurable Mixed-Grained Reconfigurable Array Supporting C-based Design and Its Irradiation Testing2014
- Author(s)
  H. Konoura,D. Alnajjar,Y. Mitsuyama,H. Shimada,K. Kobayashi,H. Kanbara,H. Ochi,T. Imagawa,K. Wakabayashi,M. Hashimoto,T. Onoye,H. Onodera
- Journal Title
  
  IEICE Trans. on Fundamentals
  
  Volume: E97-A Pages: 2518-2529
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-26330065
[Journal Article] CoHOG特徴を用いた歩行者検出の確率的サンプリングに基づく高速化2013
- Author(s)
  劉載勲, 宮本龍介, 尾上孝雄
- Journal Title
  
  画像電子学会誌
  
  Volume: vol. 42 Pages: 30-40
- NAID
  130004870601
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23500062
[Journal Article] A Speed-Up Scheme Based on Multiple-Instance Pruning for Pedestrian Detection Using a Support Vector Machine2013
- Author(s)
  J. Yu, R. Miyamoto, and T. Onoye
- Journal Title
  
  IEEE Trans. Image Processing
  
  Volume: vol. 22 Issue: 12 Pages: 4752-4761
- DOI
  10.1109/tip.2013.2277823
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23500062
[Journal Article] CoHOG 特徴を用いた歩行者検出の確率的サンプリングに基づく高速化2013
- Author(s)
  劉載勲, 宮本龍介, 尾上孝雄,
- Journal Title
  
  画像電子学会誌
  
  Volume: 42 Pages: 30-40
- NAID
  130004870601
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23500062
[Journal Article] Implementing Flexible Reliability in a Coarse Grained Reconfigurable Architecture2013
- Author(s)
  D. Alnajjar,H. Konoura,Y. Ko,Y. Mitsuyama,M. Hashimoto,T. Onoye
- Journal Title
  
  IEEE Transactions on VLSI Systems
  
  Volume: 21 Issue: 12 Pages: 2165-2178
- DOI
  10.1109/tvlsi.2012.2228015
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23500062, KAKENHI-PROJECT-23700059
[Journal Article] Stress Probability Computation for Estimating NBTI-Induced Delay Degradation2012
- Author(s)
  H. Konoura, Y. Mitsuyama, M. Hashimoto, and T. Onoye
- Journal Title
  
  IEICE Trans. Fundamentals
  
  Volume: E94-A Pages: 2545-2553
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23500062
[Journal Article] A Ray Tracing Simulation of Sound Diffraction Based on the Analytic Secondary Source Model2012
- Author(s)
  M. Okada, T. Onoye, and W. Kobayashi
- Journal Title
  
  IEEE Trans. Audio, Speech, and Language Processing
  
  Volume: vol. 20 Issue: 9 Pages: 2448-2460
- DOI
  10.1109/tasl.2012.2203809
- NAID
  110008107128
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23500062
[Journal Article] A Coarse-Grained Dynamically Reconfigurable Architecture Enabling Flexible Reliability2009
- Author(s)
  D. Alnajjar, Y. Ko, T. Imagawa, M. Hiroraoto, Y. Mitsuyama, M. Hashimoto, H. Ochi, T. Onoye
- Journal Title
  
  Proceedings of Workshop on System Effects of Logic Soft Errors (SELSE) (発表予定)
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-19300011
[Journal Article] An ExperimentalStudy on Body-Biasing Layout StyleFocusing on Area Efficiency and SpeedControllability2009
- Author(s)
  K. Hamamoto, H. Fuketa, M. Hashimoto, Y.Mitsuyama, and T. Onoye
- Journal Title
  
  IEICE Trans onElectronics vol.E92-C, no.2
  
  Pages: 281-285
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-19300011
[Journal Article] Coarse-Grained Dynamically Reconfigurable Architecture with Flexible Reliability2009
- Author(s)
  Y. Ko, D. Alnajjar, Y. Mitsuyama, M. Hashimoto, T. Onoye
- Journal Title
  
  Proceedings of Workshop on Synthesis and System Integration of Mixed Technologies (発表予定)
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-19300011
[Journal Article] Trade-Off Analysis between Timing Error Rate and Power Dissipation for Adaptive Speed Control with Timing Error Prediction2009
- Author(s)
  H. Fuketa, M. Hashimoto, Y. Mitsuyama, T. Onoye
- Journal Title
  
  Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC)
  
  Pages: 266-271
- NAID
  10026861488
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-19300011
[Journal Article] マルコフモデルによるオシレータサンプリング方式真性乱数生成器の乱数品質解析2009
- Author(s)
  天木健彦, 橋本昌宜, 密山幸男, 尾上孝雄
- Journal Title
  
  第22回回路とシステム(軽井沢)ワークショップ論文集 (発表予定)
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-19300011
[Journal Article] An Experimental Study on Body-Biasing Layout Style Focusing on Area Efficiency and Speed Controllability2009
- Author(s)
  K. Hamamoto, H. Fuketa, M. Hashimoto, Y. Mitsuyama, T. Onoye
- Journal Title
  
  IEICE Trans, on Electronics vol. E92-C, no. 2
  
  Pages: 281-285
- NAID
  110006935797
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-19300011
[Journal Article] Experimental Study on Body-Biasing Layout Style -- Negligible Area Overhead Enables Sufficient Speed Controllability --2008
- Author(s)
  K. Hamamoto, H. Fuketa, M. Hashimoto, Y. Mitsuyama, T. Onoye
- Journal Title
  
  Proc. ACM Great Lake Symposium on VLSI (GLSVLSI)
  
  Pages: 387-390
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-19300011
[Journal Article] Area-EfficientReconfigurable Architecture for MediaProcessing2008
- Author(s)
  Y. Mitsuyama, K. Takahashi, R. Imai, M.Hasimoto, and T. Onoye
- Journal Title
  
  IEICE Trans on Fundamentalsof Electronics, Communications andComputer Sciences vol.E91-A, no.12
  
  Pages: 3651-3662
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-19300011
[Patent] 識別装置, データ判別装置, ソフトカスケード識別器を構成する方法, データの識別方法, および, プログラム2013
- Inventor(s)
  尾上孝雄, 宮本龍介, 劉載勲
- Industrial Property Rights Holder
  大阪大学
- Industrial Property Rights Type
  特許
- Filing Date
  2013-02-07
- Data Source
  KAKENHI-PROJECT-23500062
[Patent] 識別装置、データ判別装置、ソフトカスケード識別器を構成する方法、データの識別方法、および、プログラム2013
- Inventor(s)
  尾上孝雄，宮本龍介，劉載勲
- Industrial Property Rights Holder
  大阪大学
- Industrial Property Rights Type
  特許
- Filing Date
  2013-02-07
- Data Source
  KAKENHI-PROJECT-23500062
[Presentation] Implementation Technology of Media Processing Engines - Traditions and Trends2016
- Author(s)
  Takao Onoye
- Organizer
  International Conference on Digital Arts, Media and Technology
- Place of Presentation
  Chiang Rai, Thailand
- Year and Date
  2016-02-17
- Invited / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26330065
[Presentation] Vision-based Comprehensive Framework for Senior Driver Assistance2016
- Author(s)
  Mitsuhiko Koga, Takao Onoye, Jaehoon Yu, Toshitaka Azuma, Eric Aliwarga
- Organizer
  11th ITS European Congress
- Place of Presentation
  Glasgow, UK
- Year and Date
  2016-06-06
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26330065
[Presentation] System Design of Vision-based Framework for Senior Driver Assistance2016
- Author(s)
  Eric Aliwarga, Koichi Mitsunari, Jaehoon Yu, Takao Onoye, Toshitaka Azuma, Mitsuhiko Koga
- Organizer
  The 20th Workshop on Synthesis And System Integration of Mixed Information Technologies
- Place of Presentation
  Kyoto, Japan
- Year and Date
  2016-10-24
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26330065
[Presentation] Design of generic hardware for soft cascade-based linear SVM classification2015
- Author(s)
  Eric Aliwarga, Jaehoon Yu, Masahide Hatanaka, Takao Onoye
- Organizer
  IEEE Int'l Symp. Intelligent Signal Processing and Communication Systems
- Place of Presentation
  Nusa Dua, Indonesia
- Year and Date
  2015-11-09
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26330065
[Presentation] Mixed-grained reconfigurable architecture supporting flexible reliability and C-based design2013
- Author(s)
  H. Konoura, D. Alnajjar, Y. Mitsuyama, H. Ochi, T. Imagawa, S. Noda, K.Wakabayashi, M. Hashimoto, and T. Onoye
- Organizer
  Int'l Conf on ReConFigurable Computing and FPGAs
- Data Source
  KAKENHI-PROJECT-23500062
[Presentation] Toward VLSI Reliability Enhancement by Reconfigurable Architecture2013
- Author(s)
  T. Onoye
- Organizer
  2013 Regional Conference on Computer and Information Technology
- Place of Presentation
  バンコク(タイ)
- Invited
- Data Source
  KAKENHI-PROJECT-23500062
[Presentation] Mixed-grained reconfigurable architecture supporting flexible reliability and C-based design2013
- Author(s)
  H. Konoura,D. Alnajjar,Y. Mitsuyama,H. Ochi,T. Imagawa,S. Noda,K. Wakabayashi,M. Hashimoto,T. Onoye
- Organizer
  International Conference on ReConFigurable Computing and FPGAs
- Place of Presentation
  カンクン(メキシコ)
- Data Source
  KAKENHI-PROJECT-23500062
[Presentation] Performance Improvement of Channel Estimation for Ofdm Baseband Transceiver with Dynamic Subcarrier Selection2012
- Author(s)
  Yuya Iwasaki, Masahide Hatanaka, and Takao Onoye
- Organizer
  The First Asian Conference on Information Systems
- Place of Presentation
  Siam Reap, Cambodia
- Data Source
  KAKENHI-PROJECT-23500062
[Presentation] Pedestrian Localization Using CoHOG-based Detection and HSV-based Tracking2012
- Author(s)
  J. Yu, R. Miyamoto, T. Onoye, H. Sugano, and Y. Nakamura
- Organizer
  International Technical Conference on Circuits/Systems, Computers and Communications
- Data Source
  KAKENHI-PROJECT-23500062
[Presentation] Pedestrian Localization Using CoHOG-based Detection and HSV-based Tracking2012
- Author(s)
  Jaehoon Yu, Ryusuke Miyamoto, Takao Onoye, Hiroki Sugano, and Yukihiro Nakamura
- Organizer
  International Technical Conference on Circuits/Systems, Computers and Communications
- Place of Presentation
  札幌市(北海道)
- Data Source
  KAKENHI-PROJECT-23500062
[Presentation] 秘匿化機能の分散化に基づくセキュアなアンビエント無線通信システムの実装2012
- Author(s)
  岡田雅司, 畠中理英, 尾上孝雄
- Organizer
  第14回 DSPS教育会議
- Place of Presentation
  東京都
- Data Source
  KAKENHI-PROJECT-23500062
[Presentation] Performance Improvement of Channel Estimation for OFDM Baseband Transceiver with Subcarrier Selection2012
- Author(s)
  Y. Iwasaki, M. Hatanaka, and T. Onoye
- Organizer
  The 1st Asian Conference on Information Systems
- Data Source
  KAKENHI-PROJECT-23500062
[Presentation] メトロポリス・ヘイスティングス法を用いた物体検出手法の並列化検討2012
- Author(s)
  劉載勲, 宮本龍介, 尾上孝雄
- Organizer
  電子情報通信学会スマートインフォメディアシステム研究会
- Place of Presentation
  東京都
- Data Source
  KAKENHI-PROJECT-23500062
[Presentation] 多重領域分割に基づく複数の手掛りを用いた画像構造識別手法2011
- Author(s)
  劉載勲, 宮本龍介, 尾上孝雄
- Organizer
  電子情報通信学会スマートインフォメディアシステム研究会
- Place of Presentation
  沖縄県石垣市
- Data Source
  KAKENHI-PROJECT-23500062
[Presentation] A Ray Tracing Simulation of Sound Diffraction Based on Analytic Secondary Source Model2011
- Author(s)
  M. Okada, T. Onoye, and W. Kobayashi
- Organizer
  19th European Signal Processing Conference
- Place of Presentation
  Barcelona, Spain
- Data Source
  KAKENHI-PROJECT-23500062
[Presentation] マルコフモデルによるオシレータサンプリング方式真性乱数生成器の乱数品質解析2009
- Author(s)
  天木健彦, 橋本昌宜, 密山幸男, 尾上孝雄
- Organizer
  電子情報通信学会第22回
- Place of Presentation
  回路とシステム(軽井沢) ワークショップ
- Data Source
  KAKENHI-PROJECT-19300011
[Presentation] レイアウトを考慮した基板バイアスクラスタリング手法2009
- Author(s)
  濱本浩一, 橋本昌宜, 密山幸男, 尾上孝雄
- Organizer
  電子情報通信学会VLSI設計技術研究会
- Place of Presentation
  那覇市
- Year and Date
  2009-03-13
- Data Source
  KAKENHI-PROJECT-19300011
[Presentation] A Coarse-GrainedDynamically Reconfigurable ArchitectureEnabling Flexible Reliability2009
- Author(s)
  D. Alnajjar, Y. Ko, T. Imagawa, M.Hiromoto, Y. Mitsuyama, M. Hashimoto, H.Ochi, and T. Onoye
- Organizer
  in Proc.IEEE Workshop on System Effects of LogicSoft Errors (SELSE)
- Data Source
  KAKENHI-PROJECT-19300011
[Presentation] Coarse-GrainedDynamically Reconfigurable Architecturewith Flexible Reliability2009
- Author(s)
  Y. Ko, D. Alnajjar, Y. Mitsuyama, M.Hashimoto, and T. Onoye
- Organizer
  in Proc. 15thWorkshop on Synthesis and SystemIntegration of Mixed Technologies (SASIMI2009)
- Data Source
  KAKENHI-PROJECT-19300011
[Presentation] 基板バイアス印加レイアウト方式の面積効率と速度制御性の評価(VLD2008-27)2008
- Author(s)
  濱本浩一, 更田裕司, 橋本昌宜, 密山幸男, 尾上孝雄
- Organizer
  電子情報通信学会技術研究報告
- Data Source
  KAKENHI-PROJECT-19300011
[Presentation] 柔軟な信頼性を実現する粗粒度再構成可能アーキテクチャの検討(DC2008-41)2008
- Author(s)
  高永勲, Dawood Alnajjar, 密山幸男, 橋本昌宜, 尾上孝雄
- Organizer
  電子情報通信学会技術研究報告
- Data Source
  KAKENHI-PROJECT-19300011
[Presentation] ExperimentalStudy on Body-Biasing Layout Style --Negligible Area Overhead EnablesSufficient Speed Controllability --2008
- Author(s)
  K. Hamamoto, H. Fuketa, M. Hashimoto, Y.Mitsuyama, and T. Onoye
- Organizer
  inProc. ACM Great Lake Symposium on VLSI(GLSVLSI 2008)
- Data Source
  KAKENHI-PROJECT-19300011
[Presentation] 柔軟な信頼性を実現する粗粒度再構成可能アーキテクチャの検討2008
- Author(s)
  高永勲, Dawood Alnajjar, 密山幸男, 橋本昌宜, 尾上孝雄
- Organizer
  電子情報通信学会ディペンダブルコンピューティング研究会
- Place of Presentation
  北九州市
- Year and Date
  2008-11-17
- Data Source
  KAKENHI-PROJECT-19300011
[Presentation] タイミングエラー予告を用いた適応的速度制御におけるタイミングエラー頻度と消費電力のトレードオフ解析2008
- Author(s)
  更田裕司, 橋本昌宜, 密山幸男, 尾上孝雄
- Organizer
  情報処理学会DAシンポジウム
- Place of Presentation
  浜松市
- Year and Date
  2008-08-27
- Data Source
  KAKENHI-PROJECT-19300011
[Presentation] 基板バイアス印加レイアウト方式の面積効率と速度制御性の評価2008
- Author(s)
  濱本浩一, 更田裕司, 橋本昌宜, 密山幸男, 尾上孝雄
- Organizer
  電子情報通信学会 VLSI設計技術研究会
- Place of Presentation
  札幌市
- Year and Date
  2008-06-26
- Data Source
  KAKENHI-PROJECT-19300011
[Presentation] A Study onBody-Biasing Layout Style Focusing on AreaEfficiency and Speed2007
- Author(s)
  K. Hamamoto, H. Fuketa, M. Hashimoto, Y.Mitsuyama, and T. Onoye
- Organizer
  in Proc. 14thWorkshop on Synthesis and SystemIntegration of Mixed Technologies (SASIMI2007)
- Data Source
  KAKENHI-PROJECT-19300011
[Presentation] ダイナミックスペクトルアクセスを用いたOFDM送受信機のGPU実装に関する一検討
- Author(s)
  冨田幸佑, 畠中理英, 尾上孝雄
- Organizer
  電子情報通信学会技術研究報告
- Place of Presentation
  北海道大学
- Year and Date
  2014-07-09 – 2014-07-11
- Data Source
  KAKENHI-PROJECT-26330065
[Presentation] Tuning-Friendly Body BiasClustering for Compensating RandomVariability in Subthreshold Circuits(to appear)
- Author(s)
  K. Hamamoto, M. Hashimoto, Y. Mitsuyama, and T. Onoye
- Organizer
  Proceedings of IEEE/ACM InternationalSymposium on Low Power Electronics andDesign (ISLPED)
- Data Source
  KAKENHI-PROJECT-19300011
[Presentation] Normalized channel features for accurate pedestrian detection
- Author(s)
  R. Miyamoto, J. Yu, T. Onoye
- Organizer
  2014 Int'l Symp Communica, Ctrl, and Signal Processing
- Place of Presentation
  Athens, Greece
- Year and Date
  2014-05-21 – 2014-05-23
- Data Source
  KAKENHI-PROJECT-26330065
[Presentation] Progressive Audio Scrambling Via Complete Binary Tree's Traversal and Wavelet Transform
- Author(s)
  Twe Ta Oo, Takao Onoye
- Organizer
  2014 APSIPA ASC
- Place of Presentation
  Siem Reap, Cambodia
- Year and Date
  2014-12-09 – 2014-12-12
- Data Source
  KAKENHI-PROJECT-26330065

1. SHIRAKAWA Isao (10029100)

# of Collaborated Projects: 6 results

# of Collaborated Products: 0 results
2. ISHIURA Nagisa (60193265)

# of Collaborated Projects: 4 results

# of Collaborated Products: 0 results
3. FUJITA Gen (30304025)

# of Collaborated Projects: 4 results

# of Collaborated Products: 0 results
4. HATANAKA Masahide (70346188)

# of Collaborated Projects: 3 results

# of Collaborated Products: 3 results
5. MITSUYAMA Yukio (80346189)

# of Collaborated Projects: 2 results

# of Collaborated Products: 20 results
6. SHIGEHIRO Yuji (40243175)

# of Collaborated Projects: 2 results

# of Collaborated Products: 0 results
7. IZUMI Tomonori (30303887)

# of Collaborated Projects: 2 results

# of Collaborated Products: 0 results
8. HASHIMOTO Masanori (80335207)

# of Collaborated Projects: 1 results

# of Collaborated Products: 19 results
9. MASAKI Toshihiro (30294036)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
10. TAKEUCHI Yoshinori (70242245)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
11. NAKAMURA Yukihiro (60283628)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
12. 岩永信之 (00402991)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
13. 安浦寛人 (80135540)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results

ONOE TAKAO 尾上 孝雄

ONOYE Takao 尾上 孝雄

Research Projects

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VLSI Implementation of Generic Hardware for Machine LearningPrincipal Investigator

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Embedded system implementation of ambient media processing enginePrincipal Investigator

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Reconfigurable architecture with flexible dependabilityPrincipal Investigator

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Low Power VLSI Design for Portable Multimedia CommunicationPrincipal Investigator

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High-Performance Processor Design for Image Processing

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Computer Architecture bayed on Autonomous Reconfigurable Logic Device

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VLSI Architecture for Video Codec Based on Discrete Wavelet Transform

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Enhanced Memory Accessing Mechanism for Embedded ProcessorsPrincipal Investigator

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VLSI architecture for MPEG-4 Audio Visual Codec

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超低ビットレート画像圧縮符号化アルゴリズムのVLSI化に関する研究Principal Investigator

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VLSI Implementation for Digital Video Transmission and Compression

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MPEG2における動き予測機構のVLSI化に関する研究Principal Investigator

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マルチメディアプロセッサの設計に関する研究Principal Investigator

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ONOE TAKAO 尾上孝雄

ONOYE Takao 尾上孝雄