TAKESHI Yoshimura 吉村猛

… Alternative Names

YOSHIMURA Takeshi 吉村猛

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Researcher Number	80367177
Other IDs
Affiliation (based on the past Project Information) *help	2016: 早稲田大学, 理工学術院(情報生産システム研究科・センター), 教授 2010 – 2015: 早稲田大学, 理工学術院, 教授 2008: Waseda University, 大学院・情報生産システム研究科, 教授 2007: Waseda University, 大学院・情報生産システム研空科, 教授 2006: 早稲田大学, 大学院情報生産システム研究科, 教授 2005: 早稲田大学, 大学院・情報生産システム研究科, 教授
Review Section/Research Field	Principal Investigator Electron device/Electronic equipment Except Principal Investigator Computer system/Network
Keywords	Principal Investigator Highlevel Synthesis / 最適化 / 高位レベル合成 / アルゴリズム / Low power / Binding / Scheduling / ポート割り当て / 低消費電力 / 漏れ電力 … More / 動的電力 / ポート割り当て問題 / リソース割り当て / VLSI / スケジューリング / TSV / 低消費電力化 / Floorplanning / 高位合成 / 低消費電力設計 / ネットワークオンチップ / フロアプラン / 電子デバイス・集積回路 / 回路設計・CAD / 物理設計 / システムLSI … More Except Principal Investigator ハードウェア設計 / アルゴリズム / 回路設計・CAD / 電子デバイス・集積化回路 / 設計自動化 / ハードウエア設計 / コンピュータ自動設計 / LSIアーキテクチャ / LSI実装 / LSI設計 Less

Study of combinatorial and mathematical programming methods for high level synthesisPrincipal Investigator
- Principal Investigator
  
  Yoshimura Takeshi
- Project Period (FY)
  2014 – 2016
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  Electron device/Electronic equipment
- Research Institution
  Waseda University
Floorplan-base Design Environment Technologies for Large-Scale System LSIsPrincipal Investigator
- Principal Investigator
  
  YOSHIMURA Takeshi
- Project Period (FY)
  2011 – 2013
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  Electron device/Electronic equipment
- Research Institution
  Waseda University
Research on design and implementation of Ultra Large scale LSI
- Principal Investigator
  
  GOTO Satoshi
- Project Period (FY)
  2008 – 2010
- Research Category
  
  Grant-in-Aid for Scientific Research (A)
- Research Field
  
  Computer system/Network
- Research Institution
  Waseda University
Research on basic technologies for physical design of large scale system LSIPrincipal Investigator
- Principal Investigator
  
  YOSHIMURA Takeshi
- Project Period (FY)
  2005 – 2008
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  Electron device/Electronic equipment
- Research Institution
  Waseda University

All 2017 2016 2015 2014 2013 2012 2011 2010 2009 2008 2007 2006 2005 Other

All Journal Article Presentation

[Journal Article] An Efficient Multi-Level Algorithm for 3D-IC TSV Assignment2017
- Author(s)
  Cong Hao, Takeshi Yoshimura
- Journal Title
  
  IEICE Trans. Fundamentals
  
  Volume: E100.A Issue: 3 Pages: 776-784
- DOI
  10.1587/transfun.E100.A.776
- NAID
  130005397027
- ISSN
  0916-8508, 1745-1337
- Language
  English
- Peer Reviewed / Acknowledgement Compliant
- Data Source
  KAKENHI-PROJECT-26420323
[Journal Article] A Unified Scheduling Approach for Power and Resource Optimization with Multiple V-dd or/and V-th in High Level Synthesis2017
- Author(s)
  Cong Hao, Nan Wang, Takeshi Yoshimura
- Journal Title
  
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
  
  Volume: 印刷中
- Peer Reviewed / Acknowledgement Compliant / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26420323
[Journal Article] Interconnection Allocation Between Functional Units and Registers in High-Level Synthesis2017
- Author(s)
  Cong Hao, Jianmo Ni, Nan Wang, and Takeshi Yoshimura
- Journal Title
  
  IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  
  Volume: Vol.25, Issue.3 Issue: 3 Pages: 1140-1153
- DOI
  10.1109/tvlsi.2016.2607758
- Peer Reviewed / Acknowledgement Compliant / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26420323
[Journal Article] Leakage-Power-Aware Scheduling With Dual-Threshold Voltage Design2016
- Author(s)
  Nan Wang, Wei Zhong, Cong Hao, Song Chen, Takeshi Yoshimura, Yu Zhu
- Journal Title
  
  IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  
  Volume: Vol24. Issue10 Issue: 10 Pages: 3067-3079
- DOI
  10.1109/tvlsi.2016.2535221
- Peer Reviewed / Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26420323
[Journal Article] Leakage-Power-Aware Scheduling with Dual-Threshold Voltage Design2016
- Author(s)
  Nan Wang, Wei Zhong, Cong Hao, Song Chen and Takeshi Yoshimura
- Journal Title
  
  IEEE Transactions on Very Large Scale Integration Systems
  
  Volume: (掲載確定) Pages: 1-13
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-26420323
[Journal Article] Mobility Overlap-Removal-Based Leakage Power and Register-Aware Scheduling in High-Level Synthesis2014
- Author(s)
  Nan Wang, Song Chen, Wei Zhong, Nan Liu, Takeshi Yoshimura
- Journal Title
  
  IEICE Trans. Fundamentals
  
  Volume: E97.A Issue: 8 Pages: 1709-1719
- DOI
  10.1587/transfun.E97.A.1709
- NAID
  130004679254
- ISSN
  0916-8508, 1745-1337
- Language
  English
- Peer Reviewed / Acknowledgement Compliant / Open Access
- Data Source
  KAKENHI-PROJECT-26420323
[Journal Article] Leakage Power Aware Scheduling in High-Level Synthesis2014
- Author(s)
  Nan Wang, Song Chen, Cong Hao, Haoran Zhang, and Takeshi Yoshimura
- Journal Title
  
  IEICE Trans. Fundamentals
  
  Volume: E97.A Issue: 4 Pages: 940-951
- DOI
  10.1587/transfun.E97.A.940
- NAID
  130003394812
- ISSN
  0916-8508, 1745-1337
- Language
  English
- Peer Reviewed / Acknowledgement Compliant / Open Access
- Data Source
  KAKENHI-PROJECT-26420323
[Journal Article] Resource-Aware Multi-Layer Floorplanning for Partially Reconfigurable FPGAs2013
- Author(s)
  Nan Liu, Song Chen, Takeshi Yoshimura
- Journal Title
  
  IEICE Trans. Electron.
  
  Volume: E96.C Issue: 4 Pages: 501-510
- DOI
  10.1587/transele.E96.C.501
- NAID
  10031182826
- ISSN
  0916-8524, 1745-1353
- Language
  English
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23560417
[Journal Article] Floorplanning and Topology Synthesis for Application-Specific Network-on-Chips2013
- Author(s)
  Wei Zhong, Song Chen, Bo Huang, Takeshi Yoshimura, Satoshi Goto
- Journal Title
  
  IEICE Trans. Fundamentals
  
  Volume: E96.A Issue: 6 Pages: 1174-1184
- DOI
  10.1587/transfun.E96.A.1174
- NAID
  10031193803
- ISSN
  0916-8508, 1745-1337
- Language
  English
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23560417
[Journal Article] Cluster Generation and Network Component Insertion for Topology Synthesis of Application-Specific Network-on-Chips2012
- Author(s)
  W.Zhong,T.Yoshimura, B.Yu, S.Chen. S.Dong and S.Goto
- Journal Title
  
  IEICE Trans. Electron.
  
  Volume: E95.C Issue: 4 Pages: 534-545
- DOI
  10.1587/transele.E95.C.534
- NAID
  10030940704
- ISSN
  0916-8524, 1745-1353
- Language
  English
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23560417
[Journal Article] Cluster Generation and Network Component Insertion for Topology Synthesis of Application-Specific Network-on -Chips2012
- Author(s)
  Wei Zhong, Takeshi Yoshimura, B. Yu, S. Chen, S. Dong and S. Goto
- Journal Title
  
  IEICE Trans.on Electronics
  
  Volume: Vol.E95-C, No.4 Pages: 535-545
- NAID
  10030940704
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23560417
[Journal Article] Floorplanning for High Utilization of Heterogeneous FPGAs2012
- Author(s)
  Nan Liu, Song Chen, Takeshi Yoshimura
- Journal Title
  
  IEICE Trans. Fundamentals
  
  Volume: E95.A Issue: 9 Pages: 1529-1537
- DOI
  10.1587/transfun.E95.A.1529
- NAID
  10031142539
- ISSN
  0916-8508, 1745-1337
- Language
  English
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23560417
[Journal Article] メディア処理における超低消費電力SoC技術2010
- Author(s)
  後藤敏、池永剛、吉村猛、木村晋二、戸川望
- Journal Title
  
  情報処理
  
  Volume: Vo.51, No.7 Pages: 837-845
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20240004
[Journal Article] メデイア処理における超低消費電力SoC技術2010
- Author(s)
  後藤敏、池永剛、吉村猛、木村晋二、戸川望
- Journal Title
  
  情報処理 Vo.51,No.7
  
  Pages: 837-845
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20240004
[Journal Article] An Ultra-Low Bandwidth Design Method for MPEG-2 to H.264/AVC Transcoding2009
- Author(s)
  Xianghui Wei, Takeshi Ikenaga, Satoshi Goto
- Journal Title
  
  IEICE Trans.Fundamentals Vol.E92-A, No.4
  
  Pages: 1072-1079
- NAID
  10026856998
- Data Source
  KAKENHI-PROJECT-20240004
[Journal Article] Exploration of Schedule Space by Random Walk2009
- Author(s)
  Liangwei Ge, Song Chen and Takeshi Yoshimura
- Journal Title
  
  IPSJ Transactions on System LSI Design Methodologyv Vol.2
  
  Pages: 0-0
- NAID
  130000120663
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-17560319
[Journal Article] Exploration of Schedule Space by Random Walk2009
- Author(s)
  Liangwei Ge, Song Chen, Takeshi Yos himura
- Journal Title
  
  IPSJ Transactions on System LSI Design Methodology Vol. 2
  
  Pages: 30-42
- NAID
  130000120663
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-17560319
[Journal Article] An Ultra-Low Bandwidth Design Method for MPEG-2 to H.264/AVC Transcoding2009
- Author(s)
  Xianghui, Takeshi Ikenaga, Satoshi Goto
- Journal Title
  
  IEICE Trans.Fundamentals Vol.E92-A,No.4
  
  Pages: 1072-1079
- NAID
  10026856998
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20240004
[Journal Article] Adaptive Search Range Algorithms for Variable Block Size Motion Estimation in H. 264/AVC2008
- Author(s)
  Zhengxing CHEN, Yang SONG, Takeshi IKENA6A, Satoshi GOTO
- Journal Title
  
  IEICE Trans. Fundamentals Vol. E91-A No. 4
  
  Pages: 1015-1022
- NAID
  10026848571
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20240004
[Journal Article] Variable Block Size Motion Vector Retrieval Schemes for H. 264 Inter Frame Error Concealment2008
- Author(s)
  Lei Wang, Jun Wang, Satoshi Goto, Takeshi Ikenaga
- Journal Title
  
  IEICE Trans. Fundamentals Vol. E91-A, No10
  
  Pages: 2945-2953
- NAID
  10026852709
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20240004
[Journal Article] Fixed-Outline Floorplanning : Block Position Enumeration and a New Method for Calculating Area Costs2008
- Author(s)
  Song Chen, Takeshi Yoshimura
- Journal Title
  
  IEEE Transactions on CAD Vol. 27
  
  Pages: 858-871
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-17560319
[Journal Article] Reoonfigurable Variable Block SizeMotion Estimation Architecture for Search Range Reduction Algorithm2008
- Author(s)
  Yibo FAN, Takeshi IKENAGA, Satoshi GOTO
- Journal Title
  
  IEICETransaotion on Electronics Vol. E91-C, No. 4
  
  Pages: 440-448
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20240004
[Journal Article] A High-speed Design of Montgomery Multiplier2008
- Author(s)
  Yibo FAN, Takeshi IKENAGA, Satoshi GOTO
- Journal Title
  
  IEICE Tran.Fundamentals Vol.E91-A,No.4
  
  Pages: 971-977
- NAID
  10026848486
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20240004
[Journal Article] Fixed-Outline Floorplanning: Block Position Enumeration and a New Method for Calculating Area Costs2008
- Author(s)
  Song Chen and Takeshi Yoshimura
- Journal Title
  
  IEEE Transactions on CAD Vol.27/No.5
  
  Pages: 858-871
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-17560319
[Journal Article] Standard Deviation and Intra Prediction Mode Based Adaptive Spatial Error Concealment (SEC) in H.264/AVC2008
- Author(s)
  Jun WANG, Lei WANG, Takeshi IKENAGA, Satoshi GOTO
- Journal Title
  
  IEICE Trans.Fundamentals Vol.E91-A,No.10
  
  Pages: 2954-2962
- NAID
  10026852727
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20240004
[Journal Article] Adaptive Search Range Algorithms for Variable Block Size Motion Estimation in H.264/AVC2008
- Author(s)
  Zhengxing CHEN, Yang SONG, Takeshi IKENAGA, Satoshi GOTO
- Journal Title
  
  IEICE Trans.Fundamentals Vol.E91-A,No.4
  
  Pages: 1015-1022
- NAID
  10026848571
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20240004
[Journal Article] A High-speed Design of Montgomery Multiplier2008
- Author(s)
  Yibo FAN, Takeshi IKENAGA, Satoshi GOTO
- Journal Title
  
  IEICE Tran. Fundamentals Vol. E91-A No. 4
  
  Pages: 971-977
- NAID
  10026848486
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20240004
[Journal Article] A High Performance Partially-Parallel Irregular LDPC Decoder Based on Sum-Delta Message Passing Sohedule2008
- Author(s)
  Wen Jl, Yata ABE, Takeshi IKENAGA, Satoshi GOTO
- Journal Title
  
  IEICE Special Section on VLSI Design and CAD Algorithms Vol. E91-A, No12
  
  Pages: 3622-3629
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20240004
[Journal Article] A Synthesis Method of General Floating-Point Arithmetic Units by Aligned Partition2008
- Author(s)
  Liangwei Ge, Song Chen, Yuichi Nakamura, Takeshi Yoshimura
- Journal Title
  
  IPSJ Transactions on System LSI Design Methodology Vol. 1
  
  Pages: 67-77
- NAID
  130002073182
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-17560319
[Journal Article] A High Performance Partially-Parallel Irregular LDPC Decoder Based on Sum-Delta Message Passing Schedule2008
- Author(s)
  Wen JI, Yata ABE, Takeshi IKENAGA, Satoshi GOTO
- Journal Title
  
  IEICE Special Section on VLSI Design and CAD Algorithms Vol.E91-A,No.12
  
  Pages: 3622-3629
- NAID
  10026854153
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20240004
[Journal Article] Standard Deviation and Intra Prediction Mode Based Adaptive Spatial Error Concealment(SEC) in H.264/AVC2008
- Author(s)
  Jun WANG, Lei WANG, Takeshi IKENAGA, Satoshi GOTO
- Journal Title
  
  IEICE Trans. Fundamentals Vol. E91-A, No. 10
  
  Pages: 2954-2962
- NAID
  10026852727
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20240004
[Journal Article] Reconfigurable Variable Block Size Motion Estimation Architecture for Search Range Reduction Algorithm2008
- Author(s)
  Yibo FAN, Takeshi IKENAGA, Satoshi GOTO
- Journal Title
  
  IEICE Transaction on Electronics Vol.E91-C,No.4
  
  Pages: 440-448
- NAID
  10026817345
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20240004
[Journal Article] Variable Block Size Motion Vector Retrieval Schemes for H.264 Inter Frame Error Concealment2008
- Author(s)
  Lei Wang, Jun Wang, Satoshi Goto, Takeshi Ikenaga
- Journal Title
  
  IEICE Trans.Fundamentals Vol.E91-A,No.10
  
  Pages: 2945-2953
- NAID
  10026852709
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-20240004
[Journal Article] A Stable Fixed-Outline Floorplanning Method2007
- Author(s)
  Song Chen, Takeshi Yoshimura
- Journal Title
  
  Proceedings of International Symposium on Physical Design(ISPD2007)
- Data Source
  KAKENHI-PROJECT-17560319
[Journal Article] Score Sequence Pair Problems of(r11,r12,r22)-Tournaments〜Determination of Realizability2007
- Author(s)
  Masaya Takahashi, Takahiro Watanabe, Takeshi Yoshimura
- Journal Title
  
  IEICE Transactions on Information and Systems Vol.E90-D,No.2
  
  Pages: 440-448
- Data Source
  KAKENHI-PROJECT-17560319
[Journal Article] A Fixed-Outline Floorplanning Method2007
- Author(s)
  Takeshi Yosihmura and Song Chen
- Journal Title
  
  Proceedings of ASCON2007
  
  Pages: 1070-1075
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-17560319
[Journal Article] Construction of an (r11,r12,r22)-Tournament from a Score Sequence Pair2007
- Author(s)
  Masaya Takahashi, Takahiro Watanabe and Takeshi Yoshimura
- Journal Title
  
  Proceedings of International Symposium on Circuits and Systems (ISCAS 2007)
  
  Pages: 3403-3406
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-17560319
[Journal Article]2007
- Author(s)
  Liangwei Ge, Song Chen, Takeshi Yoshimura, 他
- Journal Title
  
  IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E90-A/9
  
  Pages: 1940-1948
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-17560319
[Journal Article] Performance Maximized Interlayer Via Planning for 3D Ics2007
- Author(s)
  Jun Lu, Song Chen, and Takeshi Yoshimura
- Journal Title
  
  Proceedings of ASICON2007
  
  Pages: 1096-1099
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-17560319
[Journal Article] Domino Logic Synthesis System and Its Applications2006
- Author(s)
  Ko Yoshikawa, Shigeto Inui, Yuichi Nakamura, Takeshi Yoshimura
- Journal Title
  
  Jouranal of Circuits, Systems and Computers Vol.15,No.3
- Data Source
  KAKENHI-PROJECT-17560319
[Journal Article] Removal of Overlapped Freedom during Scheduling in High Level Synthesis2006
- Author(s)
  Liangwei Ge, Kouhei Isoda, Takeshi Yoshimura
- Journal Title
  
  Proceedings of the 13th Workshop on Synthesis And System Intergration of MIxed Technologies
- Data Source
  KAKENHI-PROJECT-17560319
[Journal Article] Score Sequence Pair Problems of (r11,r12,r22)-Tournaments--Construction--2006
- Author(s)
  Masaya Takahashi, Takahiro Watanabe, Takeshi Yoshimura
- Journal Title
  
  IEICE CAS研究会資料
- Data Source
  KAKENHI-PROJECT-17560319
[Journal Article] A Consideration of the Score Sequence Problems of (R11,R12,R22)-Tournaments2006
- Author(s)
  Masaya Takahashi, Takahiro Watanabe, Takeshi Yoshimura
- Journal Title
  
  Proceeding of abstract, International Mathematical Conference at Belgrade
  
  Pages: 50-51
- Data Source
  KAKENHI-PROJECT-17560319
[Journal Article] Realizability of Score Sequence Pair of an (r11,r12,r22)-Tournament2006
- Author(s)
  Masaya Takahashi, Takahiro Watanabe, Takeshi Yoshimura
- Journal Title
  
  Proceedings of IEEE Asia Pacific Conference on Circuits and Systems at Singapore
  
  Pages: 1021-1024
- Data Source
  KAKENHI-PROJECT-17560319
[Journal Article] On the Number of 3-D IC Floorplan COnfigurations and a Solution Perturbation Method with Good Convergence2006
- Author(s)
  Song Chen, Takeshi Yoshimura
- Journal Title
  
  Proceedings of IEEE Asia Pacific Conference on Circuits and Systems at Singapore (Best Paper Award)
- Data Source
  KAKENHI-PROJECT-17560319
[Journal Article] Hierarchical-Analysis-Based Fast Chip-Scale Power Estimation Method for Large and Complex LSIs2006
- Author(s)
  Yuichi Nakamura, Takeshi Yoshimura
- Journal Title
  
  IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences Vol.E89-A,No.12
  
  Pages: 3458-3463
- NAID
  110007537848
- Data Source
  KAKENHI-PROJECT-17560319
[Journal Article] A Fast Chip-Scale Power Estimation Method for Large and Complex LSIs Based on Hierarchical Analysis2005
- Author(s)
  Yuichi Nakamura, T.Yoshimura
- Journal Title
  
  Proc.International Symposium on Circuits and Systems (ISCAS)
- Data Source
  KAKENHI-PROJECT-17560319
[Journal Article] Max-Flow Scheduling in High Level Synthesis2005
- Author(s)
  Liangwei Ge, Kouhei Isoda, Takeshi Yoshimura
- Journal Title
  
  IEICE CAS研究会資料
- NAID
  110004020765
- Data Source
  KAKENHI-PROJECT-17560319
[Journal Article] Design and Implementation of an EOS Chip2005
- Author(s)
  Liangwei ge, Takeshi Yoshimura
- Journal Title
  
  Proc.6-th International Conference on ASIC
- Data Source
  KAKENHI-PROJECT-17560319
[Journal Article] An Engineering Change Orders Design Method based on Patchwork-like Partitioning for High Performance LSIs2005
- Author(s)
  Yuichi Nakamura, Ko Yoshikawa, Takeshi Yoshimura
- Journal Title
  
  IEICE Transactions Vol.E88-A, No.12
  
  Pages: 3351-3357
- NAID
  110004019436
- Data Source
  KAKENHI-PROJECT-17560319
[Journal Article] Solving the rectangular packing problem by a Combined Order-based GA/SA based on sequence-pair2005
- Author(s)
  Wang Shen, Takeshi Yoshimura
- Journal Title
  
  Proc.of DA-Symposium
- Data Source
  KAKENHI-PROJECT-17560319
[Presentation] Power-efficient Partitioning and Cluster Generation Design for Application-Specific Network-on-Chip2016
- Author(s)
  Jiayi Ma, Cong Hao, Takeshi Yoshimura
- Organizer
  ISOCC 2016: 13th International Soc Design Conference
- Place of Presentation
  Jeju, South Korea
- Year and Date
  2016-10-23
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26420323
[Presentation] Economical Smart Home Scheduling for Single and Multiple Users2016
- Author(s)
  Cong Hao, Takeshi Yoshimura
- Organizer
  2016 IEEE 59th International Midwest Symposium on Circuits and Systems (MWSCAS)
- Place of Presentation
  Abu Dhabi, United Arab Emirates
- Year and Date
  2016-10-15
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26420323
[Presentation] An Efficient Algorithm for 3D-IC TSV Assignment2016
- Author(s)
  Cong Hao, Nan Ding, Takeshi Yoshimura
- Organizer
  2016 14th IEEE International NEWCAS Conference
- Place of Presentation
  Vancouver, Canada
- Year and Date
  2016-06-26
- Data Source
  KAKENHI-PROJECT-26420323
[Presentation] Thermal-Aware Floorplanning for NoC-Sprinting2016
- Author(s)
  Hui Zhu, Cong Hao, Takeshi Yoshimura
- Organizer
  2016 IEEE 59th International Midwest Symposium on Circuits and Systems (MWSCAS)
- Place of Presentation
  Abu Dhabi, United Arab Emirates
- Year and Date
  2016-10-15
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26420323
[Presentation] EACH: An Energy-Efficient High-Level Synthesis Framework for Approximate Computing2016
- Author(s)
  Cong Hao and Takeshi Yoshimura
- Organizer
  2nd Workshop On Approximate Computing (WAPCO 2016)
- Place of Presentation
  Prague, Czech Republic
- Year and Date
  2016-01-18
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26420323
[Presentation] Simultaneous Scheduling and Binding for Resource Usage and Interconnect Complexity Reduction in High-Level Synthesis2015
- Author(s)
  Cong Hao, Jian-Mo Ni, Hui-Tong Wang and Takeshi Yoshimura
- Organizer
  2015 IEEE 11th International Conference on ASIC (ASICON 2015)
- Place of Presentation
  Chengdu, China
- Year and Date
  2015-11-03
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26420323
[Presentation] Primal-Dual Method based Simultaneous Functional Unit and Register Binding2015
- Author(s)
  Jianmo Ni, Cong Hao, Nan Wang and Takeshi Yoshimura
- Organizer
  2015 IEEE 11th International Conference on ASIC (ASICON 2015)
- Place of Presentation
  Chengdu, China
- Year and Date
  2015-11-03
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26420323
[Presentation] An Efficient Tabu Search Methodology for Port Assignment Problem in High-Level Synthesis2015
- Author(s)
  Cong Hao, Nan Wang, Jian-Mo Ni and Takeshi Yoshimura
- Organizer
  24th International Workshop on Logic & Synthesis
- Place of Presentation
  Mountain View, CA
- Year and Date
  2015-06-12
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-26420323
[Presentation] Port Assignment for Multiplexer and Interconnection Optimization2013
- Author(s)
  Cong Hao, T. Yoshimura(他3名)
- Organizer
  ASQED2013
- Place of Presentation
  Penang, Malaysia
- Year and Date
  2013-08-03
- Data Source
  KAKENHI-PROJECT-23560417
[Presentation] Network Simplex Method Based Multiple Voltage Scheduling in Power-Efficient High-Level Synthesis2013
- Author(s)
  Cong Hao, Song Chen and Takeshi Yoshimura
- Organizer
  ASP-DAC 2013
- Place of Presentation
  Yokohama, Japan
- Invited
- Data Source
  KAKENHI-PROJECT-23560417
[Presentation] Genetic Algorithm Based Pipeline Scheduling in High-level Synthesis2013
- Author(s)
  Xiaohao Gao, Takeshi Yoshimura
- Organizer
  2013 IEEE 10th International Conference on ASIC (ASICON 2013)
- Place of Presentation
  Shenzhen, China
- Data Source
  KAKENHI-PROJECT-23560417
[Presentation] A novel floorplan representation with random contour corner selecting scheme2013
- Author(s)
  Xiaohao Gao, Takeshi Yoshimura
- Organizer
  IEEE TENCON Spring 2013 Conference
- Place of Presentation
  Sydney, Australia
- Data Source
  KAKENHI-PROJECT-23560417
[Presentation] Lagrangian Relaxation Based Pin Assignment and Through-Silicon Via Planning for 3-D SoCs2013
- Author(s)
  Wei Zhong, Song Chen, Yang Geng, Takeshi Yoshimura
- Organizer
  2013 IEEE 10th International Conference on ASIC (ASICON 2013)
- Place of Presentation
  Shenzhen, China
- Data Source
  KAKENHI-PROJECT-23560417
[Presentation] Mobility overlap-removal based leakage power aware scheduling in high-level synthesis2013
- Author(s)
  Nan Wang, Song Chen, Takeshi Yoshimura
- Organizer
  IEEE International Symposium on Circuits and Systems (ISCAS2013)
- Place of Presentation
  Beijing, China
- Data Source
  KAKENHI-PROJECT-23560417
[Presentation] Power and Resource Aware Scheduling with Multiple Voltages2013
- Author(s)
  Haoran Zhang, Cong Hao, Nan Wang, Song Chen, Takeshi Yoshimura
- Organizer
  2013 IEEE 10th International Conference on ASIC (ASICON 2013)
- Place of Presentation
  Shenzhen, China
- Data Source
  KAKENHI-PROJECT-23560417
[Presentation] Topology-aware floorplanning for 3D application -specific Network-on-Chip synthesis2013
- Author(s)
  Bo Huang, S. Chen, W. Zhong, T.Yoshimura
- Organizer
  Proc.IEEE ISCAS2013
- Place of Presentation
  Beijing, China
- Year and Date
  2013-05-19
- Data Source
  KAKENHI-PROJECT-23560417
[Presentation] Topology-aware floorplanning for 3D application-specific Network-on-Chip synthesis2013
- Author(s)
  Bo Huang, Song Chen, Wei Zhong, Takeshi Yoshimura
- Organizer
  IEEE International Symposium on Circuits and Systems (ISCAS2013)
- Place of Presentation
  Beijing, China
- Data Source
  KAKENHI-PROJECT-23560417
[Presentation] Min-Cut Based Leakage Power Aware Scheduling in High-Level Synthesis2013
- Author(s)
  Nan Wang, Song Chen and Takeshi Yoshimura
- Organizer
  ISQED 2013
- Place of Presentation
  Santa Clara, USA
- Invited
- Data Source
  KAKENHI-PROJECT-23560417
[Presentation] Port Assignment for Multiplexer and Interconnection Optimization2013
- Author(s)
  Cong Hao, Haoran Zhang, S. Chen, Takeshi Yoshimura, M-Y Wu
- Organizer
  2013 IEEE 10th International Conference on ASIC (ASICON 2013)
- Place of Presentation
  Shenzhen, China
- Data Source
  KAKENHI-PROJECT-23560417
[Presentation] Network Simplex Method Based Multiple Voltage Scheduling in Power-Efficient High-Level Synthesis2013
- Author(s)
  Cong Hao, Song Chen, Takeshi Yoshimura
- Organizer
  ASP-DAC2013
- Place of Presentation
  Yokohama, Japan
- Year and Date
  2013-01-22
- Data Source
  KAKENHI-PROJECT-23560417
[Presentation] Timing and Resource Constrained Leakage Power Aware Scheduling in High-Level Synthesis2013
- Author(s)
  Nan Wang, Song Chen, Takeshi Yoshimura
- Organizer
  2013 IEEE 10th International Conference on ASIC (ASICON 2013)
- Place of Presentation
  Shenzhen, China
- Data Source
  KAKENHI-PROJECT-23560417
[Presentation] Power and Resource Aware Scheduling with Multiple Voltages2013
- Author(s)
  Haoran Zhang, C. Hao, N. Wang, S. Chen, T. Yoshimura
- Organizer
  ASICON2013
- Place of Presentation
  Shenzhen, China
- Year and Date
  2013-10-28
- Data Source
  KAKENHI-PROJECT-23560417
[Presentation] Practically Scalable Floorplanning with Voltage Island Generation2012
- Author(s)
  Song Chen，Xiaolin Zhang，Takeshi Yoshimura
- Organizer
  ISLPED
- Place of Presentation
  Redondo Beach, CA, USA
- Invited
- Data Source
  KAKENHI-PROJECT-23560417
[Presentation] Wirelength Driven I/O Buffer Placement for Flip-Chip with Timing-Constrained2012
- Author(s)
  Nan Liu, Song Chen and Takeshi Yoshimura
- Organizer
  APC-CAS 2012
- Place of Presentation
  Kaohsiung, Taiwan
- Invited
- Data Source
  KAKENHI-PROJECT-23560417
[Presentation] Network-on-Chip Synthesis with Topology-Aware Floorplanning2012
- Author(s)
  Bo Huang，S ong Chen，WeiZhong，T. Yoshimura
- Organizer
  International Symposium on Integrated Circuits and Systems Design (SBCCI)
- Place of Presentation
  Brasília, Brazil
- Invited
- Data Source
  KAKENHI-PROJECT-23560417
[Presentation] Port Assignment for Interconnect Reduction in High-Level Synthesis2012
- Author(s)
  Cong Hao, Song Chen, Takeshi Yoshimura
- Organizer
  VLSI-DAT
- Place of Presentation
  Hsinchu, Taiwan
- Invited
- Data Source
  KAKENHI-PROJECT-23560417
[Presentation] Integrating Routing Path Allocation with Network Component Placement for Application- Specific Network-on-Chips2012
- Author(s)
  Wei Zhong,Song Chen,Dan Su,Takeshi Yoshimura,S.Goto
- Organizer
  ITC-CSCC
- Place of Presentation
  Sapporo, Japan
- Invited
- Data Source
  KAKENHI-PROJECT-23560417
[Presentation] Port Assignment for Interconnect Reduction in High-Level Synthesis2012
- Author(s)
  Cong Hao, S. Chen, Takeshi Yoshimura
- Organizer
  VLSI-DAT2012
- Place of Presentation
  Hsinchu, Taiwan
- Year and Date
  2012-04-22
- Data Source
  KAKENHI-PROJECT-23560417
[Presentation] An Efficient Level-Shifter Floorplanning Method for Multi-Voltage Design2011
- Author(s)
  Xiaolin Zhang, Zhi Lin, Song Chen, Takeshi Yoshimura
- Organizer
  IEEE International Conference on ASIC (ASICON)
- Place of Presentation
  中国、厦門
- Data Source
  KAKENHI-PROJECT-23560417
[Presentation] A Low Power Technology Mapping Method for Adaptive Logic Module2011
- Author(s)
  Wei Chen, Yuichi Nakamura, Xiaolin Zhang, Takeshi Yoshimura
- Organizer
  International Conference on Field-Programmable Technology
- Place of Presentation
  インド、ニューデリ
- Data Source
  KAKENHI-PROJECT-23560417
[Presentation] Floorplanning driven network-on-chip synthesis for 3-D SoCs2011
- Author(s)
  Wei Zhong, Song Chen, Fei Ma, Takeshi Yoshimura, and Satoshi Goto
- Organizer
  IEEE International Symposium on Circuits and Systems (ISCAS)
- Place of Presentation
  ブラジル、リオデジャネイロ
- Data Source
  KAKENHI-PROJECT-23560417
[Presentation] Mobility Overlap-Removal Based Timing-Constrained Scheduling2011
- Author(s)
  Song Chen, Yuan Yao, Takeshi Yoshimura
- Organizer
  IEEE International Conference on ASIC (ASICON)
- Place of Presentation
  中国、厦門
- Data Source
  KAKENHI-PROJECT-23560417
[Presentation] Floorplanning driven network-on -chip synthesis for 3-D SoCs2011
- Author(s)
  Wei Zhong, S. Chen, F. Ma, Takeshi Yoshimura, S. Goto
- Organizer
  ISCAS2011
- Place of Presentation
  Rio De Janeiro, Brazil
- Year and Date
  2011-05-15
- Data Source
  KAKENHI-PROJECT-23560417
[Presentation] A Fast Hybrid Decision Algorithm for H.264/AVC Intra Prediction Based on Entropy Theory2009
- Author(s)
  Guifen Tian, Tianruo Zhang, Takeshi Ikenaga, 後藤敏
- Organizer
  MMM 2009
- Place of Presentation
  Sophia-Antipolis, France, LNCS 5371
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A High Performance LDPC Decoder for IEEE802.11n Standard2009
- Author(s)
  Wen Ji, Yata Abe, Takeshi Ikenaga, Satoshi Goto
- Organizer
  ASP-DAC2009
- Place of Presentation
  Yokohama, Japan
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Study of Effect of Oscilloscope Parameters on DPA Attacks2009
- Author(s)
  Guoyu QIAN, Yibo FAN, Takeshi IKENAGA, Yukiyasu TSUNOO, Satoshi GOTO
- Organizer
  2009 International Conference on Information Security and Privacy, Orlando(46-53)
- Place of Presentation
  USA
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] Lagrangian relaxation based register placement for high-performance circuits2009
- Author(s)
  M.-F. Chiang, T. Okamoto, and T. Yoshimura
- Organizer
  Proc. 10th International Symposium on Quality Electronic Design, San Jose, USA
- Place of Presentation
  USA
- Data Source
  KAKENHI-PROJECT-17560319
[Presentation] A Study of Effect of Oscilloscope Parameters on DPA Attacks2009
- Author(s)
  Guoyu QIAN, Yibo FAN, Takeshi IKENAGA, Yukiyasu TSUNOO, Satoshi GOTO
- Organizer
  2009 International Conference on Information Security and Privacy
- Place of Presentation
  Orlando, USA
- Year and Date
  2009-07-14
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A generalized v-shaped multi-level method for large scale Foorplanning2009
- Author(s)
  S. Chen, Z. Xu, T. Yoshimura
- Organizer
  10th International Symposium on Quality Electronic Design
- Place of Presentation
  San Jose, USA
- Data Source
  KAKENHI-PROJECT-17560319
[Presentation] Lagrangian relaxation based register placement for high-performance circuits2009
- Author(s)
  M. -F. Chiang, T. Okamoto, T. Yoshimura
- Organizer
  10th International Symposium on Quality Electronic Design
- Place of Presentation
  San Jose, USA
- Data Source
  KAKENHI-PROJECT-17560319
[Presentation] A High Performance LDPC Decoder for IEEE802.11n Standard2009
- Author(s)
  Wen Ji, Yata Abe, Takeshi Ikenaga, 後藤敏
- Organizer
  ASP-DAC2009
- Place of Presentation
  Japan, Jan.
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Fast Hybrid Decision Algorithm for H. 264/AVC Intra Prediction Based on Entropy Theory2009
- Author(s)
  Guifen Tian, Tianruo Zhang, Takeshi lkenaga, Satoshi Goto
- Organizer
  MMM 2009
- Place of Presentation
  France
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Novel Hardware-Friendly Regular 3-Step Integer Motion Estimation Algorithm for H.264/AVC2008
- Author(s)
  Wenqi YOU, Xianghui WEI, Yang SONG, Takeshi IKENAGA, 後藤敏
- Organizer
  2008年電子情報通信学会通信ソサイエティ大会
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Hardware-Oriented High Precision Motion Vector Prediction Scheme for MPEG-2 to H.264 Transcoding2008
- Author(s)
  Xianghui WEI, Wenming TANG, Guifen TIAN, Takeshi IKENAGA, 後藤敏
- Organizer
  CISP
- Place of Presentation
  Hainan, China
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] On objective functions for Fixed-outline Foorplanning2008
- Author(s)
  L. Wang, X. Zhang, S. Chen, T. Yoshimura
- Organizer
  the 23rd International Technical Conference on Circuits/Systems, Computers and Communications
- Place of Presentation
  Shimonoseki, Japan
- Data Source
  KAKENHI-PROJECT-17560319
[Presentation] An Adaptive Spatial Error Goncealment(SEC) with More Accurate MB Type Decision in H.264/AVC2008
- Author(s)
  Jun WANG, Lei WANG, Takeshi IKENAGA, Satoshi GOTO
- Organizer
  IET-VIE
- Place of Presentation
  Xian, China
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] Rate Estimation of RD optimization for Intra mode decision of H.264AVC2008
- Author(s)
  Yan ZHUANG, Takeshi IKENAGA, 後藤敏
- Organizer
  CISP
- Place of Presentation
  Hainan, China
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Fast Block Type Decision Algorithm for H.264/AVC Intra Prediction2008
- Author(s)
  Guifen Tian, Tianruo Zhang, Takeshi Ikenaga, 後藤敏
- Organizer
  2008年電子情報通信学会通信ソサイエティ大会
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Power-saving 1Gbps Irregular LDPC Decoder based on High-efficiency Message Passing2008
- Author(s)
  Wenming TANG, Wen JI, Xianghui WEI, Takeshi IKENAGA, 後藤敏
- Organizer
  ITC-CSCC
- Place of Presentation
  Shimonoseki, Japan
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Novel Rate Control Algorithm for H. 264/AVC2008
- Author(s)
  Zhao MIN, Takeshi IKENAGA, Satoshi GOTO
- Organizer
  ITC-CSCC
- Place of Presentation
  Shimonoseki, Japan
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Low Bandwidth Integer Motion Estimation Module for MPEG-2 to H.264 Transcoding2008
- Author(s)
  Xianghui WEI, Wenming TANG, Guifen TIAN, Takeshi IKENAGA, 後藤敏
- Organizer
  APCCAS2008
- Place of Presentation
  Macao, China
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Hardware-Oriented High Precision Motion Vector Prediction Scheme for MPEG-2 to H. 264 Transcoding2008
- Author(s)
  Xianghui WEI, Wenming TANG, Guifen TIAN, Takeshi IKENAGA, Satoshi GOTO
- Organizer
  CISP
- Place of Presentation
  Hainan, China
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A High Quality Fast Motion Estimation Algorithm for H. 264/AVC2008
- Author(s)
  Wenqi YOU, Yang SONG, Takeshi IKENAGA, Satoshi GOTO
- Organizer
  CISP
- Place of Presentation
  Hainan, China
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Low-oost Reoonfigurable Architecture for AES Algorithm2008
- Author(s)
  Yibo FAN, Takeshi IKENAGA, Satoshi GOTO
- Organizer
  ICICS 2008
- Place of Presentation
  Prague, Czech
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] Automatic implementation of arithmetic functions in high-level synthesis2008
- Author(s)
  L. Ge, S. Chen, T. Yoshimura
- Organizer
  9th International Conference on Solid-state and Integrated-Cirouit Technology
- Place of Presentation
  Beijing, China
- Data Source
  KAKENHI-PROJECT-17560319
[Presentation] A Novel Fast Block Type Decision Algorithm for Intra Prediction in H. 264/AVC High Profile2008
- Author(s)
  Tianruo ZHANG, Guifen TIAN, Takeshi IKENAGA, Satoshi GOTO
- Organizer
  The 23rd International Technical Conference on Circuits/Systems, Computersand Communications
- Place of Presentation
  Shimonoseki, Japan
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] High-speed, pipelined implementation of squashing functions in neural networks2008
- Author(s)
  L. Ge, S. Chen, T. Yoshimura
- Organizer
  9th International Conference on Solid-state and Integrated-Cirouit Technology
- Place of Presentation
  Beijing, China
- Data Source
  KAKENHI-PROJECT-17560319
[Presentation] Efficienoy-Complexity Curve Based method for Evaluating Adaptive Search Range Algorithms in Motion Estimation2008
- Author(s)
  Zhenxing CHEN, Takeshi IKENAGA, Satoshi GOTO
- Organizer
  CISP
- Place of Presentation
  Hainan, China
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Frequency-Based Fast Block Type Decision Algorithm for intra Prediction in H. 264/AVC High Profile2008
- Author(s)
  Tianruo ZHANG, Guifen TIAN, Takeshi IKENAGA, Satoshi GOTO
- Organizer
  APCCAS2008
- Place of Presentation
  Macao, China
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] High Throughput VLSI Architecture of a Fast Mode Decision Algorithm for H. 264/AVC Intra Prediction2008
- Author(s)
  Tianruo ZHANG, Shen LI, Guifen TIAN, Takeshi IKENAGA, Satoshi GOTO
- Organizer
  International Conference on Gommunioations, Circuits and Systems
- Place of Presentation
  Xiamen, China
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] FPGA & ASIC Implementation of Differential Power Analysis Attack on AES2008
- Author(s)
  Guoyu QIAN, Yibo Fan, Yukiyasu Tsunoo, Takeshi I kenaga, Satoshi Goto
- Organizer
  Insorypt 2008
- Place of Presentation
  China
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] High Throughput Partially-Parallel Irregular LDPC Decoder Based on Delta-Value Message-Passing Schedule2008
- Author(s)
  Wen Jl, Xing LI, Takeshi IKENAGA, Satoshi GOTO
- Organizer
  VLSI Design, Automation and Test
- Place of Presentation
  Hsinchu, Taiwan
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Novel Hardware-Friendly Regular 3-Step Integer Motion Estimation Algorithm for H. 264/AVC2008
- Author(s)
  Wenqi YOU, Xianghui WEI, Yang SONG, Takeshi IKENAGA. Satoshi GOTO
- Organizer
  電子情報通信学会通信ソサイェティ大会
- Place of Presentation
  Kanagawa, Japan
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Cost-Efficient Partially-Parallel Irregular LDPC Decoder Based on Sum-Delta Message Passing Algorithm2008
- Author(s)
  Wen JI, Yuta ABE, Takeshi IKENAGA, 後藤敏
- Organizer
  GLSVLSI
- Place of Presentation
  Florida, USA
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] An Extended Small Diamond Search Algorithm for Fast Block Motion Estimation2008
- Author(s)
  Chang-Uk JEONG, Takeshi IKENAGA, 後藤敏
- Organizer
  ITC-CSCC
- Place of Presentation
  Shimonoseki, Japan
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Cost-Efficient Partially-Parllel Irregular LDPC Decoder Based on Sum-Delta Message Passing Algorithm2008
- Author(s)
  Wen Jl, Yuta ABE, Takeshi IKENAGA, Satoshi GOTO
- Organizer
  GLSVLSI
- Place of Presentation
  Florida, USA
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A synthesis method of general Floating-point arithmetic units by aligned partition2008
- Author(s)
  L. Ge, S. Chen, Y. Nakamura, T. Yoshimura
- Organizer
  the 23rd International Technical Conference on Circuits/Systems, Computers and Communications
- Place of Presentation
  Shimonoseki, Japan
- Year and Date
  2008-07-07
- Data Source
  KAKENHI-PROJECT-17560319
[Presentation] An Adaptive Spatial Error Concealment for H. 264/AVC Video stream2008
- Author(s)
  Jun WANG, Lei WANG, Takeshi IKENAGA, Satoshi GOTO
- Organizer
  SIGMAP2008
- Place of Presentation
  Porto, Portugal
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Power-saving 1Gbps Irregular LDPC Decoder based on High-effioiency Message Passing2008
- Author(s)
  Wenming TANG, Wen Jl, Xianghui WEI, Takeshi IKENAGA, Satoshi GOTO
- Organizer
  ITC-CSCC
- Place of Presentation
  Shimonoseki, Japan
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Motion Vector Difference Based Self-Incremental Adaptive Search Range Algorithm for Variable Block Size Motion Estimation2008
- Author(s)
  Zhenxing CHEN, Qin LIU, Takeshi IKENAGA, Satoshi GOTO
- Organizer
  ICIP2008
- Place of Presentation
  San Diego, U. S. A
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Block Type Decision Algorithm for H.264/AVC Intra Prediction Based on Entropy Feature2008
- Author(s)
  Guifen TIAN, Tianruo ZHANG, Takeshi IKENAGA, 後藤敏
- Organizer
  APCCAS2008
- Place of Presentation
  Macao, China
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] Optimized 2-D SAD Tree Architecture of Integer Motion Estimation for H.264/AVC2008
- Author(s)
  Yibo FAN, Takeshi IKENAGA, 後藤敏
- Organizer
  16th IFIP/IEEE international conference on very large scale integration VLSI-SoC 2008
- Place of Presentation
  Rhodes Island, Greece
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A High Quality Fast Motion Estimation Algorithm for H.264/AVC2008
- Author(s)
  Wenqi YOU, Yang SONG, Takeshi IKENAGA, 後藤敏
- Organizer
  CISP
- Place of Presentation
  Hainan, China
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] SAD Accumulation Termination Algorithm and Early Loop Termination Decision based High Quality Fast Motion Estimation for H. 264/AVC2008
- Author(s)
  Wenqi YOU, Yang SONG, Xianghui WEI, Takeshi IKENAGA, Satoshi GOTO
- Organizer
  The 21st Workshop on Circuits and Systems
- Place of Presentation
  Karuizawa, Japan
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] Rate Estimation of RD optimization for Intra mode decision of H. 264AVC2008
- Author(s)
  Yan ZHUANG, Takeshi IKENAGA, Satoshi GOTO
- Organizer
  CISP
- Place of Presentation
  Hainan, China
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] Exploration of schedule space by random walk2008
- Author(s)
  L. Ge, S. Chen, T. Yoshimura
- Organizer
  the 23rd International Technical Conference on Circuits/Systems, Computers and Communications
- Place of Presentation
  Shimonoseki, Japan
- Data Source
  KAKENHI-PROJECT-17560319
[Presentation] An Adaptive Spatial Error Concealment for H.264/AVC Video Stream2008
- Author(s)
  Jun WANG, Lei WANG, Takeshi IKENAGA, 後藤敏
- Organizer
  International Conference on Signal Processing and Multimedia Application (SIGMAP2008)
- Place of Presentation
  Porto, Portugal
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Frequency-Based Fast Block Type Decision Algorithm for intra Prediction in H.264/AVC High Profile2008
- Author(s)
  Tianruo ZHANG, Guifen TIAN, Takeshi IKENAGA, 後藤敏
- Organizer
  APCCAS2008
- Place of Presentation
  Macao, China
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A new implementation of multilevel framework for interoonnect-driven Foorplanning2008
- Author(s)
  Z. Xu, S. Chen, T. Yoshimura, Y. Fang
- Organizer
  the 23rd International Technical Conference on Circuits/Systems, Computers and Communications
- Place of Presentation
  Shimonoseki, Japan
- Data Source
  KAKENHI-PROJECT-17560319
[Presentation] A Low-cost Reconfigurable Architecture for AES Algorithm2008
- Author(s)
  Yibo FAN, Takeshi IKENAGA, 後藤敏
- Organizer
  ICICS 2008
- Place of Presentation
  Prague, Czech Republic
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] An Efficient Fast Mode Decision Algorithm for H.264/AVC Intra Prediction2008
- Author(s)
  Guifen TIAN, Tianruo ZHANG, Xianghui WEI, Takeshi IKENAGA, 後藤敏
- Organizer
  CISP
- Place of Presentation
  Hainan, China
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] RATE ESTIMATION IN RDO OF H. 264/AVG2008
- Author(s)
  Yan Zhuang, Takeshi Ikenaga, Satoshi Goto
- Organizer
  The 21st Workshop on Circuits and Systems
- Place of Presentation
  Karuizawa, Japan
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] FPGA & ASIC Implementation of Differential Power Analysis Attack on AES2008
- Author(s)
  Guoyu QIAN, Yibo Fan, Yukiyasu Tsunoo, Takeshi Ikenaga, 後藤敏
- Organizer
  Inscrypt 2008
- Place of Presentation
  China
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Multilevel Fixed-outline Floorplanning for Large-scale IC Design2008
- Author(s)
  Zheng Xu, Song Chen and Takeshi Yoshimura
- Organizer
  電子情報通信学会2008年総合大会
- Place of Presentation
  北九州学術研究都市
- Year and Date
  2008-03-18
- Data Source
  KAKENHI-PROJECT-17560319
[Presentation] High Throughput Partially-Parallel Irregular LDPC Decoder Based on Delta-Value Message-Passing Schedule2008
- Author(s)
  Wen JI, Xing LI, Takeshi IKENAGA, 後藤敏
- Organizer
  VLSI Design
- Place of Presentation
  Automation and Test, Hsinchu, Taiwan
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] Design of High Throughput Multi-rate Irregular LDPC Decoder based on Accelerated Message-Passing Schedule2008
- Author(s)
  Yuta ABE, Tang WENMING, Xing RI, Kazunori SHIMIZU, Takeshi IKENAGA, 後藤敏
- Organizer
  The 21st Workshop on Circuits and Systems in Karuizawa
- Place of Presentation
  Japan
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] (SEC) with More Accurate MB Type Decision in H.264/AVC2008
- Author(s)
  Jun WANG, Lei WANG, Takeshi IKENAGA, 後藤敏
- Organizer
  IET-VIE
- Place of Presentation
  Xian, China
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] Fast VBSME design using reconfigurable hardware architecture and search range reduction algorithm2008
- Author(s)
  Yibo FAN, Takeshi IKENAGA, 後藤敏
- Organizer
  SIP 2008
- Place of Presentation
  Kailua-Kona, Hawaii
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] Optimized 2-D SAD Tree Architecture of Integer Motion Estimation for H. 264/AVC2008
- Author(s)
  Yibo FAN, Takeshi IKENAGA, Satoshi GOTO
- Organizer
  VLSI-SoC 2008
- Place of Presentation
  Rhodes Island
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Block Type Decision Algorithm for H. 264/AVC Intra Prediction Based on Entropy Feature2008
- Author(s)
  Guifen TIAN, Tianruo ZHANG, Takeshi IKENAGA, Satoshi GOTO
- Organizer
  APCCAS2008
- Place of Presentation
  Macao, China
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Novel Fast Block Type Decision Algorithm for Intra Prediction in H.264/AVC High Profile2008
- Author(s)
  Tianruo ZHANG, Guifen TIAN, Takeshi IKENAGA, 後藤敏
- Organizer
  The 23rd International Technical Conference on Circuits/Systems, Computers and Communications
- Place of Presentation
  Shimonoseki, Japan
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Motion Vector Difference Based Self-Incremental Adaptive Search Range Algorithm for Variable Block Size Motion Estimation2008
- Author(s)
  Zhenxing CHEN, Qin LIU, Takeshi IKENAGA, 後藤敏
- Organizer
  ICIP2008
- Place of Presentation
  San Diego, U.S.
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Low Bandwidth Integer Motion Estimation Module for MPEG-2 to H. 264 Transcoding2008
- Author(s)
  Xianghui WEI. Wenming TANG, Guifen TIAN, Takeshi IKENAGA, Satoshi GOTO
- Organizer
  APCCAS2008
- Place of Presentation
  Macao, China
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] RATE ESTIMATION IN RDO OF H.264/AVC2008
- Author(s)
  Yan Zhuang, Takeshi Ikenaga, 後藤敏
- Organizer
  The 21st Workshop on Circuits and Systems in Karuizawa
- Place of Presentation
  Japan
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Novel Fast Block Type Decision Algorithm for Intra Prediction in H.264/AVC High Profile2008
- Author(s)
  Tianruo ZHANG, Guifen TIAN, Takeshi IKENAGA, 後藤敏
- Organizer
  The 21st Workshop on Circuits and Systems in Karuizawa
- Place of Presentation
  Japan
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] Lagrangian relaxation based inter-layer signal via assignment for 3-d ICs2008
- Author(s)
  S. Chen, Liangwei Ge, M. -F. Chiang, T. Yoshimura
- Organizer
  The 21st Workshop on Circuits and Systems in Karuizawa
- Place of Presentation
  Karuizawa, Japan
- Data Source
  KAKENHI-PROJECT-17560319
[Presentation] A Fast Block Type Decision Algorithm for H. 264/AVC Intra Prediction2008
- Author(s)
  Guifen Tian, Tianruo Zhang, Takeshi Ikenaga, Satoshi Goto
- Organizer
  電子情報通信学会通信ソサイエティ大会
- Place of Presentation
  Kanagawa, Japan
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Hardware/Software Co-solution to Aohieving High Throughput Required by Motion Estimation Part in H. 264/AVC HDTV Real-time Application2008
- Author(s)
  Zhenxing CHEN, Takeshi IKENAGA, Satoshi GOTO
- Organizer
  VLSI Design, Automation and Test
- Place of Presentation
  Hsinchu, Taiwan
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Novel Rate Control Algorithm for H.264/AVC2008
- Author(s)
  Zhao MIN, Takeshi IKENAGA, 後藤敏
- Organizer
  ITC-CSCC
- Place of Presentation
  Shimonoseki, Japan
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] Weighted Juniper insertion for antenna Fixing2008
- Author(s)
  M. -F. Chiang, T. Yoshimura
- Organizer
  The 21st Workshop on Circuits and Systems in Karuizawa
- Place of Presentation
  Karuizawa, Japan
- Data Source
  KAKENHI-PROJECT-17560319
[Presentation] Bandwidth Reduction Schemes for MPEG-2 to H.264 Transcoding Design2008
- Author(s)
  Xianghui WEI, Wenming TANG, Guifen TIAN, Yan ZHUANG, Takeshi IKENAGA, 後藤敏
- Organizer
  EUSIPCO 2008
- Place of Presentation
  Lausanne, Switzerland
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] High Throughput VLSI Architecture of a Fast Mode Decision Algorithm for H.264/AVC Intra Prediction2008
- Author(s)
  Tianruo ZHANG, Shen LI, Guifen TIAN, Takeshi IKENAGA, 後藤敏
- Organizer
  International Conference on Communications, Circuits and Systems
- Place of Presentation
  Xiamen, China
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Low-cost LSI design of AES against DPA attack by hiding power information2008
- Author(s)
  Yibo FAN, Takeshi IKENAGA, Yukiyasu TSUNOO, 後藤敏
- Organizer
  The 21th workshop on circuits and systems in Karuizawa
- Place of Presentation
  Japan
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Hardware/Software Co-solution to Achieving High Throughput Required by Motion Estimation Part in H.264/AVC HDTV Real-time Application2008
- Author(s)
  Zhenxing CHEN, Takeshi IKENAGA, 後藤敏
- Organizer
  VLSI Design
- Place of Presentation
  Automation and Test, Hsinchu, Taiwan
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] Efficiency-Complexity Curve Based method for Evaluating Adaptive Search Range Algorithms in Motion Estimation2008
- Author(s)
  Zhenxing CHEN, Takeshi IKENAGA, 後藤敏
- Organizer
  CISP
- Place of Presentation
  Hainan, China
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Low-cost LSI design of AES against DPA attack by hiding power information2008
- Author(s)
  Yibo FAN, Takeshi IKENAGA, Yukiyasu TSUNOO, Satoshi GOTO
- Organizer
  The 21th workshop on circuits and systems
- Place of Presentation
  Karuizawa, Japan
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Novel Fast Block Type Decision Algorithm for Intra Prediction in H. 264/AVC High Profile2008
- Author(s)
  Tianruo ZHANG, Guifen TIAN, Takeshi IKENAGA, Satoshi GOTO
- Organizer
  The 21st Workshop on Circuits and Systems
- Place of Presentation
  Karuizawa, Japan
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] VLSI Oriented Group-based Algorithm for Multiple Reference Fractional Motion Estimation in H.264/AVC2008
- Author(s)
  Wenqi YOU, Yao MA, Yang SONG, Yan ZHUANG, Takeshi IKENAGA, 後藤敏
- Organizer
  SIP2008
- Place of Presentation
  Hawaii, U.S.
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] SAD Accumulation Termination Algorithm and Early Loop Termination Decision based High Quality Fast Motion Estimation for H.264/AVC2008
- Author(s)
  Wenqi YOU, Yang SONG, Xianghui WEI, Takeshi IKENAGA, 後藤敏
- Organizer
  The 21st Workshop on Circuits and Systems in Karuizawa
- Place of Presentation
  Japan
- Data Source
  KAKENHI-PROJECT-20240004
[Presentation] A Stable Fixed-Outline Floorplanning Method2007
- Author(s)
  N.Song Chen and Takeshi Yoshimura
- Organizer
  Proc. of International Symposium on Physical Design (ISPD 2007)
- Data Source
  KAKENHI-PROJECT-17560319
[Presentation] On Objective Functons for Fixed-Outline Floorplanning2007
- Author(s)
  Lu Wang, Xiaolin Zhang, Song Chen and Takeshi Yoshimura
- Organizer
  電子情報通信学会2008年総合大会
- Place of Presentation
  北九州学術研究都市
- Year and Date
  2007-03-18
- Data Source
  KAKENHI-PROJECT-17560319
[Presentation] Post-Lavout Redundant-Via lnsertion for Yield Enhancement2007
- Author(s)
  Mei-Fang Chiang and Takeshi Yoshimura
- Organizer
  The 2nd International Ph.D.Student Workshop on SOC
- Place of Presentation
  台湾大学
- Year and Date
  2007-07-23
- Data Source
  KAKENHI-PROJECT-17560319
[Presentation] On the Number of 3-D IC Floorplan Configurations and a Solution Perturbation Method with Good Convergence2006
- Author(s)
  Song Chen and Takeshi Yoshimura
- Organizer
  Proc. of IEEE Asia Pacific Conference on Circuits and Systems at Singapore (Best Paper Award)
- Data Source
  KAKENHI-PROJECT-17560319
[Presentation] Port Assignment for Interconnect Reduction in High-Level Synthesis
- Author(s)
  Cong Hao, Song Chen, Takeshi Yoshimura
- Organizer
  2012 International Symposium on VLSI Design, Automation and Test (2012 VLSI-DAT)
- Place of Presentation
  台湾
- Data Source
  KAKENHI-PROJECT-23560417
[Presentation] "Tabu Search Based Multiple Voltage Scheduling under both Timing and Resource Constraints
- Author(s)
  Jianmo Ni, Nan Wiαng, Takeshi Yoshimura
- Organizer
  16th International Symposium on Quality Electronic Design(ISQED2015)
- Place of Presentation
  Santa Clara, CA, USA
- Year and Date
  2015-03-02 – 2015-03-04
- Data Source
  KAKENHI-PROJECT-26420323

1. GOTO Satoshi (10367170)

# of Collaborated Projects: 1 results

# of Collaborated Products: 80 results
2. SHINJI Kimura (20183303)

# of Collaborated Projects: 1 results

# of Collaborated Products: 2 results

TAKESHI Yoshimura 吉村 猛

YOSHIMURA Takeshi 吉村 猛

Research Projects

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Study of combinatorial and mathematical programming methods for high level synthesisPrincipal Investigator

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Floorplan-base Design Environment Technologies for Large-Scale System LSIsPrincipal Investigator

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Research on design and implementation of Ultra Large scale LSI

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Research on basic technologies for physical design of large scale system LSIPrincipal Investigator

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[Journal Article] An Efficient Multi-Level Algorithm for 3D-IC TSV Assignment2017

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[Journal Article] A Unified Scheduling Approach for Power and Resource Optimization with Multiple V-dd or/and V-th in High Level Synthesis2017

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[Journal Article] Interconnection Allocation Between Functional Units and Registers in High-Level Synthesis2017

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[Journal Article] Leakage-Power-Aware Scheduling With Dual-Threshold Voltage Design2016

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[Journal Article] Leakage-Power-Aware Scheduling with Dual-Threshold Voltage Design2016

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[Journal Article] Mobility Overlap-Removal-Based Leakage Power and Register-Aware Scheduling in High-Level Synthesis2014

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[Journal Article] Leakage Power Aware Scheduling in High-Level Synthesis2014

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[Journal Article] Resource-Aware Multi-Layer Floorplanning for Partially Reconfigurable FPGAs2013

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[Journal Article] Floorplanning and Topology Synthesis for Application-Specific Network-on-Chips2013

TAKESHI Yoshimura 吉村猛

YOSHIMURA Takeshi 吉村猛