Mattausch Hans Juergen Mattausch HansJ.

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MATTAUSCH HansJ. マタウシユハンスユルゲン

MATTAUSCH Hans Jurgen マタウシュハンスユルゲン

MATTAUSCH Hans j マタウシュハンスユルゲン

MATTAUSCH Hans J. マタウシユハンスユルゲン

MATTAUSH Hans Juregen MATTAUSH Hans Juregen

MATTAUSCH Hans Juergen マタウッシュハンスユルゲン

MATTAUSCH HansJuergen マタウッシュハンスユルゲン

J Mattausch H H・J Mattausch

MATTAUSCH Ha マタウシュハンスユルゲン

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Researcher Number	20291487
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Affiliation (based on the past Project Information) *help	2008 – 2015: Hiroshima University, ナノデバイス・バイオ融合科学研究所, 教授 2003 – 2007: 広島大学, ナノデバイス・システム研究センター, 教授 2001: Research Center for Nanodevices and Systems, HIROSHIMA UNIVERSITY, Professor, ナノデバイス研究センター, 教授 1998 – 2001: Hiroshima Univ., Res. Ctr. For Nanodevices and systems, Professor, ナノデバイス・システム研究センター, 教授 1997: 広島大学, ナノデバイス・システム研究センター, 助教授
Review Section/Research Field	Principal Investigator Electron device/Electronic equipment / 複合化集積システム / 電子デバイス・機器工学 Except Principal Investigator Communication/Network engineering / 電子デバイス・機器工学
Keywords	Principal Investigator 認識 / 連想メモリ / VLSI / パターンマッチング / 学習 / Learning / Recognition / CMOS technology / Manhattan distance / Hamming distance … More / Associative Memory / マンハタン距離 / 最小距離検索機能 / CMOS集積回路 / CMOS技術 / マンハッタン距離 / ハミング距離 / Electro-optical Integration / Hierarch. Architecture / Access Conflict / Copy Bus / Multiport Memory / Common Memory / 階層構造型マルチポートメモリ / メモリアクセス衝突 / 光電子集積回路 / コピーバス / マルチポートメモリ / 共有メモリ / 特徴抽出 / 電子デバイス・集積回路 / 集積回路 / 電子デバイス / タイムドメイン / リング波新規 / アナログ回路 / CMOS / VLSIブレイン / 判断 / 学習と発見 / 知能情報処理 / 知識システム … More Except Principal Investigator learning function / pattern matching / associative memory / recognition systems / three dimensional integration / inductor coupling / wireless interconnection / CMOSテクノロジー / 3次元磁界解析 / 回路設計 / FDTD法 / チップ間無線通信 / PWM信号 / MOSトランジスタモデル / 三次元集積技術 / オブジェクト認識 / ビジョンチップ / スパイラルインダクタ / 無線インタコネクション / 三次元集積システム / 物体認識 / 連想メモリベース画像処理 / マルチチップビジョン / 集積化インダクタ / 学習機能 / パターンマッチング処理 / 連想メモリ / 認識システム / 三次元集積 / インダクタ結合 / 無線インタコネクト / optical waveguide with no crack / grating coupler / mounting of LED / high pressure / surfactant / high speed / epitaxial lift-off / optical waveguide / サファイア基板 / 信号伝送 / 圧力 / エピタキシャルリフトオフ(ELO) / 溶液加熱 / 消泡剤 / AlAs剥離層膜厚依存性 / 発光素子層高速剥離 / 無欠陥光導波路 / グレーティングカプラ / 発光素子搭載技術 / 圧力印加 / 界面活性剤 / 高速化 / エピタキシャルリフトオフ法 / 光配線 / 非線形電流-電圧特性 / 選択エッチ / トレンチ形成 / 多結晶シリコンドット / 電子ビーム描画 / 作成要素技術開発 / 酸化膜障壁極微細トランジスタ / トンネル障壁 / 二重ゲート構造 / 極微細MOSトランジスタ / 単電子トランジスタ Less

Research on digital, high-speed, ultra-low power-consumption, Manhattan/Euclidean-distance-search associative memoryPrincipal Investigator
- Principal Investigator
  
  Mattausch Hans Juergen
- Project Period (FY)
  2013 – 2015
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  Electron device/Electronic equipment
- Research Institution
  Hiroshima University
Research on ring-oscillator-based, super-low-power, scalabletime-domain associative memoriesPrincipal Investigator
- Principal Investigator
  
  MATTAUSCH Hans Jurgen
- Project Period (FY)
  2010 – 2012
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  Electron device/Electronic equipment
- Research Institution
  Hiroshima University
Memory-based VLSI brain research for realizing recognition, learning and decision capabilityPrincipal Investigator
- Principal Investigator
  
  MATTAUSCH Hans j
- Project Period (FY)
  2007 – 2009
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  Electron device/Electronic equipment
- Research Institution
  Hiroshima University
A 3 Dimensional Integration Scheme Utilizing Wireless Interconnections for Implementing Hyper Brains
- Principal Investigator
  
  IWATA Atsushi
- Project Period (FY)
  2003 – 2007
- Research Category
  
  Grant-in-Aid for Scientific Research (S)
- Research Field
  
  Communication/Network engineering
- Research Institution
  Hiroshima University
Fast and small area associative memories with minimum distance search capabilityPrincipal Investigator
- Principal Investigator
  
  J Mattausch H
- Project Period (FY)
  2000 – 2001
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  複合化集積システム
- Research Institution
  HIROSHIMA UNIVERSITY
2重ゲート極微細MOSトランジスタによる単電子制御
- Principal Investigator
  
  横山新
- Project Period (FY)
  1998
- Research Category
  
  Grant-in-Aid for Scientific Research on Priority Areas (A)
- Research Institution
  Hiroshima University
2重ゲート極微細MOSトランジスタによる単電子制御
- Principal Investigator
  
  YOKOYAMA Shin
- Project Period (FY)
  1997
- Research Category
  
  Grant-in-Aid for Scientific Research on Priority Areas
- Research Institution
  Hiroshima University
super-high access-bandwidth common-memory architecture for elector-optical integrationPrincipal Investigator
- Principal Investigator
  
  MATTAUSCH Hans J.
- Project Period (FY)
  1997 – 1999
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  電子デバイス・機器工学
- Research Institution
  Hiroshima University
Study for Optoelectronic Integrated Circuits with Light Emitting Devices by Epitaxial Lift-off Technique
- Principal Investigator
  
  YOKOYAMA Shin
- Project Period (FY)
  1996 – 1998
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  電子デバイス・機器工学
- Research Institution
  HIROSHIMA UNIVERSITY

All 2016 2015 2014 2013 2012 2011 2010 2009 2008 2007 2006 2005 2004 Other

All Journal Article Presentation Patent

[Journal Article] Highly flexible nearest-neighbor-search associative memory with integrated KNN classifier, configurable parallelism and dual-Storage Space2016
- Author(s)
  F. An, K. Mihara, S. Yamasaki, L. Chen, and H.J. Mattausch
- Journal Title
  
  Jpn. J. Appl. Phys.
  
  Volume: 4S Issue: 4S Pages: 04EF10-04EF10
- DOI
  10.7567/jjap.55.04ef10
- Peer Reviewed / Acknowledgement Compliant
- Data Source
  KAKENHI-PROJECT-25420332
[Journal Article] k Nearest Neighbor Classification Coprocessor with Weighted Clock-Mapping-Based Searching2016
- Author(s)
  F. An, L. Chen, T. Akazawa, S. Yamasaki, and H.J. Mattausch
- Journal Title
  
  IEICE Trans. on Electronics
  
  Volume: 3 Pages: 397-403
- Peer Reviewed / Acknowledgement Compliant
- Data Source
  KAKENHI-PROJECT-25420332
[Journal Article] Reconfigurable VLSI implementation for learning vector quantization with on-chip learning circuit2016
- Author(s)
  X. Zhang, F. An, L. Chen, and H.J. Mattausch
- Journal Title
  
  Jpn. J. Appl. Phys.
  
  Volume: 4S Issue: 4S Pages: 04EF02-04EF02
- DOI
  10.7567/jjap.55.04ef02
- Peer Reviewed / Acknowledgement Compliant
- Data Source
  KAKENHI-PROJECT-25420332
[Journal Article] VLSI Realization of Learning Vector Quantization with HW/SW Co-design for Different Applications2015
- Author(s)
  F. An, T. Akazawa, S. Yamazaki, L. Chen, and H.J. Mattausch
- Journal Title
  
  Jpn. J. Appl. Phys.
  
  Volume: ４S Issue: 4S Pages: 04DE05-04DE05
- DOI
  10.7567/jjap.54.04de05
- Peer Reviewed / Acknowledgement Compliant
- Data Source
  KAKENHI-PROJECT-25420332
[Journal Article] Associative Memory Architecture for Word-Parallel Smallest Euclidean Distance Search Using Distance Mapping into Clock-Number Domain2014
- Author(s)
  T. Akazawa, S. Sasaki, and H.J. Mattausch
- Journal Title
  
  Jpn. J. Appl. Phys.
  
  Volume: ４S Issue: 4S Pages: 04EE16-04EE16
- DOI
  10.7567/jjap.53.04ee16
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-25420332
[Journal Article] Experimental Analysis of Within-Die Process Variation in 65 nm and 180 nm CMOS Technology Including its Distance Dependences2012
- Author(s)
  T. Ansari, W. Imafuku, M. Yasuda, H. J. Mattausch, and T. Koide
- Journal Title
  
  Jpn. J. Appl. Phys
  
  Volume: Vol. 51, No. 4
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22560331
[Journal Article] Associative Memory for Nearest-Hamming Distance Search Based on Frequency Mapping2012
- Author(s)
  H.J. Mattausch
- Journal Title
  
  IEEE Journal of Solid-State Circuits
  
  Volume: 47 Pages: 1448-1459
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22560331
[Journal Article] Associative Memory for Nearest-Hamming Distance Search Based on Frequency Mapping2012
- Author(s)
  H.J. Mattausch, W. Imafuku, A. Kawabata, T. Ansari, M. Yasuda and T. Koide
- Journal Title
  
  IEEE Journal of Solid-State Circuits
  
  Volume: Vol. 47, No. 6 Pages: 1448-1459
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22560331
[Journal Article] High Speed Frequency -MappingBased Associative Memory using Compact MultiBit Encoders and a Path-Selecting Scheme2012
- Author(s)
  S. Sasaki, M. Yasuda, A. Kawabata, T. Koide, and H.J. Mattausch
- Journal Title
  
  Jpn. J. Appl. Phys
  
  Volume: Vol. 51, No. 4
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22560331
[Journal Article] Associative Memory for Nearest-Hamming Distance Search Based on Frequency Mapping2012
- Author(s)
  H.J.Mattausch
- Journal Title
  
  IEEE Journal of Solid-state Circuits
  
  Volume: 47(in press)
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22560331
[Journal Article] Analysis of Within-Die CMOS-Process Variation withReconfigurable Ring-Oscillator Arrays using HiSIM Model2011
- Author(s)
  T. Ansari, W. Imafuku, A. Kawabata, M. Yasuda, T. Koide, and H. J. Mattausch
- Journal Title
  
  Jpn. J. Appl. Phys
  
  Volume: Vol. 50, No. 4
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-22560331
[Journal Article] Low-Power Silicon-Area-Efficient Image Segmentation Based on a Pixel-Block Scanning Architecture2009
- Author(s)
  K. Okazaki, K. Awane, N. Nagaoka, T. Sugahara, T. Koide, H.J. Mattausch
- Journal Title
  
  Jpn. J. Appl. Phys Vol.48,No.4
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-19360163
[Journal Article] Scalable FPGA/ASIC Implementation Architecture for Parallel Table-lookup Coding Using Multi-ported Content Addressable Memory2007
- Author(s)
  T., Kumaki, Y., Kono, M., Ishizaki, T., Koide, H.J., Mattausch
- Journal Title
  
  IEICE Trans. on Information & Systems Vol. E90-D90, No. 1
  
  Pages: 346-354
- NAID
  110007519474
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] 4-port unified data/instruction cache design with distributed crossbar and interleaved cache-line words2007
- Author(s)
  K. Johguchi
- Journal Title
  
  IEICE Transactions on Electronics Vol.E90-C
  
  Pages: 2157-2160
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] Acceleration of DCT Processing with Massive-Parallel Memory-Embedded STME Matrix Prnrecsnr2007
- Author(s)
  T., Kumaki, K., Ishiraki T., Koide, H.J., Mattausch, Y., Kuroda, H., Noda, K., Dosaka, K., Arimoto, K., Saito
- Journal Title
  
  IEICE Trans. on Information & Systems Vol. E90-D
  
  Pages: 1312-1315
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] Analysis of Technology Variations in Advanced MOSFTs with the Surface-Potencial-Based Compact Model HiSIM2007
- Author(s)
  M. Miura-Mattausch
- Journal Title
  
  ECS Trasactions Vol.11,No.6
  
  Pages: 29-44
- Description
  「研究成果報告書概要(和文)」より
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] Suface-Potential-Based Metal-Oxide Silicon-Varactor Model for RF Applications2007
- Author(s)
  M., Miyake, N., Sadachika, D., Navarro, Y., Mizukane, K., Matsumoto, T., Ezaki, M., Miura-Mattausch, et. al.
- Journal Title
  
  Japanese Journal of Applied Physics Vol. 46, No. 4
  
  Pages: 2091-2095
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] Realization of K-Nearest-Matches Search Capability in Fully-Parallel Associative Memories2007
- Author(s)
  M.A. Abedin, Y. Tanaka, A. Ahmadi, S. Sakakibara, T. Koide, H.J. Mattausch
- Journal Title
  
  IEICE Trans. on Fundamentals vol.E90-A,No.6
  
  Pages: 1240-1243
- NAID
  110007519195
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-19360163
[Journal Article] Mixed Digital-Analog Associative Memory Enabling Fully-Parallel Nearest Euclidean Distance Search2007
- Author(s)
  M.A., Abedin, Y., Tanaka, A., Ahmadi, T., Koide, H.J., Mattausch
- Journal Title
  
  Japanese Journal of Applied Physics (JJAP) Vol. 46, No. 4
  
  Pages: 2231-2237
- NAID
  210000062355
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] 4-port unified data/instruction cache design with distributed crossbar and interleaved cache-line words2007
- Author(s)
  K. Johguchi
- Journal Title
  
  IEICE Trans. on Electronics Vol.E90-C
  
  Pages: 2157-2160
- Description
  「研究成果報告書概要(和文)」より
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] Realization of K-Nearest-Matches Search Capability in Fully-Parallel Associative Memories2007
- Author(s)
  M.A., Abedin, Y., Tanaka, A., Ahmadi, S., Sakakibara, T., Koide, H.J., Mattausch
- Journal Title
  
  IEICE Trans. on Fundamentals Vol. E90-A, No. 5
  
  Pages: 1240-1243
- NAID
  110007519195
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] Analysis of Technology Variations in Advanced MOSETs with the Surface-Potential-Based Compact Model HiSDII2007
- Author(s)
  K., Miura-Mattausch, N., Sadachika, K., Miyake, A., Yumisaki, H.J., Mattausch
- Journal Title
  
  ECS Transactions Vol. 11, No. 6
  
  Pages: 29-44
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] Real-Time Huffman Encoder with Pipelined CAM-Based Data Path and Code-Word-Table Ontimizer2007
- Author(s)
  T., Kumaki, Y., Kuroda, M., Ishizaki, T., Koide, H.J., Mattausch, H., Noda, K., Dosaka, K., Arimoto, K., Saito
- Journal Title
  
  IEICE Trans. on Information & Systems Vol. E90-D, No. 1
  
  Pages: 334-345
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] 4-port unified data/instruction cache design with distributed crossbar and interleaved cache-line words2007
- Author(s)
  K., Johguchi, H.J., Mattausch, T., Koide, T.,Hironaka
- Journal Title
  
  IEICE Transactions on Electronics Vol. E90-C
  
  Pages: 2157-2160
- NAID
  110007538855
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] HiSIM2 : Advanced MOSFET Model Valid for RF Circuit Simulation2006
- Author(s)
  M.Miura-Mattausch
- Journal Title
  
  IEEE Transactions On Electron Devices Vol.53,No.9
  
  Pages: 1994-2007
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] A carrier-Times-Delay-Based Nonquasi-Static MOSFET Model for Circuit Simulation and Its Application Harmonic Distortion Analysis2006
- Author(s)
  D., Navarro, Y., Takeda, M., Miyake, N., Nakayama, K., Machida, T., Ezaki, H.J., Mattausch, K., Miura-Mattausch
- Journal Title
  
  IEEE Trans. on ELECTRON DEVICES Vol. 53, No. 9
  
  Pages: 2025-2034
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] HiSIM2 : Advanced MOSFET Model Valid for RF Circuit Simulation2006
- Author(s)
  M., Miura-Mattausch, N., Sadachika, D., Navarro, G., Suzuki, Y., Takeda, M., Miyake, T., Warabino, Y., Mizukane, R., Inagaki, T., Ezaki, H.J., Mattausch, et. al.
- Journal Title
  
  IEEE Trans. on ELECTRON DEVICES Vol. 53, No. 9
  
  Pages: 1994-2007
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] HiSIM2CIRUIT SIMULATION2006
- Author(s)
  H.J., Mattausch, K., Miyake, T., Yoshida. S., Hazama, D., Navarro, N., Sadachika, T., Ezaki, M., Miura-Mattausch
- Journal Title
  
  IEEE Circuits & Devices Magazine Vol. 22, No. 5
  
  Pages: 29-38
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] A Reliability-Enhanced TCAM Architecture with Associated Embedded DRAM and ECC2006
- Author(s)
  H. Noda, K., Dosaka, H.J., Mattausch, T., Koide, F., Morishita, K., Arimoto
- Journal Title
  
  IEICE Trans. on Electronics Vol. E89-C
  
  Pages: 1612-1619
- NAID
  110007538699
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] HiSIM2 CIRUIT SIMULATION2006
- Author(s)
  H. J. Mattausch
- Journal Title
  
  IEEE Circuits & Devices Magazin Vol.22,No.5
  
  Pages: 29-38
- Description
  「研究成果報告書概要(和文)」より
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] HiSIM2 CIRCUIT SIMULATION2006
- Author(s)
  M.Miura-Mattausch
- Journal Title
  
  IEEE Circuits ＆ Devices Magazine Vol.22,No.5
  
  Pages: 29-38
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] HiSIM2: Advanced MOSFET Model Valid for RF Circuit Simulation2006
- Author(s)
  M. Miura-Mattausch
- Journal Title
  
  IEEE Trans. on ELECTRON DEVICES Vol.53,No.9
  
  Pages: 1994-2007
- Description
  「研究成果報告書概要(和文)」より
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] MOSFET modeling beyond 100nm technology : Challenges and perspectives2005
- Author(s)
  M.Miura-Mattausch
- Journal Title
  
  SISPADIEEE 2005 CAT.No.05TH8826
  
  Pages: 1-6
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] MOSFET modeling beyond 100nm technology: Challenges and perspectives2005
- Author(s)
  M. Miura-Mattaush
- Journal Title
  
  IEEE SISPAD 2005 CAT.No.05TH8826
  
  Pages: 1-6
- Description
  「研究成果報告書概要(和文)」より
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] RF-MOSFET model-parameter Extraction with HiSIM2005
- Author(s)
  M.Miura-Mattausch
- Journal Title
  
  Modeling and Simulation of Microsystems 2005 Nanotech2005
  
  Pages: 69-74
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] Non-quasi-static analysis with HiSIM,a complete surface-ootencial-based MOSFET model2005
- Author(s)
  T., Ezaki, Navarro, Y., Takeda, N., Sadachika, G., Suzuki, M., Miura-Matta usch, H.J., Mattausch
- Journal Title
  
  MIXDES 2005 83-919289-9-3
  
  Pages: 923-928
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] A Cost-Efficient High-Performance Dynamic TCAM with Pipelined Hierarchical Searching and Shift2005
- Author(s)
  H., Noda, K., Inoue, M., Kuroiwa, F., Igaue, K., Yamamoto, H.J., Mattausch, T., Koide, et. al.
- Journal Title
  
  IEEE J. of Solid-State Circuits Vol. 40
  
  Pages: 245-253
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] Substrate Integrity Beyond 1GHz2005
- Author(s)
  M.Nagata, M.Fukazawa, N.Hamanishi, M.Shiochi, T.Iida, J.Watanabe, Y.Murasaka, A.Iwata
- Journal Title
  
  IEEE International Solid-State Circuits Conference Digest of Technical Papers TP14.6
  
  Pages: 266-267
- NAID
  110003318314
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] A compact model of the pinch-off region of 100nm MOSFETs based on the surface-potential2005
- Author(s)
  D., Navarro, T., Mizoguchi, K., Suetake, K., Hisamitsu, H., Ueno, M., Miura-Mattausch, H.J., Mattausch, S., Ktunashiro, T., Ysmaguchi, K., Yamashita N., Nakayama
- Journal Title
  
  IEICE Transactions on Electronics Vol. E88-C, NO. 5
  
  Pages: 1079-1086
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] Embedded Low-Power Dynamic TCAM Architecture with Transparently Scheduled Refresh2005
- Author(s)
  H., Noda, K., Inoue, H.J., Mattausch, T., Koide, et. al.
- Journal Title
  
  IEICE Trans. on Electronics Vol. E88-C
  
  Pages: 622-629
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] MOSFET Model HiSIM Based on Surface-Potential Description for Enabling Accurate RF-CMOS Design2004
- Author(s)
  M. Miura-Mattausch
- Journal Title
  
  Journal of Semiconductor Technology and Science Vol.4,No.3
  
  Pages: 133-140
- Description
  「研究成果報告書概要(和文)」より
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] MOSFET Model HiSIM Based on Surface-Potential Description for Enabling Accurate RF-CMOS Design2004
- Author(s)
  M.Miura-Mattausch, H.J.Mattausch, T.Iizuka, M.Taguchi, S.Kumashiro, S.Miyamoto
- Journal Title
  
  Journal of Semiconductor Technology and Science 4-3
  
  Pages: 133-140
- Data Source
  KAKENHI-PROJECT-15106007
[Journal Article] MOSFET Model HiSIM Based on Surface-Potential Description for Enabling Accurate RF-CMOS Design2004
- Author(s)
  M., Miura-Mattausch, H.J., Mattausch, T., Iizuka, K., Taguchi, S., Kumashiro, S., Miyamoto
- Journal Title
  
  Journal of Semiconductor Technology and Science Vol. 4, No. 3
  
  Pages: 133-140
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Patent] ｋ近傍法カウンターベース連想メモリ2015
- Inventor(s)
  H. J. Mattausch, 山崎翔悟
- Industrial Property Rights Holder
  広島大学
- Industrial Property Rights Type
  特許
- Industrial Property Number
  2015-016977
- Filing Date
  2015-01-30
- Data Source
  KAKENHI-PROJECT-25420332
[Patent] 再構成可能なｋ近傍法連想メモリ2015
- Inventor(s)
  H. J. Mattausch, 山崎翔悟
- Industrial Property Rights Holder
  広島大学
- Industrial Property Rights Type
  特許
- Industrial Property Number
  2015-034716
- Filing Date
  2015-02-25
- Data Source
  KAKENHI-PROJECT-25420332
[Patent] LVQニューラルネットワーク2015
- Inventor(s)
  H. J. Mattausch, L. Chen, F. An,
- Industrial Property Rights Holder
  広島大学
- Industrial Property Rights Type
  特許
- Industrial Property Number
  2015-034063
- Filing Date
  2015-02-20
- Data Source
  KAKENHI-PROJECT-25420332
[Patent] 再構成可能な連想メモリ2014
- Inventor(s)
  H. J. Mattausch, 赤澤智信
- Industrial Property Rights Holder
  広島大学
- Industrial Property Rights Type
  特許
- Industrial Property Number
  2014-036698
- Filing Date
  2014-02-27
- Data Source
  KAKENHI-PROJECT-25420332
[Patent] 柔軟パターン次元の連想メモリ2014
- Inventor(s)
  H. J. Mattausch, 赤澤智信, 山崎翔悟
- Industrial Property Rights Holder
  広島大学
- Industrial Property Rights Type
  特許
- Industrial Property Number
  2014-022398
- Filing Date
  2014-02-07
- Data Source
  KAKENHI-PROJECT-25420332
[Patent] ユークリッド距離連想メモリ2013
- Inventor(s)
  H.J. Mattausch,他
- Industrial Property Rights Holder
  広島大学
- Filing Date
  2013-02-13
- Data Source
  KAKENHI-PROJECT-22560331
[Patent] ユークリッド距離連想メモリ2013
- Inventor(s)
  H.J. Mattausch
- Industrial Property Rights Holder
  広島大学
- Industrial Property Rights Type
  特許
- Filing Date
  2013-02-13
- Data Source
  KAKENHI-PROJECT-22560331
[Patent] k近傍アルゴリズム連想メモリ2013
- Inventor(s)
  H. J. Mattausch, 赤澤智信, 山崎翔悟
- Industrial Property Rights Holder
  広島大学
- Industrial Property Rights Type
  特許
- Industrial Property Number
  2013-154887
- Filing Date
  2013-07-25
- Data Source
  KAKENHI-PROJECT-25420332
[Patent] マンハッタン距離連想メモリ2012
- Inventor(s)
  H.J. Mattausch
- Industrial Property Rights Holder
  広島大学
- Industrial Property Rights Type
  特許
- Filing Date
  2012-08-23
- Data Source
  KAKENHI-PROJECT-22560331
[Patent] マンハッタン距離連想メモリ2012
- Inventor(s)
  H.J. Mattausch,他
- Industrial Property Rights Holder
  広島大学
- Filing Date
  2012-08-23
- Data Source
  KAKENHI-PROJECT-22560331
[Patent] 連想メモリ2011
- Inventor(s)
  H.J. Mattausch,他
- Industrial Property Rights Holder
  広島大学
- Filing Date
  2011-07-07
- Data Source
  KAKENHI-PROJECT-22560331
[Patent] 連想メモリ2011
- Inventor(s)
  H.J.Mattausch
- Industrial Property Rights Holder
  広島大学
- Filing Date
  2011-07-07
- Data Source
  KAKENHI-PROJECT-22560331
[Patent] 連想メモリおよびそれを用いた検索システム2009
- Inventor(s)
  T.Koide, H.J.Mattausch, 他
- Industrial Property Rights Holder
  広島大学
- Acquisition Date
  2009-08-12
- Data Source
  KAKENHI-PROJECT-19360163
[Patent] 連想メモリ2009
- Inventor(s)
  H. J. Mattausch
- Industrial Property Rights Holder
  広島大学
- Filing Date
  2009-10-01
- Data Source
  KAKENHI-PROJECT-19360163
[Patent] 連想メモリ2009
- Inventor(s)
  H.J.Mattausch, T.Koide, 他
- Industrial Property Rights Holder
  広島大学
- Filing Date
  2009-10-01
- Data Source
  KAKENHI-PROJECT-19360163
[Patent] 増幅回路および連想メモリ2008
- Inventor(s)
  H.J. Mattausch
- Industrial Property Rights Holder
  広島大学学長
- Filing Date
  2008-02-25
- Overseas
- Data Source
  KAKENHI-PROJECT-19360163
[Patent] オフセット除去回路、それを備えた連想メモリおよびオフセット電圧の除去方法2008
- Inventor(s)
  H.J.Mattausch
- Industrial Property Rights Holder
  広島大学
- Filing Date
  2008-07-31
- Data Source
  KAKENHI-PROJECT-19360163
[Patent] 増幅回路および連想メモリ2008
- Inventor(s)
  マタウシュ, ハンスエルゲン, 小出哲士, 田中裕己, アベディンモハマドアノワルル
- Industrial Property Rights Holder
  広島大学
- Industrial Property Number
  2007-046555
- Filing Date
  2008-02-22
- Overseas
- Data Source
  KAKENHI-PROJECT-15106007
[Patent] 増幅回路および連想メモリ2008
- Inventor(s)
  マタウシュハンスユルゲン
- Industrial Property Rights Holder
  広島大学
- Industrial Property Number
  2007-046555
- Filing Date
  2008-02-22
- Description
  「研究成果報告書概要(和文)」より
- Overseas
- Data Source
  KAKENHI-PROJECT-15106007
[Patent] 増幅回路および連想メモリ2007
- Inventor(s)
  マタウシュハンスユルゲン
- Industrial Property Rights Holder
  広島大学
- Industrial Property Number
  2007-046555
- Filing Date
  2007-02-27
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Presentation] Dynamically Reconfigurable System for LVQ-Based On-chip Learning and Recognition2016
- Author(s)
  F. An, X. Zhang, L. Chen, and H.J. Mattausch
- Organizer
  IEEE Int. Symposium on Circuits and Systems (ISCAS’16)
- Place of Presentation
  Montreal, Canada
- Year and Date
  2016-05-24
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-25420332
[Presentation] Memory-based LVQ Neural Network with Dedicated Learning Circuit2015
- Author(s)
  X. Zhang, F. An, L. Chen, and H.J. Mattausch
- Organizer
  2015 International Conference on Solid State Devices and Materials (SSDM’2015)
- Place of Presentation
  Sapporo, Japan
- Year and Date
  2015-09-29
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-25420332
[Presentation] Associative Memory for Nearest Neighbor Search with High Flexibility of Reference-Vector Number Due to Configurable Dual-Storage Space2015
- Author(s)
  F. An, K. Mihara, S. Yamasaki, L. Chen, and H.J. Mattausch
- Organizer
  2015 International Conference on Solid State Devices and Materials (SSDM’2015)
- Place of Presentation
  Sapporo, Japan
- Year and Date
  2015-09-29
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-25420332
[Presentation] Word-parallel Associative Memory for k-Nearest-Neighbor with Configurable Storage Space of Reference Vectors2015
- Author(s)
  F. An, K. Mihara, S. Yamazaki, L. Chen, and H.J. Mattausch
- Organizer
  IEEE Asian Solid-State Circuits Conference (ASSCC‘2015)
- Place of Presentation
  Xiamen, China
- Year and Date
  2015-11-10
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-25420332
[Presentation] k近傍法に基づいた高速・低消費電力かつエラーフリーな学習・認識SoCの開発2014
- Author(s)
  山崎翔悟，赤澤智信，安　豊偉，マタウシュハンスユルゲン
- Organizer
  集積回路研究会（ICD）
- Place of Presentation
  京都
- Data Source
  KAKENHI-PROJECT-25420332
[Presentation] ユークリッド距離に基づくデジタル並列型最小距離検索連想メモリの開発2014
- Author(s)
  赤澤智信，マタウシュ・ハンスユルゲン
- Organizer
  集積回路研究会（ICD）
- Place of Presentation
  京都
- Data Source
  KAKENHI-PROJECT-25420332
[Presentation] ユークリッド距離検索連想プロセッサとそのデータ容量柔軟性の向上2014
- Author(s)
  赤澤智信，マタウシュ・ハンスユルゲン
- Organizer
  集積回路研究会（ICD）
- Place of Presentation
  名古屋
- Data Source
  KAKENHI-PROJECT-25420332
[Presentation] 高速・低消費電力かつエラーフリーなデジタル並列型ユークリッド距離検索連想メモリの開発2013
- Author(s)
  赤澤智信，佐々木静龍，マタウシュ・ハンスユルゲン
- Organizer
  LSIとシステムのワークショップ2013
- Place of Presentation
  北九州市
- Data Source
  KAKENHI-PROJECT-25420332
[Presentation] Word-Parallel Coprocessor Architecture for Digital Nearest Euclidean Distance Search2013
- Author(s)
  T. Akazawa, S. Sasaki, and H.J. Mattausch
- Organizer
  39th European Solid-State Circuits Conference (ESSCIRC‘2013)
- Place of Presentation
  Bucharest, Romania
- Data Source
  KAKENHI-PROJECT-25420332
[Presentation] Digital Word-Parallel Associative Memory in 180nm CMOS for Nearest Euclidean Distance Search Based on Distance Mapping into Clock-Number Domain2013
- Author(s)
  T. Akazawa, S. Sasaki, and H.J. Mattausch
- Organizer
  2013 International Conference on Solid State Devices and Materials (SSDM’2013)
- Place of Presentation
  Fukuoka, Japan
- Data Source
  KAKENHI-PROJECT-25420332
[Presentation] モバイル機器のため小面積かつ低消費電力なリアルタイム k近傍法認識システムの設計2013
- Author(s)
  山崎翔悟，マタウシュ・ハンスユルゲン
- Organizer
  15th IEEE HISS
- Place of Presentation
  鳥取市
- Data Source
  KAKENHI-PROJECT-25420332
[Presentation] デジタル並列型ユークリッド距離検索連想メモリの開発2013
- Author(s)
  赤澤智信，マタウシュ・ハンスユルゲン
- Organizer
  15th IEEE HISS
- Place of Presentation
  鳥取市
- Data Source
  KAKENHI-PROJECT-25420332
[Presentation] Digital Associative Memory for Word-Parallel Manhattan-Distance-Based Vector Quantization2012
- Author(s)
  S. Sasaki, M. Yasuda, and H.J. Mattausch
- Organizer
  Proceedings of the 38thEuropean Solid-State Circuits Conference (ESSCIRC,2012)
- Place of Presentation
  Bordeaux, France
- Year and Date
  2012-09-22
- Data Source
  KAKENHI-PROJECT-22560331
[Presentation] A 381 fs/bit, 51.7 nW/bit Nearest Hamming-Distance Search Circuit in 65 nm CMOS2011
- Author(s)
  H.J. Mattausch, M. Yasuda, A. Kawabata, W. Imafuku, and T. Koide
- Organizer
  2011 Symposium on VLSI Circuits Digest of Technical Papers (VLSI 2011)
- Place of Presentation
  Kyoto, Japan
- Year and Date
  2011-06-17
- Data Source
  KAKENHI-PROJECT-22560331
[Presentation] A 381 fs/bit, 51.7 nW/bit Nearest Hamming-Distance Search Circuit in 65 nm CMOS2011
- Author(s)
  H.J.Mattausch
- Organizer
  2011 Symposium on VLSI Circuits
- Place of Presentation
  京都市
- Year and Date
  2011-06-17
- Data Source
  KAKENHI-PROJECT-22560331
[Presentation] Compact Multi-Bit Encoder for High Speed Frequency-Mapping Associative Memory2011
- Author(s)
  S. Sasaki, M. Yasuda, A. Kawabata, T. Koide, and H.J. Mattausch
- Organizer
  Extended Abstracts of the 2011 International Conference on Solid State Devices and Materials (SSDM'2011)
- Place of Presentation
  Nagoya, Japan
- Year and Date
  2011-09-30
- Data Source
  KAKENHI-PROJECT-22560331
[Presentation] Low-Power Word-Parallel Nearest-Hamming-Distance Search Circuit based on Frequency Mapping2010
- Author(s)
  H.J.Mattausch
- Organizer
  36th European Solid-State Circuits Conference (ESSCIRC'2010)
- Place of Presentation
  Seville,スペイン
- Year and Date
  2010-09-16
- Data Source
  KAKENHI-PROJECT-22560331
[Presentation] Low-Complexity Time-Domain Winner-Take-All Circuit with High Time-Difference Resolution Limited only by With-In-Die Variation2010
- Author(s)
  M. Yasuda, T. Ansari, W. Imafuku, A. Kawabata, T. Koide, and H.J. Mattausch
- Organizer
  Extended Abstracts of the 2010 International Conference on Solid State Devices and Materials (SSDM'2010)
- Place of Presentation
  Tokyo, Japan
- Year and Date
  2010-09-24
- Data Source
  KAKENHI-PROJECT-22560331
[Presentation] Low-Power Word- Parallel Nearest-Hamming-Distance Search Circuit based on Frequency Mapping2010
- Author(s)
  H.J. Mattausch, W. Imafuku, T. Ansari, A. Kawabata, and T. Koide
- Organizer
  Proceedings of the 36thEuropean Solid-State Circuits Conference (ESSCIRC,2010)
- Place of Presentation
  Seville, Spain
- Year and Date
  2010-09-16
- Data Source
  KAKENHI-PROJECT-22560331
[Presentation] VLSI Design of a Handwritten-Character Learning and Recognition system based on Associative Memory2009
- Author(s)
  S. Sakakibara, W. Imafuku, A. Kawabata, T. Ansari, H.J. Mattausch, T. Koide
- Organizer
  15th Workshop on Synthesis and System Integration of Mixed Information Technologies (SASIMI'2009)
- Place of Presentation
  Okinawa, Japan
- Year and Date
  2009-03-09
- Data Source
  KAKENHI-PROJECT-19360163
[Presentation] VLSI-Architecture for Enabling Multiple Parallel Associative Searches with Standard SRAM Macros2009
- Author(s)
  T. Kumaki, Y. Imai, T. Koide, H.J. Mattausch
- Organizer
  Proceedings of International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS'2009)
- Place of Presentation
  Kanazawa, Japan
- Year and Date
  2009-12-07
- Data Source
  KAKENHI-PROJECT-19360163
[Presentation] Associative- Memory-Based Prototype LSI with Recognition and On-line Learning Capability and its Application to Handwritten Characters2009
- Author(s)
  W. Imafuku, S. Sakakibara, A. Kawabata, T. Ansari, H.J. Mattausch, T. Koide
- Organizer
  Proceedings of International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS'2009)
- Place of Presentation
  Kanazawa, Japan
- Year and Date
  2009-12-09
- Data Source
  KAKENHI-PROJECT-19360163
[Presentation] Grouping Method based on Feature Matching for Tracking and Recognition of Complex Objects2009
- Author(s)
  N. Nagaoka, K. Okazaki, T. Sugahara, T. Koide, H.J. Mattausch
- Organizer
  Proceedings of International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS'2008)
- Place of Presentation
  Bangkok, , Thailand
- Year and Date
  2009-02-09
- Data Source
  KAKENHI-PROJECT-19360163
[Presentation] Developing a Reliable Learning Model for Cognitive Classification Tasks Using an Associative Memory2007
- Author(s)
  Ahmadi, H.J. Mattausch, M.A. Abedin, T. Koide, Y. Shirakawa, M.A. Ritonga
- Organizer
  Proceedings of the 2007 IEEE Symposium on Computational Intelligence in Image and Signal Processing (CIISP'2007)
- Place of Presentation
  Honolulu, USA
- Year and Date
  2007-04-03
- Data Source
  KAKENHI-PROJECT-19360163
[Presentation] Performance evaluation of region-growing image segmentation using two-dimensional image-block scanning2007
- Author(s)
  K., Okazaki, K., Awane, K., Yamaoka, T., Koide, H.J., Mattausch
- Organizer
  14th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI2007)
- Place of Presentation
  Hokkaido
- Year and Date
  2007-10-15
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Presentation] Developing a Reliable Learning Model for Cognitive Classification Tasks Using an Associative Memory2007
- Author(s)
  H. J. Mattausch
- Organizer
  2007 IEEE Symposium on Computational Intelligence in Image and Signal Processing (CIISP'2007)
- Place of Presentation
  Honolulu, USA
- Year and Date
  2007-04-03
- Data Source
  KAKENHI-PROJECT-19360163
[Presentation] HiSIM231 : Toward Solving the Speed versus Accuracy Crisis in Circuit Simulation2007
- Author(s)
  H.J., Mattausch, N., Sadachika, M., Miyake, D., Navarro, T., Warabino, K., Matsumoto, T., Ezaki, M., Miura-Mattausch, et. al.
- Organizer
  The 4th International Workshop on Compact Modeling
- Place of Presentation
  Yokohama
- Year and Date
  2007-01-23
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Presentation] A 0.6-Tbps, 16-port SRAM design with 2-stage-pipeline and multi-stage-sensing scheme2007
- Author(s)
  K., Johguchi, Y., Mukuda, K., Aoyama, H.J., Mattausch, T., Koide
- Organizer
  Proceedings of the 33rd European Solid-State Circuits Conference
- Place of Presentation
  Jarmany
- Year and Date
  2007-09-11
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Presentation] A fast differential-amplifier-based winner-search circuit for fully parallel associative memories2007
- Author(s)
  Y., Tanaka, M.A., Abedin, S., Sakakibara, T., Koide, H.J., Mattausch
- Organizer
  14th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI2007)
- Place of Presentation
  Hokkaido
- Year and Date
  2007-10-15
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Presentation] Associative memory design realizing reference-pattern recognition and learning based on short/long-term storage concept2007
- Author(s)
  S., Sakakibara, M.A., Abedin, Y., Tanaka, A., Ahmadi, H.J., Mattausch, T., Koide
- Organizer
  14th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI2007)
- Place of Presentation
  Hokkaido
- Year and Date
  2007-10-15
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Presentation] A 0.6-Tbps, 16-port SRAM design with 2-stage-pipeline and multi-stage-sensing scheme2007
- Author(s)
  K. Johguchi
- Organizer
  Proceedings of the 33rd European Solid-State Circuits Conference
- Place of Presentation
  ミュンヘン、ドイツ
- Year and Date
  2007-09-11
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Presentation] Hardware realization of two-stage pattern matching system using fully-parallel associative memories2007
- Author(s)
  M.A., Abedin, A., Ahmadi, Y., Tanaka, S., Sakakibara, T., Koide, H.J., Mattausch
- Organizer
  14th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI2007)
- Place of Presentation
  Hokkaido
- Year and Date
  2007-10-15
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Presentation] An effective parallel coding architecture utilizing characteristics of multimedia applicantion2007
- Author(s)
  T., Kumaki, M., Ishizaki, Tagami, T., Koide, H.J., Mattausch
- Organizer
  14th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI2007)
- Place of Presentation
  Hokkaido
- Year and Date
  2007-10-15
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Presentation] Acceleration of Advanced Encryption Standard (AES) processing on a CAM enhanced super parallel SIMD processor2007
- Author(s)
  M., Tagami, M., Ishizaki, T., Kumaki, Y., Kano, T., Koide, H.J., Mattausch, T., Gyohten, H., Noda, K., Dosaka, Arimoto, K., Saito
- Organizer
  14th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI2007)
- Place of Presentation
  Hokkaido
- Year and Date
  2007-10-15
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Presentation] Static-noise-margin analysis of major SRAM-cell types including production variations for a 90nm CMOS process2007
- Author(s)
  S., Izumi, K., Johguchi, H.J., Mattausch, T., Koide
- Organizer
  14th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI2007)
- Place of Presentation
  Hokkaido
- Year and Date
  2007-10-15
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Presentation] CAM enhanced super parallel SIMI) processor with high-speed pattern matching capability2007
- Author(s)
  T., Kumaki, Y., Kona, M., Ishizaki, M., Tagami, T., Koide, H.J., Mattausch, T., Gyohten, H., Noda, Y., Kuroda, K., Dosaka, K., Arimoto, K., Saito
- Organizer
  Proceedings of IEEE International MidWest Symposium on Circuits And Systems (MWSCAS2007)
- Place of Presentation
  CANADA
- Year and Date
  2007-08-05
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Presentation] Adavanced Compact MOSFET Model HiSIM2 Based on Surface Potentials with Minimum Number of Approximation2006
- Author(s)
  K., Miura-Mattausch, D., Navarro, N., Sadachika, G., Suzuki, Y., Takeda, M., Miyake, T., Warabino, K., Machida, T., Ezaki, H.J., Mattausch, et. al.
- Organizer
  NSTI-Nanotech 2006
- Place of Presentation
  Boston. (invited)
- Year and Date
  2006-05-07
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Presentation] A Learning OCR System Using Short/Long-term Memory Approach and Hardware Implementation in FPGA2006
- Author(s)
  A., Ahmadi, M.A., Ritonga, M.A., Ahedin, H.J., Mattausch, T., Koide
- Organizer
  2006 IEEE Congress on Evolutionary Computation (WCCI2006)
- Place of Presentation
  Vancouver,Canada
- Year and Date
  2006-07-16
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Presentation] Multi-Object Tracking VLSI Architecture using Image-Scan based Region Growing and Feature Matching2006
- Author(s)
  K., Yamaoka, T., Morimoto, H., Adachi, K., Awane, T., Koide, H.J., Mattausch
- Organizer
  2006 IEEE International Symposium on Circuits and Systems (ISCAS2006)
- Year and Date
  2006-05-21
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Presentation] CAM-based VLSI Architecture for Huffman Coding with Real-time Optimization of the Code Word Table2005
- Author(s)
  T., Kumaki, Y., Kuroda, T., Koide, H.J., Mattausch, H., Noda, K., Dosaka, K., Arimoto, K., Saito
- Organizer
  Proceedings of 2005 IEEE International Symposium on Circuits and Systems (ISCAS2005)
- Place of Presentation
  Kobe
- Year and Date
  2005-05-24
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Presentation] RF-MOSFET model-parameter Extraction with HiSIM2005
- Author(s)
  M. Miura-Mattausch
- Organizer
  Modeling and Simulation of Microsystems 2005
- Place of Presentation
  アナハイム、米国
- Year and Date
  2005-05-08
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Presentation] Highly Parallel Huffman Encoding by Exploiting Multiple-Matches in Content Addressable Memory2005
- Author(s)
  Y., Kuroda, T., Kumaki, P., Koide, H.J., Mattausch, H., Noda, K., Dosaka, K., Arimoto, K., Saito
- Organizer
  Proceedings of the International SoC Design Conference (ISOCC2005)
- Place of Presentation
  Seoul, Korea
- Year and Date
  2005-10-21
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Presentation] Multi-Port CAM based VLSI Architecture for Huffman Coding with Real-time OptimizedCode Word Table2005
- Author(s)
  T., Kumaki, Y., Kuroda, T., Koide, H.J., Mattausch, H., Noda, K., Dosaka, K., Arimoto, K., Saito
- Organizer
  48th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS2005)
- Place of Presentation
  Ohio USA
- Year and Date
  2005-08-07
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Presentation] Substrate Integrity Beyond 1GHz2005
- Author(s)
  M., Nagata, M., Fukazawa, N., Hamanishi, M., Shiochi, T., Iida, J., Watanabe, Y., Murasaka, A., Iwata
- Organizer
  IEEE 2005 ISSCC
- Place of Presentation
  San Francisco
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Presentation] MOSFET modeling beyond 100nm technology : Challenges and Perspectives2005
- Author(s)
  M., Miura-Mattaush
- Organizer
  IEEE SISPAD 2005
- Place of Presentation
  Tsukuba
- Year and Date
  2005-09-01
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Presentation] MOSFET Modeling for RF-Circuit Era,2004
- Author(s)
  M. Miura-Mattausch
- Organizer
  The 11th Int. Conference on Mixed Design of Integrated Circuits and Systems 2004
- Place of Presentation
  シュチェチン,ポーランド
- Year and Date
  2004-06-24
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Presentation] MOSFET Modeling for RF-Circuit Simulation2004
- Author(s)
  M. Miura-Mattausch
- Organizer
  The 2004 Int. Conference on Solid-State and Integrated-Circuit Technology
- Place of Presentation
  北京、中国
- Year and Date
  2004-10-18
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Presentation] Bank-Type Associative Memory for High-Speed Nearest Manhattan Distance Search in Large Reference-Pattern Space2004
- Author(s)
  T., Koide, Y., Yano, H.J., Mattausch
- Organizer
  2004 International Conference on Solid State Devices and Materials (SSDM2004)
- Place of Presentation
  Tokyo
- Year and Date
  2004-09-15
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Presentation] MOSFET Modeling for RF-Circuit Era2004
- Author(s)
  M., Miura-Mattausch, D., Navarro, Y., Takeda, H.J., Mattausch, T., Ohguro, T., Iizuka, M., Taguchi, S., Miyamoto
- Organizer
  The 11th International Conference on Mixed Design of Integrated Circuits and Systems 2004
- Place of Presentation
  Szczecin
- Year and Date
  2004-06-24
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Presentation] MOSFET Modeling for RF-Circuit Simulation2004
- Author(s)
  M., Miura-Mattausch, H.J., Mattausch, T., Ohguro, T., Iizuka, M., Taguchi, S., Kumashiro, S., Miyamoto
- Organizer
  The 2004 Int. Conference on Solid-State and Integrated-CircuitTechnology
- Place of Presentation
  Beijing
- Year and Date
  2004-10-18
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106007
[Presentation] Digital Word-Parallel Low-Power Recognition SoC for Mobile Equipment Based on Nearest Euclidean Distance Search and KNN Classification
- Author(s)
  S. Yamasaki, T. Akazawa, F. An, and H.J. Mattausch
- Organizer
  International Conference on Solid State Devices and Materials
- Place of Presentation
  Tsukuba, Japan
- Year and Date
  2014-09-08 – 2014-09-11
- Data Source
  KAKENHI-PROJECT-25420332
[Presentation] LVQ Neural Network SoC Adaptable to Different on-Chip Learning and Recognition Applications
- Author(s)
  F. An, T. Akazawa, S. Yamazaki, L. Chen, and H.J. Mattausch
- Organizer
  IEEE Asia Pacific Conference on Circuits and Systems
- Place of Presentation
  Ishigaki, Japan
- Year and Date
  2014-11-15 – 2014-11-21
- Data Source
  KAKENHI-PROJECT-25420332
[Presentation] General-Purpose Word-Parallel Pattern Recognition Processor for the k Nearest-Neighbor Algorithm with High-Speed, Low-Power
- Author(s)
  S. Yamasaki, F. An, and H.J. Mattausch
- Organizer
  International Japan-Egypt Conference on Electronics, Communications and Computers
- Place of Presentation
  Fukuoka, Japan
- Year and Date
  2015-03-16 – 2015-03-18
- Data Source
  KAKENHI-PROJECT-25420332
[Presentation] A SoPC architecture for nearest-neighbor based learning and recognition
- Author(s)
  F. An, L. Chen, and H.J. Mattausch
- Organizer
  IEEE International Symposium on Intelligent Signal Processing & Communication Systems
- Place of Presentation
  Kuching, Malaysia
- Year and Date
  2014-12-01 – 2014-12-04
- Data Source
  KAKENHI-PROJECT-25420332
[Presentation] A Coprocessor for Clock-Mapping-Based Nearest Euclidean Distance Search with Feature Vector Dimension Adaptability
- Author(s)
  F. An, T. Akazawa, S. Yamazaki, L. Chen, and H.J. Mattausch
- Organizer
  IEEE Custom Integrated Circuits Conference
- Place of Presentation
  San Jose, USA
- Year and Date
  2014-09-15 – 2014-09-17
- Data Source
  KAKENHI-PROJECT-25420332
[Presentation] SoC Realization of LVQ Neural Network with On-chip Learning and Recognition
- Author(s)
  F. An, T. Akazawa, S. Yamazaki, L. Chen, and H.J. Mattausch
- Organizer
  International Conference on Solid State Devices and Materials
- Place of Presentation
  Tsukuba, Japan
- Year and Date
  2014-09-08 – 2014-09-11
- Data Source
  KAKENHI-PROJECT-25420332

1. YOKOYAMA Shin (80144880)

# of Collaborated Projects: 4 results

# of Collaborated Products: 0 results
2. SHIBAHARA Kentaro (50274139)

# of Collaborated Projects: 3 results

# of Collaborated Products: 0 results
3. KOIDE Tetsushi (30243596)

# of Collaborated Projects: 3 results

# of Collaborated Products: 31 results
4. IWATA Atsushi (30263734)

# of Collaborated Projects: 3 results

# of Collaborated Products: 2 results
5. NAGATA Makoto (40274138)

# of Collaborated Projects: 2 results

# of Collaborated Products: 0 results
6. MIURA Mitiko (70291482)

# of Collaborated Projects: 1 results

# of Collaborated Products: 25 results
7. SASAKI Mamoru (70235274)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
8. 上野弘明 (50314729)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results

Mattausch Hans Juergen Mattausch HansJ.

MATTAUSCH HansJ. マタウシユ ハンスユルゲン

MATTAUSCH Hans Jurgen マタウシュ ハンスユルゲン

MATTAUSCH Hans j マタウシュ ハンスユルゲン

MATTAUSCH Hans J. マタウシユ ハンスユルゲン

MATTAUSH Hans Juregen MATTAUSH Hans Juregen

MATTAUSCH Hans Juergen マタウッシュ ハンス ユルゲン

MATTAUSCH HansJuergen マタウッシュ ハンス ユルゲン

J Mattausch H H・J Mattausch

MATTAUSCH Ha マタウシュ ハンス ユルゲン

Research Projects

Research Products

Co-Researchers

Research on digital, high-speed, ultra-low power-consumption, Manhattan/Euclidean-distance-search associative memoryPrincipal Investigator

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Research on ring-oscillator-based, super-low-power, scalabletime-domain associative memoriesPrincipal Investigator

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Memory-based VLSI brain research for realizing recognition, learning and decision capabilityPrincipal Investigator

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A 3 Dimensional Integration Scheme Utilizing Wireless Interconnections for Implementing Hyper Brains

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Fast and small area associative memories with minimum distance search capabilityPrincipal Investigator

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2重ゲート極微細MOSトランジスタによる単電子制御

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2重ゲート極微細MOSトランジスタによる単電子制御

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super-high access-bandwidth common-memory architecture for elector-optical integrationPrincipal Investigator

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Study for Optoelectronic Integrated Circuits with Light Emitting Devices by Epitaxial Lift-off Technique

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[Journal Article] Highly flexible nearest-neighbor-search associative memory with integrated KNN classifier, configurable parallelism and dual-Storage Space2016

Author(s)

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DOI

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[Journal Article] k Nearest Neighbor Classification Coprocessor with Weighted Clock-Mapping-Based Searching2016

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[Journal Article] Reconfigurable VLSI implementation for learning vector quantization with on-chip learning circuit2016

Author(s)

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DOI

Data Source

[Journal Article] VLSI Realization of Learning Vector Quantization with HW/SW Co-design for Different Applications2015

MATTAUSCH HansJ. マタウシユハンスユルゲン

MATTAUSCH Hans Jurgen マタウシュハンスユルゲン

MATTAUSCH Hans j マタウシュハンスユルゲン

MATTAUSCH Hans J. マタウシユハンスユルゲン

MATTAUSCH Hans Juergen マタウッシュハンスユルゲン

MATTAUSCH HansJuergen マタウッシュハンスユルゲン

MATTAUSCH Ha マタウシュハンスユルゲン