Gotow Takahiro 後藤高寛

… Alternative Names

GOTOW Takahiro 後藤高寛

GOTOW TAKAHIRO 後藤高寛

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Researcher Number	70827914
Other IDs	https://orcid.org/0000-0001-9052-2950
Affiliation (Current)	2026: 国立研究開発法人産業技術総合研究所, エレクトロニクス・製造領域, 研究員
Affiliation (based on the past Project Information) *help	2026: 国立研究開発法人産業技術総合研究所, エレクトロニクス・製造領域, 研究員 2023 – 2024: 国立研究開発法人産業技術総合研究所, エレクトロニクス・製造領域, 研究員 2021 – 2023: 東京工業大学, 工学院, 助教 2019: 東京工業大学, 工学院, 助教 2018: 国立研究開発法人情報通信研究機構, 未来ICT研究所フロンティア創造総合研究室, 研究員
Review Section/Research Field	Principal Investigator Basic Section 21060:Electron device and electronic equipment-related / Basic Section 21050:Electric and electronic materials-related / 0302:Electrical and electronic engineering and related fields Except Principal Investigator Basic Section 21060:Electron device and electronic equipment-related
Keywords	Principal Investigator TFET / MOCVD / 高周波デバイス / 窒化物半導体デバイス / InGaAs / GaAsSb / MOS界面準位 / III-V semiconductors / MOSFET / III-V族化合物半導体 / トンネルトランジスタ … More Except Principal Investigator … More 横方向結晶成長 / トンネルFE / 横方向成長 / バイポーラトランジスタ / 化合物半導体 / ナノシート / 低消費電力 / ラテラルHBT / トンネルFET / ヘテロ構造 Less

InNチャネル高電子移動度トランジスタに向けたMIS界面特性向上手法の確立Principal Investigator
- Principal Investigator
  
  後藤高寛
- Project Period (FY)
  2026 – 2028
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Review Section
  
  Basic Section 21060:Electron device and electronic equipment-related
- Research Institution
  National Institute of Advanced Industrial Science and Technology
InNチャネル高電子移動度トランジスタ実現に向けた結晶成長技術と極性制御Principal Investigator
- Principal Investigator
  
  後藤高寛
- Project Period (FY)
  2024 – 2025
- Research Category
  
  Grant-in-Aid for Early-Career Scientists
- Review Section
  
  Basic Section 21050:Electric and electronic materials-related
- Research Institution
  National Institute of Advanced Industrial Science and Technology
Lateral nano-sheet channel tunnel FETs using regrowth technology in source and drain regionPrincipal Investigator
- Principal Investigator
  
  GOTOW Takahiro
- Project Period (FY)
  2021 – 2023
- Research Category
  
  Grant-in-Aid for Early-Career Scientists
- Review Section
  
  Basic Section 21060:Electron device and electronic equipment-related
- Research Institution
  National Institute of Advanced Industrial Science and Technology
  Tokyo Institute of Technology
Creation of compound semiconductor lateral heterojunctions and their application to electronic devices
- Principal Investigator
  
  Miyamoto Yasuyuki
- Project Period (FY)
  2021 – 2023
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Review Section
  
  Basic Section 21060:Electron device and electronic equipment-related
- Research Institution
  Tokyo Institute of Technology
Study on tunnel field effect transistors for ultra-low power analog devicesPrincipal Investigator
- Principal Investigator
  
  GOTOW TAKAHIRO
- Project Period (FY)
  2018 – 2019
- Research Category
  
  Grant-in-Aid for Research Activity Start-up
- Review Section
  
  0302:Electrical and electronic engineering and related fields
- Research Institution
  Tokyo Institute of Technology
  National Institute of Information and Communications Technology

All 2019 2018

All Journal Article Presentation

[Journal Article] Improvement of p-type GaAs0.51Sb0.49 metal-oxide-semiconductor interface properties by using ultrathin In0.53Ga0.47As interfacial layers2019
- Author(s)
  Gotow Takahiro、Mitsuhara Manabu、Hoshi Takuya、Sugiyama Hiroki、Takenaka Mitsuru、Takagi Shinichi
- Journal Title
  
  Journal of Applied Physics
  
  Volume: 125 Issue: 21 Pages: 214504-214504
- DOI
  10.1063/1.5096410
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-19K21084
[Journal Article] 材料エンジニアリングによるトンネル電界効果トランジスタの高性能化2019
- Author(s)
  (2)高木信一, 加藤公彦, 安大煥, 後藤高寛, 松村亮, 高口遼太郎, 竹中充
- Journal Title
  
  電子情報通信学会論文誌 C
  
  Volume: Vol. J102-C, NO.3 Pages: 61-69
- Data Source
  KAKENHI-PROJECT-19K21084
[Journal Article] (Invited) Tunneling FET Device Technology for Ultra-Low Power Integrated Circuits2019
- Author(s)
  Takagi Shinichi、Kato Kimihiko、Ahn Dae-Hwan、Gotow Takahiro、Takaguchi Ryotaro、Bae Tae-Eon、Toprasertpong Kasidit、Takenaka Mitsuru
- Journal Title
  
  ECS Transactions
  
  Volume: 92 Issue: 4 Pages: 59-69
- DOI
  10.1149/09204.0059ecst
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-19K21084
[Journal Article] Performance enhancement of p-GaAs0.51Sb0.49/In0.53Ga0.47As hetero-junction vertical tunneling field-effect transistors with abrupt source impurity profile2019
- Author(s)
  Gotow Takahiro、Mitsuhara Manabu、Hoshi Takuya、Sugiyama Hiroki、Takenaka Mitsuru、Takagi Shinichi
- Journal Title
  
  Journal of Applied Physics
  
  Volume: 126 Issue: 21 Pages: 214502-214502
- DOI
  10.1063/1.5121567
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-19K21084
[Journal Article] Drive current enhancement of Si MOSFETs by using anti-ferroelectric gate insulators2019
- Author(s)
  Yamaguchi Masashi、Gotow Takahiro、Takenaka Mitsuru、Takagi Shinichi
- Journal Title
  
  Japanese Journal of Applied Physics
  
  Volume: 58 Issue: SB Pages: SBBA15-SBBA15
- DOI
  10.7567/1347-4065/ab073b
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-19K21084
[Presentation] InP基板上引張歪GaAsSbとInGaAsの膜厚増加による結晶性劣化の比較2019
- Author(s)
  満原学, 星拓也, 杉山弘樹, 後藤高寛, 竹中充, 高木信一
- Organizer
  第66回応用物理学会春季学術講演会
- Data Source
  KAKENHI-PROJECT-19K21084
[Presentation] MOS Device Technology using Alternative Channel Materials for Low Power Logic LSI2018
- Author(s)
  (5)S. Takagi, K. Kato, W.-K. Kim, K. Jo, R. Matsumura, R. Takaguchi, D.-H. Ahn, T. Gotow, M. Takenaka
- Organizer
  48th European Solid-State Device Research Conference (ESSDERC)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-19K21084
[Presentation] Performance enhancement of Si MOSFETs using anti-ferroelectric thin films as gate insulators2018
- Author(s)
  M. Yamaguchi, T. Gotow, M. Takenaka, S. Takagi
- Organizer
  International Conference on Solid State Devices and Materials (SSDM)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-19K21084
[Presentation] Improvement of ION and S.S. values of p-GaAs0.51Sb0.49/In0.53Ga0.47As hetero-junction vertical TFETs by using abrupt source impurity profile2018
- Author(s)
  T. Gotow, M. Mitsuharu, T. Hoshi, H. Sugiyama, M. Takenaka, S. Takagi
- Organizer
  International Conference on Solid State Devices and Materials (SSDM)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-19K21084

1. Miyamoto Yasuyuki (40209953)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
2. 福田浩一 (00586282)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
3. 菅原聡 (40282842)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
4. 荒井昌和 (90522003)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results

Gotow Takahiro 後藤 高寛

GOTOW Takahiro 後藤 高寛

GOTOW TAKAHIRO 後藤 高寛

Research Projects

Research Products

Co-Researchers

InNチャネル高電子移動度トランジスタに向けたMIS界面特性向上手法の確立Principal Investigator

Principal Investigator

Project Period (FY)

Research Category

Review Section

Research Institution

InNチャネル高電子移動度トランジスタ実現に向けた結晶成長技術と極性制御Principal Investigator

Principal Investigator

Project Period (FY)

Research Category

Review Section

Research Institution

Lateral nano-sheet channel tunnel FETs using regrowth technology in source and drain regionPrincipal Investigator

Principal Investigator

Project Period (FY)

Research Category

Review Section

Research Institution

Creation of compound semiconductor lateral heterojunctions and their application to electronic devices

Principal Investigator

Project Period (FY)

Research Category

Review Section

Research Institution

Study on tunnel field effect transistors for ultra-low power analog devicesPrincipal Investigator

Principal Investigator

Project Period (FY)

Research Category

Review Section

Research Institution

[Journal Article] Improvement of p-type GaAs0.51Sb0.49 metal-oxide-semiconductor interface properties by using ultrathin In0.53Ga0.47As interfacial layers2019

Author(s)

Journal Title

DOI

Data Source

[Journal Article] 材料エンジニアリングによるトンネル電界効果トランジスタの高性能化2019

Author(s)

Journal Title

Data Source

[Journal Article] (Invited) Tunneling FET Device Technology for Ultra-Low Power Integrated Circuits2019

Author(s)

Journal Title

DOI

Data Source

[Journal Article] Performance enhancement of p-GaAs0.51Sb0.49/In0.53Ga0.47As hetero-junction vertical tunneling field-effect transistors with abrupt source impurity profile2019

Author(s)

Journal Title

DOI

Data Source

[Journal Article] Drive current enhancement of Si MOSFETs by using anti-ferroelectric gate insulators2019

Author(s)

Journal Title

DOI

Data Source

[Presentation] InP基板上引張歪GaAsSbとInGaAsの膜厚増加による結晶性劣化の比較2019

Author(s)

Organizer

Data Source

[Presentation] MOS Device Technology using Alternative Channel Materials for Low Power Logic LSI2018

Author(s)

Organizer

Data Source

[Presentation] Performance enhancement of Si MOSFETs using anti-ferroelectric thin films as gate insulators2018

Author(s)

Organizer

Data Source

[Presentation] Improvement of ION and S.S. values of p-GaAs0.51Sb0.49/In0.53Ga0.47As hetero-junction vertical TFETs by using abrupt source impurity profile2018

Author(s)

Organizer

Data Source

Gotow Takahiro 後藤高寛

GOTOW Takahiro 後藤高寛

GOTOW TAKAHIRO 後藤高寛