Sato Shimpei 佐藤真平

… Alternative Names

Shimpei Sato 佐藤真平

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Researcher Number	80782763
Affiliation (Current)	2023: 信州大学, 学術研究院工学系, 助教
Affiliation (based on the past Project Information) *help	2021 – 2022: 信州大学, 学術研究院工学系, 助教 2017 – 2020: 東京工業大学, 工学院, 助教
Review Section/Research Field	Principal Investigator Computer system Except Principal Investigator Basic Section 60040:Computer system-related
Keywords	Principal Investigator 集積回路設計 / 近似演算 / Approximate Computing / 一般同期式回路 / デジタル集積回路設計 / 可変レイテンシ回路 / 回路設計 / 可変レイテンシ / 投機実行 Except Principal Investigator ニューラルネットワーク … More / 雑音畳み込み / FPGA / AI / 深層学習 / CNN / 組込みシステム / 画像圧縮 / Deep Learning / 計算機システム / 高性能計算 / Noise Convolution Less

On a noise convolutional neural network
- Principal Investigator
  
  中原啓貴
- Project Period (FY)
  2019 – 2023
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Review Section
  
  Basic Section 60040:Computer system-related
- Research Institution
  Tokyo Institute of Technology
Design of a General-Synchronous Circuit for Approximate Computing using Speculative XxecutionPrincipal Investigator
- Principal Investigator
  
  Shimpei Sato
- Project Period (FY)
  2017 – 2019
- Research Category
  
  Grant-in-Aid for Young Scientists (B)
- Research Field
  
  Computer system
- Research Institution
  Tokyo Institute of Technology

All 2021 2020 2019 2017

All Journal Article Presentation

[Journal Article] Weight Sparseness for a Feature-Map-Split-CNN Toward Low-Cost Embedded FPGAs2021
- Author(s)
  Akira Jinguji, Shimpei Sato, Hiroki Nakahara
- Journal Title
  
  IEICE Trans. Inf. Syst.
  
  Volume: 104-D(12) Pages: 2040-2047
- NAID
  130008123390
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-19H04078
[Journal Article] Energy-Efficient ECG Signals Outlier Detection Hardware Using a Sparse Robust Deep Autoencoder2021
- Author(s)
  Naoto Soga, Shimpei Sato, Hiroki Nakahara
- Journal Title
  
  IEICE Trans. Inf. Syst
  
  Volume: 104-D(8) Pages: 1121-1129
- NAID
  130008070358
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-19H04078
[Journal Article] SENTEI: Filter-Wise Pruning with Distillation towards Efficient Sparse Convolutional Neural Network Accelerators2020
- Author(s)
  Masayuki Shimoda, Youki Sada, Ryosuke Kuramochi, Shimpei Sato, Hiroki Nakahara
- Journal Title
  
  IEICE Transactions on Information and Systems
  
  Volume: 103-D(12) Issue: 12 Pages: 2463-2470
- DOI
  10.1587/transinf.2020pap0013
  10.1587/transinf.2020PAP0013
- NAID
  130007948567
- ISSN
  0916-8532, 1745-1361
- Language
  English
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-19H04078
[Journal Article] GUINNESS: A GUI Based Binarized Deep Neural Network Framework for Software Programmers2019
- Author(s)
  Hiroki Nakahara, Haruyoshi Yonekawa, Tomoya Fujii, Masayuki Shimoda, Shimpei Sato
- Journal Title
  
  IEICE Trans. Inf. Syst.
  
  Volume: 102-D(5) Pages: 1003-1011
- NAID
  130007641155
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-19H04078
[Journal Article] A Low Area Overhead Design Method for High-Performance General-Synchronous Circuits with Speculative Execution2019
- Author(s)
  SATO Shimpei、SASSA Eijiro、UKON Yuta、TAKAHASHI Atsushi
- Journal Title
  
  IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
  
  Volume: E102.A Issue: 12 Pages: 1760-1769
- DOI
  10.1587/transfun.e102.a.1760
  10.1587/transfun.E102.A.1760
- NAID
  130007754049
- ISSN
  0916-8508, 1745-1337
- Language
  English
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-17K12659
[Journal Article] Power Efficient Object Detector with an Event-Driven Camera for Moving Object Surveillance on an FPGA2019
- Author(s)
  Masayuki Shimoda, Shimpei Sato, Hiroki Nakahara
- Journal Title
  
  IEICE Trans. Inf. Syst.
  
  Volume: 102-D(5) Pages: 1020-1028
- NAID
  130007641234
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-19H04078
[Presentation] Fast Monocular Depth Estimation on an FPGA2020
- Author(s)
  Youki Sada, Naoto Soga, Masayuki Shimoda, Akira Jinguji, Shimpei Sato, Hiroki Nakahara
- Organizer
  IPDPS Workshops 2020
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-19H04078
[Presentation] FPGA-Based Training Accelerator Utilizing Sparseness of Convolutional Neural Network.2019
- Author(s)
  Hiroki Nakahara, Youki Sada, Masayuki Shimoda, Kouki Sayama, Akira Jinguji, Shimpei Sato
- Organizer
  FPL2019
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-19H04078
[Presentation] Noise Convolutional Neural Networks and FPGA Implementation2019
- Author(s)
  Atsuki Munakata, Hiroki Nakahara, Shimpei Sato
- Organizer
  ISMVL 2019
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-19H04078
[Presentation] Many Universal Convolution Cores for Ensemble Sparse Convolutional Neural Networks2019
- Author(s)
  Ryosuke Kuramochi, Youki Sada, Masayuki Shimoda, Shimpei Sato
- Organizer
  MCSoC 2019
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-19H04078
[Presentation] 一般同期性能を向上させる遅延最適化に関する検討2019
- Author(s)
  佐々栄治郎，佐藤真平，高橋篤司
- Organizer
  電子情報通信学会技術研究報告 VLD2018-72
- Data Source
  KAKENHI-PROJECT-17K12659
[Presentation] A Low Area Overhead Design for High-Performance General-Synchronous Circuits with Speculative Execution2019
- Author(s)
  Shimpei Sato, Eijiro Sassa, Yuta Ukon, Atsushi Takahashi
- Organizer
  IEEE International Symposium on Circuits and Systems (ISCAS '19)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-17K12659
[Presentation] A Low Area Overhead Design for High-Performance General-Synchronous Circuits with Speculative Execution2019
- Author(s)
  Shimpei Sato, Eijiro Sassa, Yuta Ukon, and Atsushi Takahashi
- Organizer
  2019 IEEE International Symposium on Circuits and Systems (ISCAS)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-17K12659
[Presentation] 典型的な回路を用いた近似演算における入力系列の演算精度への影響の調査2017
- Author(s)
  佐藤真平，右近祐太，高橋篤司
- Organizer
  電子情報通信学会技術研究報告 VLD2016-95
- Data Source
  KAKENHI-PROJECT-17K12659
[Presentation] 演算器の可変レイテンシ化による処理性能と回路面積のトレードオフに関する評価2017
- Author(s)
  右近祐太，佐藤真平，高橋篤司
- Organizer
  電子情報通信学会技術研究報告 VLD2017-26
- Data Source
  KAKENHI-PROJECT-17K12659

1. 中原啓貴 (20624414)

# of Collaborated Projects: 1 results

# of Collaborated Products: 8 results
2. 佐野健太郎 (00323048)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results

Sato Shimpei 佐藤 真平

Shimpei Sato 佐藤 真平

Research Projects

Research Products

Co-Researchers

On a noise convolutional neural network

Principal Investigator

Project Period (FY)

Research Category

Review Section

Research Institution

Design of a General-Synchronous Circuit for Approximate Computing using Speculative XxecutionPrincipal Investigator

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

[Journal Article] Weight Sparseness for a Feature-Map-Split-CNN Toward Low-Cost Embedded FPGAs2021

Author(s)

Journal Title

NAID

Data Source

[Journal Article] Energy-Efficient ECG Signals Outlier Detection Hardware Using a Sparse Robust Deep Autoencoder2021

Author(s)

Journal Title

NAID

Data Source

[Journal Article] SENTEI: Filter-Wise Pruning with Distillation towards Efficient Sparse Convolutional Neural Network Accelerators2020

Author(s)

Journal Title

DOI

NAID

ISSN

Language

Data Source

[Journal Article] GUINNESS: A GUI Based Binarized Deep Neural Network Framework for Software Programmers2019

Author(s)

Journal Title

NAID

Data Source

[Journal Article] A Low Area Overhead Design Method for High-Performance General-Synchronous Circuits with Speculative Execution2019

Author(s)

Journal Title

DOI

NAID

ISSN

Language

Data Source

[Journal Article] Power Efficient Object Detector with an Event-Driven Camera for Moving Object Surveillance on an FPGA2019

Author(s)

Journal Title

NAID

Data Source

[Presentation] Fast Monocular Depth Estimation on an FPGA2020

Author(s)

Organizer

Data Source

[Presentation] FPGA-Based Training Accelerator Utilizing Sparseness of Convolutional Neural Network.2019

Author(s)

Organizer

Data Source

[Presentation] Noise Convolutional Neural Networks and FPGA Implementation2019

Author(s)

Organizer

Data Source

[Presentation] Many Universal Convolution Cores for Ensemble Sparse Convolutional Neural Networks2019

Author(s)

Organizer

Data Source

[Presentation] 一般同期性能を向上させる遅延最適化に関する検討2019

Author(s)

Organizer

Data Source

[Presentation] A Low Area Overhead Design for High-Performance General-Synchronous Circuits with Speculative Execution2019

Author(s)

Organizer

Data Source

[Presentation] A Low Area Overhead Design for High-Performance General-Synchronous Circuits with Speculative Execution2019

Author(s)

Organizer

Sato Shimpei 佐藤真平

Shimpei Sato 佐藤真平