Miura Yoshinao 三浦喜直

Researcher Number	90828287
Affiliation (Current)	2025: 国立研究開発法人産業技術総合研究所, エネルギー・環境領域, 主任研究員
Affiliation (based on the past Project Information) *help	2020 – 2022: 国立研究開発法人産業技術総合研究所, エネルギー・環境領域, 主任研究員
Review Section/Research Field	Principal Investigator Basic Section 21050:Electric and electronic materials-related
Keywords	Principal Investigator 絶縁化 / 外周構造 / 高耐圧化 / GaNパワーデバイス / 硼素 / イオン注入 / 硼素イオン注入 / 電界緩和 / 終端構造 / 高耐圧 / 縦型パワーデバイス / 窒化ガリウム

Study of boron-implanted resistive crystal layers to enhance avalanche ruggedness of ultra-low loss GaN power devicesPrincipal Investigator
- Principal Investigator
  
  Miura Yoshinao
- Project Period (FY)
  2020 – 2022
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Review Section
  
  Basic Section 21050:Electric and electronic materials-related
- Research Institution
  National Institute of Advanced Industrial Science and Technology

All 2023 2022 2021

All Journal Article Presentation Patent

[Journal Article] Wafer-scale Fabrication of Vertical GaN p-n Diodes with Graded JTE Structures Using Multiple-zone Boron Implantation2022
- Author(s)
  Miura Yoshinao、Hirai Hirohisa、Nakajima Akira、Harada Shinsuke
- Journal Title
  
  Proc. of International Symposium on Power Semiconductor Devices and ICs
  
  Volume: 2022 Pages: 329-332
- DOI
  10.1109/ispsd49238.2022.9813654
- Data Source
  KAKENHI-PROJECT-20K04590
[Journal Article] Wafer-scale Fabrication of Vertical GaN p-n Diodes with Graded JTE Structures Using Multiple-zone Boron Implantation2022
- Author(s)
  Yoshinao Miura, Hirohisa Hirai, Akira Nakajima, and Shinsuke Harada
- Journal Title
  
  Proc. Int. Symp. Power Semiconductor Devices and IC’（ISPSD））
  
  Volume: -
- Data Source
  KAKENHI-PROJECT-20K04590
[Journal Article] A New JTE Technique for Vertical GaN Power Devices by Conductivity Control Using Boron Implantation into p-Type Layer2022
- Author(s)
  Miura Yoshinao、Hirai Hirohisa、Nakajima Akira、Harada Shinsuke
- Journal Title
  
  Proc. of International Symposium on Power Semiconductor Devices and ICs
  
  Volume: 2021 Pages: 343-346
- DOI
  10.23919/ispsd50666.2021.9452219
- Data Source
  KAKENHI-PROJECT-20K04590
[Journal Article] A New JTE Technique for Vertical GaN Power Devices by Conductivity Control Using Boron Implantation into p-Type Layer2021
- Author(s)
  Yoshinao Miura, Hirohisa Hirai, Akira Nakajima, and Shinsuke Harada
- Journal Title
  
  Proc. Int. Symp. Power Semiconductor Devices and IC’（ISPSD））
  
  Volume: - Pages: 354-357
- Data Source
  KAKENHI-PROJECT-20K04590
[Patent] 半導体装置および半導体装置の製造方法2023
- Inventor(s)
  三浦喜直、中島昭、沈旭強、平井悠久、原田信介
- Industrial Property Rights Holder
  国立研究開発法人産業技術総合研究所
- Industrial Property Rights Type
  特許
- Industrial Property Number
  2023-515445
- Filing Date
  2023
- Data Source
  KAKENHI-PROJECT-20K04590
[Patent] 半導体装置および半導体装置の製造方法2022
- Inventor(s)
  三浦喜直、中島昭、沈旭強、平井悠久、原田信介
- Industrial Property Rights Holder
  国立研究開発法人産業技術総合研究所
- Industrial Property Rights Type
  特許
- Filing Date
  2022
- Overseas
- Data Source
  KAKENHI-PROJECT-20K04590
[Patent] 半導体装置および半導体装置の製造方法2021
- Inventor(s)
  三浦喜直　中島昭　沈旭強　平井悠久　原田信介
- Industrial Property Rights Holder
  国立研究開発法人産業技術総合研究所
- Industrial Property Rights Type
  特許
- Industrial Property Number
  2021-072595
- Filing Date
  2021
- Data Source
  KAKENHI-PROJECT-20K04590
[Presentation] A New JTE Technique for Vertical GaN Power Devices by Conductivity Control Using Boron Implantation into p-Type Layer2022
- Author(s)
  Y. Miura, H. Hirai, A. Nakajima, and S. Harada
- Organizer
  ISPSD2021
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-20K04590
[Presentation] 硼素イオン注入による伝導度制御p型GaNエピ層を用いた縦型素子用JTE構造の設計2022
- Author(s)
  三浦喜直、平井悠久、中島昭、原田信介
- Organizer
  第9回先進パワー半導体分科会
- Data Source
  KAKENHI-PROJECT-20K04590
[Presentation] Wafer-scale Fabrication of Vertical GaN p-n Diodes with Graded JTE Structures Using Multiple-zone Boron Implantation2022
- Author(s)
  Y. Miura, H. Hirai, A. Nakajima, and S. Harada
- Organizer
  ISPSD2022
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-20K04590
[Presentation] Wafer-scale Fabrication of Vertical GaN p-n Diodes with Graded JTE Structures Using Multiple-zone Boron Implantation2022
- Author(s)
  Yoshinao Miura, Hirohisa Hirai, Akira Nakajima, and Shinsuke Harada
- Organizer
  Int. Symp. Power Semiconductor Devices and IC’（ISPSD）
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-20K04590
[Presentation] A New JTE Technique for Vertical GaN Power Devices by Conductivity Control Using Boron Implantation into p-Type Layer2021
- Author(s)
  Yoshinao Miura, Hirohisa Hirai, Akira Nakajima, and Shinsuke Harada
- Organizer
  Int. Symp. Power Semiconductor Devices and IC’（ISPSD）
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-20K04590

1. 沈旭強 (50272381)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
2. 中島昭 (60450657)

# of Collaborated Projects: 1 results

# of Collaborated Products: 9 results

Miura Yoshinao 三浦 喜直

Research Projects

Research Products

Co-Researchers

Study of boron-implanted resistive crystal layers to enhance avalanche ruggedness of ultra-low loss GaN power devicesPrincipal Investigator

Principal Investigator

Project Period (FY)

Research Category

Review Section

Research Institution

[Journal Article] Wafer-scale Fabrication of Vertical GaN p-n Diodes with Graded JTE Structures Using Multiple-zone Boron Implantation2022

Author(s)

Journal Title

DOI

Data Source

[Journal Article] Wafer-scale Fabrication of Vertical GaN p-n Diodes with Graded JTE Structures Using Multiple-zone Boron Implantation2022

Author(s)

Journal Title

Data Source

[Journal Article] A New JTE Technique for Vertical GaN Power Devices by Conductivity Control Using Boron Implantation into p-Type Layer2022

Author(s)

Journal Title

DOI

Data Source

[Journal Article] A New JTE Technique for Vertical GaN Power Devices by Conductivity Control Using Boron Implantation into p-Type Layer2021

Author(s)

Journal Title

Data Source

[Patent] 半導体装置および半導体装置の製造方法2023

Inventor(s)

Industrial Property Rights Holder

Industrial Property Rights Type

Industrial Property Number

Filing Date

Data Source

[Patent] 半導体装置および半導体装置の製造方法2022

Inventor(s)

Industrial Property Rights Holder

Industrial Property Rights Type

Filing Date

Data Source

[Patent] 半導体装置および半導体装置の製造方法2021

Inventor(s)

Industrial Property Rights Holder

Industrial Property Rights Type

Industrial Property Number

Filing Date

Data Source

[Presentation] A New JTE Technique for Vertical GaN Power Devices by Conductivity Control Using Boron Implantation into p-Type Layer2022

Author(s)

Organizer

Data Source

[Presentation] 硼素イオン注入による伝導度制御p型GaNエピ層を用いた縦型素子用JTE構造の設計2022

Author(s)

Organizer

Data Source

[Presentation] Wafer-scale Fabrication of Vertical GaN p-n Diodes with Graded JTE Structures Using Multiple-zone Boron Implantation2022

Author(s)

Organizer

Data Source

[Presentation] Wafer-scale Fabrication of Vertical GaN p-n Diodes with Graded JTE Structures Using Multiple-zone Boron Implantation2022

Author(s)

Organizer

Data Source

[Presentation] A New JTE Technique for Vertical GaN Power Devices by Conductivity Control Using Boron Implantation into p-Type Layer2021

Author(s)

Organizer

Data Source

Miura Yoshinao 三浦喜直