Nishizawa Shinichi 西澤真一

… Alternative Names

NISHIZAWA Sinichi 西澤真一

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Researcher Number	40757522
Other IDs	https://orcid.org/0000-0002-1172-7286
Affiliation (Current)	2024: 早稲田大学, 理工学術院(情報生産システム研究科・センター), 講師(任期付)
Affiliation (based on the past Project Information) *help	2024: 早稲田大学, 理工学術院(情報生産システム研究科・センター), 講師(任期付) 2022: 埼玉大学, 理工学研究科, 助教 2022: 早稲田大学, 理工学術院(情報生産システム研究科・センター), 講師(任期付) 2019 – 2021: 福岡大学, 工学部, 助教 2017 – 2018: 埼玉大学, 理工学研究科, 助教 2016: 埼玉大学, 大学院理工学研究科, 助教
Review Section/Research Field	Principal Investigator Basic Section 60040:Computer system-related / Computer system Except Principal Investigator Computer system / Basic Section 60070:Information security-related / Basic Section 60040:Computer system-related
Keywords	Principal Investigator 集積回路 / 記憶保持特性 / フリップフロップ / 記憶特性 / モニター回路 / NBTI / BIST / テスト / ばらつきモニタ / プロセスモニタ / トランジスタ特性ばらつき / ばらつき評価回路 … More Except Principal Investigator … More 信頼性 / 経年劣化 / IoT / LSI / DVFS / AES / 耐タンパ性 / サイドチャネル攻撃 / 特性ゆらぎ / 常時起動デバイス / スタックトランジスタ / バルク / FDSOI / パワエレ / BTI / ランダムテレグラフノイズ / RTN / NBTI / 永久故障 / 一時故障 / パワーエレクトロニクス / ソフトエラー / 組込システム / ディペンダブルシステム / 組込みシステム / 製造容易化 / 低消費電力化 / 集積回路 / システムオンチップ Less

A Tamper-resistant LSI Design Technique Using Dynamic Power Voltage Scaling Control
- Principal Investigator
  
  請園智玲
- Project Period (FY)
  2024 – 2026
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Review Section
  
  Basic Section 60070:Information security-related
- Research Institution
  Fukuoka University
Reutilization of scan test design for transistor performance degradation diagnosisPrincipal Investigator
- Principal Investigator
  
  西澤真一
- Project Period (FY)
  2021 – 2023
- Research Category
  
  Grant-in-Aid for Early-Career Scientists
- Review Section
  
  Basic Section 60040:Computer system-related
- Research Institution
  Waseda University
  Fukuoka University
高信頼性を要求される常時起動デバイスの特性変動の実測評価と動作レベルのモデル化
- Principal Investigator
  
  松本高士
- Project Period (FY)
  2018 – 2023
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Review Section
  
  Basic Section 60040:Computer system-related
- Research Institution
  The University of Tokyo
Process Variation Estimation using Flip-Flop Retention CharacteristicsPrincipal Investigator
- Principal Investigator
  
  Nishizawa Shinichi
- Project Period (FY)
  2017 – 2019
- Research Category
  
  Grant-in-Aid for Young Scientists (B)
- Research Field
  
  Computer system
- Research Institution
  Fukuoka University
  Saitama University
An IoT that can keep on running over years efficiently and reliably
- Principal Investigator
  
  Kobayashi Kazutoshi
- Project Period (FY)
  2015 – 2018
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  Computer system
- Research Institution
  Kyoto Institute of Technology
LSI design methodology that enables robust operation under the supply as low as threshold voltage by self-compensating performance variability
- Principal Investigator
  
  ONODERA Hidetoshi
- Project Period (FY)
  2013 – 2016
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  Computer system
- Research Institution
  Kyoto University

All 2023 2022 2020 2019 2018 2015 2014 2013 Other

All Journal Article Presentation

[Journal Article] libretto: An Open Cell Timing Characterizer for Open Source VLSI Design2022
- Author(s)
  Shinichi Nishizawa, Toru Nakura
- Journal Title
  
  IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
  
  Volume: -
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-21K17723
[Journal Article] Universal NBTI Compact Model Replicating AC Stress/Recovery from a Single-shot Long-term DC Measurement2020
- Author(s)
  Hosaka Takumi、Nishizawa Shinichi、Kishida Ryo、Matsumoto Takashi、Kobayashi Kazutoshi
- Journal Title
  
  IPSJ Transactions on System LSI Design Methodology
  
  Volume: 13 Issue: 0 Pages: 56-64
- DOI
  10.2197/ipsjtsldm.13.56
- NAID
  130007887399
- Peer Reviewed / Open Access
- Data Source
  KAKENHI-PROJECT-18K11210
[Journal Article] Design Methodology for Variation Tolerant D-Flip-Flop Using Regression Analysis2018
- Author(s)
  NISHIZAWA Shinichi、ONODERA Hidetoshi
- Journal Title
  
  IEICE Trans. Fundamentals
  
  Volume: E101.A Issue: 12 Pages: 2222-2230
- DOI
  10.1587/transfun.E101.A.2222
- NAID
  130007539015
- ISSN
  0916-8508, 1745-1337
- Year and Date
  2018-12-01
- Language
  English
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-17K12657
[Journal Article] Layout Generator with Flexible Grid Assignment for Area Efficient Standard Cell2015
- Author(s)
  Shinichi Nishizawa, Tohru Ishihara, Hidetoshi Onodera
- Journal Title
  
  IPSJ Transactions on System LSI Design Methodology
  
  Volume: 8 Issue: 0 Pages: 131-135
- DOI
  10.2197/ipsjtsldm.8.131
- NAID
  130005091214
- ISSN
  1882-6687
- Language
  English
- Peer Reviewed / Acknowledgement Compliant / Open Access
- Data Source
  KAKENHI-PROJECT-25280014
[Journal Article] Standard Cell Structure with Flexible P/N Well Boundaries for Near-Threshold Voltage Operation2013
- Author(s)
  Shinichi Nishizawa, Tohru Ishihara, Hidetoshi Onodera
- Journal Title
  
  IEICE Trans. Fundamentals
  
  Volume: E96.A Issue: 12 Pages: 2499-2507
- DOI
  10.1587/transfun.E96.A.2499
- NAID
  130003385302
- ISSN
  0916-8508, 1745-1337
- Language
  English
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-25280014
[Presentation] ハードウェア設計のオープンソース化に向けたライブラリキャラクタライザの開発2023
- Author(s)
  西澤真一、名倉徹
- Organizer
  IEICE総合大会シンポジウム
- Invited
- Data Source
  KAKENHI-PROJECT-21K17723
[Presentation] Library characterizer for open-source VLSI design2022
- Author(s)
  Shinichi Nishizawa, Toru Nakura
- Organizer
  The Workshop on Open-Source EDA Technology (WOSET)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-21K17723
[Presentation] Process Variation Estimation using An IDDQ Test and FlipFlop Retention Characteristics2020
- Author(s)
  Shinichi Nishizawa,and Kazuhito Ito
- Organizer
  International Conference on Microelectronic Test Structures
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-17K12657
[Presentation] Compact Modeling of NBTI Replicationg AC Stress / Recovery from a Single-shot Long-term DC Measurement2019
- Author(s)
  Shinichi NISHIZAWA, Takumi HOSAKA, Ryo KISHIDA, Takashi MATSUMOTO, Kazutoshi KOBAYASHI
- Organizer
  25th IEEE International Symposium on On-Line Testing and Robust System Design
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-18K11210
[Presentation] 単発DCストレス測定による負バイアス温度不安定性のAC特性を再現可能なモデル2019
- Author(s)
  保坂　巧、西澤真一、岸田　亮、松本高士、小林和淑
- Organizer
  電子情報通信学会　デザインガイア2019
- Data Source
  KAKENHI-PROJECT-18K11210
[Presentation] Process Variation Aware D-Flip-Flop Design using Regression Analysis2018
- Author(s)
  Shinichi Nishizawa and Hidetoshi Onodera
- Organizer
  International Symposium on Quality Electronic Design
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-17K12657
[Presentation] Process Variation Estimation using A Combination of Ring Oscillator Delay and FlipFlop Retention Characteristics2018
- Author(s)
  Takuma Konno, Shinichi Nishizawa and Kazuhito Ito
- Organizer
  International Conference on Microelectronic Test Structures
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-17K12657
[Presentation] An impact of process variation on supply voltage dependence of logic path delay variation2015
- Author(s)
  S. Nishizawa, T. Ishihara, H. Onodera
- Organizer
  International Symposium on VLSI Design, Automation and Test
- Place of Presentation
  Hsinchu(Taiwan)
- Year and Date
  2015-04-27
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-25280014
[Presentation] Variation Tolerant Design of D-Flip-Flops for Low Voltage Circuit Operation2014
- Author(s)
  Shinichi Nishizawa, Tohru Ishihara, Hidetoshi Onodera
- Organizer
  International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU)
- Place of Presentation
  Santa Cruz, CA, USA
- Data Source
  KAKENHI-PROJECT-25280014
[Presentation] Variation-Aware Flip-Flop Energy Optimization for Ultra Low Voltage Operation
- Author(s)
  Tatsuya Kamakari, Shinichi Nishizawa, Tohru Ishihara, Hidetoshi Onodera
- Organizer
  IEEE International System-On-Chip Conference
- Place of Presentation
  Las Vegas, Nevada, USA
- Year and Date
  2014-09-02 – 2014-09-05
- Data Source
  KAKENHI-PROJECT-25280014
[Presentation] Design Methodology of Process Variation Tolerant D-Flip-Flops for Low Voltage Circuit Operation
- Author(s)
  Shinichi Nishizawa, Tohru Ishihara, Hidetoshi Onodera
- Organizer
  IEEE International System-On-Chip Conference
- Place of Presentation
  Las Vegas, Nevada, USA
- Year and Date
  2014-09-02 – 2014-09-05
- Data Source
  KAKENHI-PROJECT-25280014

1. Kobayashi Kazutoshi (70252476)

# of Collaborated Projects: 2 results

# of Collaborated Products: 3 results
2. 松本高士 (70417369)

# of Collaborated Projects: 2 results

# of Collaborated Products: 3 results
3. ONODERA Hidetoshi (80160927)

# of Collaborated Projects: 1 results

# of Collaborated Products: 4 results
4. 土谷亮 (20432411)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
5. 石原亨 (30323471)

# of Collaborated Projects: 1 results

# of Collaborated Products: 4 results
6. Mahfuzul Islam A. K. M. (80762195)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
7. 古田潤 (30735767)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
8. 吉河武文 (60636702)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
9. 請園智玲 (50610060)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
10. Stoffels Steve

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
11. Posthuma Niels

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
12. Li Xiangdong

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
13. Decoutere Stefaan

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results

Nishizawa Shinichi 西澤 真一

NISHIZAWA Sinichi 西澤 真一

Research Projects

Research Products

Co-Researchers

A Tamper-resistant LSI Design Technique Using Dynamic Power Voltage Scaling Control

Principal Investigator

Project Period (FY)

Research Category

Review Section

Research Institution

Reutilization of scan test design for transistor performance degradation diagnosisPrincipal Investigator

Principal Investigator

Project Period (FY)

Research Category

Review Section

Research Institution

高信頼性を要求される常時起動デバイスの特性変動の実測評価と動作レベルのモデル化

Principal Investigator

Project Period (FY)

Research Category

Review Section

Research Institution

Process Variation Estimation using Flip-Flop Retention CharacteristicsPrincipal Investigator

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

An IoT that can keep on running over years efficiently and reliably

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

LSI design methodology that enables robust operation under the supply as low as threshold voltage by self-compensating performance variability

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

[Journal Article] libretto: An Open Cell Timing Characterizer for Open Source VLSI Design2022

Author(s)

Journal Title

Data Source

[Journal Article] Universal NBTI Compact Model Replicating AC Stress/Recovery from a Single-shot Long-term DC Measurement2020

Author(s)

Journal Title

DOI

NAID

Data Source

[Journal Article] Design Methodology for Variation Tolerant D-Flip-Flop Using Regression Analysis2018

Author(s)

Journal Title

DOI

NAID

ISSN

Year and Date

Language

Data Source

[Journal Article] Layout Generator with Flexible Grid Assignment for Area Efficient Standard Cell2015

Author(s)

Journal Title

DOI

NAID

ISSN

Language

Data Source

[Journal Article] Standard Cell Structure with Flexible P/N Well Boundaries for Near-Threshold Voltage Operation2013

Author(s)

Journal Title

DOI

NAID

ISSN

Language

Data Source

[Presentation] ハードウェア設計のオープンソース化に向けたライブラリキャラクタライザの開発2023

Author(s)

Organizer

Data Source

Nishizawa Shinichi 西澤真一

NISHIZAWA Sinichi 西澤真一