KURINO Hiroyuki 栗野浩之

Researcher Number	70282093
External Links
Affiliation (based on the past Project Information) *help	2001 – 2004: Graduate School of Engineering, Tohoku University, Assistant Professor, 大学院・工学研究科, 助教授 1997 – 2000: 東北大学, 大学院・工学研究科, 講師
Review Section/Research Field	Principal Investigator 複合化集積システム / 電子デバイス・機器工学 / Applied physics, general Except Principal Investigator 電子デバイス・機器工学 / Electron device/Electronic equipment / Science and Engineering
Keywords	Principal Investigator LSI / FPGA / 半導体 / 実装技術 / 集積回路 / 3次元集積化技術 / Semiconductor / Parallel Processing / Image Processing / Reconfigurable Logic … More / Packaging / Three Dimensional Integration Technology / Biologically Inspired System / Neuromorphic System / Vision Chip / 半導体技術 / 並列処理 / Reconfiguration / 画像処理 / 医工学 / 医療 / 義眼 / 人工眼 / UHV-CVD / Adsoption / Diffusion / Micro Device / MOSFET / Rapid Thermal Anneal … More Except Principal Investigator 並列処理 / 光導波路 / Optical Interconnection / Wafer Level Integration / Parallel Processing / マイクロバンプ / ウエーハ張り合わせ技術 / システムオンチップ / ウエーハレベルインテグレーション / ウェーハ張り合わせ技術 / LSI集積化技術 / 半導体技術 / 光インターコネクション / システムオンチップ / ウェーハレベルインテグレーション / 極微細結晶粒 / CMOSメモリ / 室温動作 / マルチチャネル / クーロンブロッケード / 単電子メモリ / 単電子素子 / High Speed Data Transfer / Parallel Processing System / Optical Wave Guide / Wafer Bonding / Three-Dimensional Integration / Multiport Shared Memory / Three-Dimensionally Stacked Processor / ウェーハ張り合わせ / 高速データ転送 / 並列処理システム / ウェーハ貼り合わせ / 三次元積層化技術 / マルチポート共有メモリ / 三次元積層型プロセッサ / Large Scale Integration Technology / Semiconductor Technology / Micro-Bump / Wafer Bonding Technology / System on Chip / Optical Waveguide / LSI / Semiconductor / Memory / System on a Chip / Three Dimensional Integration / メモリー / 3次元集積化技術 / WAFER BONDING / 3D INTEGRATION / PARALLEL PROCESSING / NEURAL NETWORK / ASSOCIATION / LEARNING / REAL-TIME / IMAGE PROCESSING / 三次元積層技術 / 張り合わせ技術 / 3次元積層技術 / ニューラルネットワーク / 連想機能 / 学習機能 / リアルタイム / 視覚情報処理 / 高選択異方性エッチング / 不純物拡散 / in-situ不純物ドーピング / CVD低温選択成長 / 高精度エッチング / 不純物ドーピング / 選択成長 / CVD / HBT / MOS / SiGeC / SiGe / 融合素子 Less

High Performance Parallel Processor System Using Three-Dimensional Processor Chip
- Principal Investigator
  
  KOYANAGI Mitsumasa
- Project Period (FY)
  2003 – 2007
- Research Category
  
  Grant-in-Aid for Scientific Research (S)
- Research Field
  
  Electron device/Electronic equipment
- Research Institution
  Tohoku University
人に移植可能な1チップ薄膜化人工眼の開発Principal Investigator
- Principal Investigator
  
  栗野浩之
- Project Period (FY)
  2002 – 2004
- Research Category
  
  Grant-in-Aid for Scientific Research (A)
- Research Field
  
  電子デバイス・機器工学
- Research Institution
  Tohoku University
Wafer-Scale Dynamic Neural-Network-System with Optical Waveguide
- Principal Investigator
  
  KOYANAGI Mitsumasa
- Project Period (FY)
  2000 – 2002
- Research Category
  
  Grant-in-Aid for Scientific Research (A)
- Research Field
  
  電子デバイス・機器工学
- Research Institution
  Tohoku University
Three Dimensional Integrated Field Programmable Gate Array with Genetic ConceptPrincipal Investigator
- Principal Investigator
  
  KURINO Hiroyuki
- Project Period (FY)
  2000 – 2001
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  複合化集積システム
- Research Institution
  TOHOKU UNIVERSITY
人工IV族半導体極微細構造を用いた超高速光・電子デバイスの開発
- Principal Investigator
  
  室田淳一
- Project Period (FY)
  1999 – 2003
- Research Category
  
  Grant-in-Aid for Scientific Research on Priority Areas
- Review Section
  
  Science and Engineering
- Research Institution
  Tohoku University
Wafer Level Parallel Processing System Using Cubic Integration Technology
- Principal Investigator
  
  KOYANAGI Mitsumasa
- Project Period (FY)
  1999 – 2001
- Research Category
  
  Grant-in-Aid for Scientific Research (A)
- Research Field
  
  電子デバイス・機器工学
- Research Institution
  TOHOKU UNIVERSITY
室温で高速動作可能なCMOS融合型マルチ単電子メモリ
- Principal Investigator
  
  小柳光正
- Project Period (FY)
  1998
- Research Category
  
  Grant-in-Aid for Scientific Research on Priority Areas (A)
- Research Institution
  Tohoku University
電流注入型高速熱処理装置による不純物拡散機構の研究Principal Investigator
- Principal Investigator
  
  栗野浩之
- Project Period (FY)
  1998 – 1999
- Research Category
  
  Grant-in-Aid for Encouragement of Young Scientists (A)
- Research Field
  
  Applied physics, general
- Research Institution
  Tohoku University
室温で高速動作可能なマルチ単電子メモリ
- Principal Investigator
  
  KOYANAGI Mitsumasa
- Project Period (FY)
  1997
- Research Category
  
  Grant-in-Aid for Scientific Research on Priority Areas
- Research Institution
  Tohoku University
THREE-DIMENSIONALLY STACKED IMAGE PROCESSING SYSTEM WITH LEARNING FUNCTION
- Principal Investigator
  
  KOYANAGI Mitsumasa
- Project Period (FY)
  1997 – 1999
- Research Category
  
  Grant-in-Aid for Scientific Research (A)
- Research Field
  
  電子デバイス・機器工学
- Research Institution
  TOHOKU UNIVERSITY

All 2005 2004

All Journal Article Presentation

[Journal Article] Design of a Novel Real-Shared Cache Module for High Performance Parallel Processor System on chip2005
- Author(s)
  Zhe LIU, Mitsumasa KOYANAGI, Hiroyuki KURINO
- Journal Title
  
  GESTS International Transaction on Computer Science and Engineering 7(1)
  
  Pages: 13-26
- Data Source
  KAKENHI-PROJECT-15106006
[Journal Article] Design and Evaluation of a High Speed Routing Lookup Architecture2004
- Author(s)
  Jun Zhang, JeoungChill Shim, Hiroyuki Kurino, Mitsumasa Koyanagi
- Journal Title
  
  IEICE Transactions on Communications E87-B
  
  Pages: 406-412
- NAID
  110003222242
- Data Source
  KAKENHI-PROJECT-15106006
[Journal Article] Vision Chip with Electrical Fovea Motion2004
- Author(s)
  Yoshihiro Nakagawa, Jun Deguchi, Hiroyuki Kurino, Mitsumasa Koyanagi, et al.
- Journal Title
  
  Japan Journal of Applied Physics(JJAP) 43・4B
  
  Pages: 1680-1684
- NAID
  10012948257
- Data Source
  KAKENHI-PROJECT-14205051
[Journal Article] Wafer Level Three Dimensional LSI Technology2004
- Author(s)
  Hiroyuki Kurino, Mitsumasa Koyanagi
- Journal Title
  
  Proceedings Twenty First International VLSI Multilevel Interconnection Conference
  
  Pages: 98-104
- Data Source
  KAKENHI-PROJECT-14205051
[Journal Article] Bump Formation Technique for Multi-Chip Module with Optical Interconnection2004
- Author(s)
  H.Kurino, R.Nitobe, J.Shim, M.Koyanagi, et al.
- Journal Title
  
  The Electrochemical Society International Semiconductor Technology Conference
  
  Pages: 94-94
- Data Source
  KAKENHI-PROJECT-15106006
[Journal Article] Ultimate Function Multi-Electrode System(UFMES) Based on Multi-Chip Bonding Technique2004
- Author(s)
  Taiichiro Watanabe, Hiroyuki Kurino, Mitsumasa Koyanagi, et al.
- Journal Title
  
  Extended Abstracts of the 2004 International Conference on Solid State Devices and Materials
  
  Pages: 380-381
- NAID
  10022538809
- Data Source
  KAKENHI-PROJECT-14205051
[Journal Article] Three-Dimensionally Stacked Analog Retinal Prosthesis Chips2004
- Author(s)
  Jun Deguchi, Taiichiro Watanabe, Hiroyuki Kurino, Mitsumasa koyanagi, et al.
- Journal Title
  
  Japan Journal of Applied Physics(JJAP) 43・4B
  
  Pages: 1685-1689
- NAID
  10012948279
- Data Source
  KAKENHI-PROJECT-14205051
[Journal Article] Retinal Prosthesis System with Telemetry Circuit Controlled by Human Eyelid Movement2004
- Author(s)
  Jun Deguchi, Hiroyuki Kurino, Makoto Tamai, Mitsumasa Koyanagi, et al.
- Journal Title
  
  Extended Abstracts of the 2004 International Conference on Solid State Devices and Materials
  
  Pages: 350-351
- NAID
  10022538727
- Data Source
  KAKENHI-PROJECT-14205051
[Journal Article] Design of a Novel Real-Shared Memory Module for High Performance Parallel Processor System with Shared Memory2004
- Author(s)
  Z.Liu, J.Shim, H.Kurino, Mitsumasa Koyanagi
- Journal Title
  
  International Conference on Advanced Information Networking and Applications
  
  Pages: 241-244
- Data Source
  KAKENHI-PROJECT-15106006
[Journal Article] Optimization of Vertical Interconnection in 3D LSI Using Wire-Length Distribution2004
- Author(s)
  T.Nakamura, Y.Yamada, T.Ono, H.Kurino, M.Koyanagi, et al.
- Journal Title
  
  Conference Proceedings AMC XIX
  
  Pages: 35-43
- Data Source
  KAKENHI-PROJECT-15106006
[Journal Article] Technology for Three Dimensional Integrated System-on-a-Chip2004
- Author(s)
  Hiroyuki Kurino, Mitsumasa Koyanagi
- Journal Title
  
  Proceedings of 7^<th> International Conference on Solid-State and Integrated Circuits Technology
  
  Pages: 599-602
- Data Source
  KAKENHI-PROJECT-15106006
[Journal Article] Technology for Three Dimensional Integrated System-on-a-Chip2004
- Author(s)
  Hiroyuki Kurino, Mitsumasa Koyanagi
- Journal Title
  
  Proceedings of 7^<th> International Conference on Solid-State and Integrated Circuits Technology
  
  Pages: 599-602
- Data Source
  KAKENHI-PROJECT-14205051
[Journal Article] Novel Silicon On Insulator Metal Oxide Semiconductor Field Effect Transistors with Buried Back Gate2004
- Author(s)
  Hyuckjae Oh, Hoon Choi, Hiroyuki Kurino, Mitsumasa Koyanagi, et al.
- Journal Title
  
  Japanese Journal of Applied Physics 43
  
  Pages: 2140-2144
- NAID
  10012949608
- Data Source
  KAKENHI-PROJECT-15106006
[Presentation] Wafer Level Three Dimensional LSI Technology2004
- Author(s)
  Hiroyuki, Kurino and Mitsumasa Koyanagi
- Organizer
  Proceedings International VLSI Multilevel Interconnection Conference (VMIC)
- Place of Presentation
  Hawaii, USA
- Year and Date
  2004-09-30
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-15106006
[Presentation] Bump Formation Technique for Multi-Chip Module with Optical Interconnection2004
- Author(s)
  H. Kurino
- Organizer
  Electrochemical Society International Semiconductor Technology Conference (ISTC2004)
- Place of Presentation
  Shanghai, China
- Year and Date
  2004-09-16
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-15106006
[Presentation] Deep Si Hole Etching Technique for Super Chip Integration2004
- Author(s)
  H. Kurino
- Organizer
  Electrochemical Society International Semiconductor Technology Conference (ISTC2004)
- Place of Presentation
  Shanghai, China
- Year and Date
  2004-09-17
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-15106006
[Presentation] Technology for Three Dimensional Integrated System-on-a Chip2004
- Author(s)
  Hiroyuki, Kurino and Mitsumasa Koyanagi
- Organizer
  Proceedings of International Conference on Solid-State and Integrated Circuits Technology (ICSICT)
- Place of Presentation
  Beijing, China
- Year and Date
  2004-10-21
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-15106006
[Presentation] Technology for Three Dimensional Integrated System-on-a Chip2004
- Author(s)
  Hiroyuki, Kurino and Mitsumasa Koyanagi
- Organizer
  Proceedings of International Conference on Solid-State and Integrated Circuits Technology (ICSECT)
- Place of Presentation
  Beijing, China
- Year and Date
  2004-10-21
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-15106006

1. KOYANAGI Mitsumasa (60205531)

# of Collaborated Projects: 9 results

# of Collaborated Products: 16 results
2. HANE Kazuhiro (50164893)

# of Collaborated Projects: 4 results

# of Collaborated Products: 0 results
3. ESASHI Masayoshi (20108468)

# of Collaborated Projects: 3 results

# of Collaborated Products: 0 results
4. 柳基鎬 (20270811)

# of Collaborated Projects: 2 results

# of Collaborated Products: 0 results
5. 沈正七 (00333849)

# of Collaborated Projects: 2 results

# of Collaborated Products: 0 results
6. 朴起台 (50312608)

# of Collaborated Projects: 2 results

# of Collaborated Products: 0 results
7. MIYAKAWA Nobuaki

# of Collaborated Projects: 2 results

# of Collaborated Products: 0 results
8. NAKAMURA Tadao (80005454)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
9. SAMUKAWA Seiji (30323108)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
10. TANAKA Tetsu (40417382)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
11. FUKUSHIMA Takafumi (10374969)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
12. 室田淳一 (70182144)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
13. 土屋敏章 (20304248)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
14. 松浦孝 (60181690)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
15. 玉井信 (90004720)

# of Collaborated Projects: 1 results

# of Collaborated Products: 1 results
16. 阿部俊明 (90191858)

# of Collaborated Projects: 1 results

# of Collaborated Products: 2 results
17. 杉山直治

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
18. 小野昭一

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
19. 洪連基

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
20. HONG Young-gi

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results

KURINO Hiroyuki 栗野 浩之

Research Projects

Research Products

Co-Researchers

High Performance Parallel Processor System Using Three-Dimensional Processor Chip

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

人に移植可能な1チップ薄膜化人工眼の開発Principal Investigator

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

Wafer-Scale Dynamic Neural-Network-System with Optical Waveguide

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

Three Dimensional Integrated Field Programmable Gate Array with Genetic ConceptPrincipal Investigator

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

人工IV族半導体極微細構造を用いた超高速光・電子デバイスの開発

Principal Investigator

Project Period (FY)

Research Category

Review Section

Research Institution

Wafer Level Parallel Processing System Using Cubic Integration Technology

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

室温で高速動作可能なCMOS融合型マルチ単電子メモリ

Principal Investigator

Project Period (FY)

Research Category

Research Institution

電流注入型高速熱処理装置による不純物拡散機構の研究Principal Investigator

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

室温で高速動作可能なマルチ単電子メモリ

Principal Investigator

Project Period (FY)

Research Category

Research Institution

THREE-DIMENSIONALLY STACKED IMAGE PROCESSING SYSTEM WITH LEARNING FUNCTION

Principal Investigator

Project Period (FY)

Research Category

Research Field

Research Institution

[Journal Article] Design of a Novel Real-Shared Cache Module for High Performance Parallel Processor System on chip2005

Author(s)

Journal Title

Data Source

[Journal Article] Design and Evaluation of a High Speed Routing Lookup Architecture2004

Author(s)

Journal Title

NAID

Data Source

[Journal Article] Vision Chip with Electrical Fovea Motion2004

Author(s)

Journal Title

NAID

Data Source

[Journal Article] Wafer Level Three Dimensional LSI Technology2004

Author(s)

Journal Title

Data Source

KURINO Hiroyuki 栗野浩之