Imai Masashi 今井雅

… Alternative Names

IMAI MASASHI 今井雅

IMAI Masashi 今井雅

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Researcher Number	70323665
Other IDs
External Links
Affiliation (Current)	2025: 弘前大学, 理工学研究科, 教授
Affiliation (based on the past Project Information) *help	2015 – 2024: 弘前大学, 理工学研究科, 教授 2009: 駒場オープンラボラトリー, 特任准教授 2007 – 2009: 東京大学, 駒場オープンラボラトリー, 特任准教授 2007: The University of Tokyo, 駒場オープンラボラトリー, 特任教員・特任准教授 2007: 東京大学, 駒場オープンラボラトリー, 特任教員特任准教授 … More 2006: 東京大学, 駒場オープンラボラトリー, 特任教員(特任助教授) 2006: The University of Tokyo, Komaba Open Laboratory, Specially Appointed Associate Professor, 駒場オープンラボラトリー, 特任教員・特任助教授 2005: 東京大学, 先端科学技術研究センター, 科学技術振興特任教員(特任助教授) 2004: 東京大学, 先端科学技術研究センター, 助手 2001 – 2002: 東京大学, 先端科学技術研究センター, 助手 Less
Review Section/Research Field	Principal Investigator Computer system/Network / Sections That Are Subject to Joint Review: Basic Section02070:Japanese linguistics-related , Basic Section02090:Japanese language education-related / Basic Section 02090:Japanese language education-related / Basic Section 02070:Japanese linguistics-related / Basic Section 60070:Information security-related / Information security Except Principal Investigator Computer system/Network / Computer system / Medium-sized Section 60:Information science, computer engineering, and related fields / Communication/Network engineering / 計算機科学
Keywords	Principal Investigator 非同期式回路 / ハードウェアトロイ / 遅延変動 / 津軽弁アーカイブ / 文字音声変換システム / 人工知能 / 津軽弁 / 方言 / フォールトトレラント技術 / 高信頼計算機システム … More / 深層学習 / ハードウェア・ソフトウェア協調 / フォールトトレランス / 1クラスSVM / 外れ値検知アルゴリズム / 誤り検知 / 運用時診断情報 / ディペンダブルコンピューティング / セキュリティ / 低電圧 / 低ノイズ / セルライブラリ / AES暗号化回路 / 線形帰還シフトレジスタ / ランダム遅延素子 / 束データ方式データ転送 / 2phaseハンドシェイクプロトコル / 耐タンパ / サイドチャネル攻撃 / 低消費電力 / 半導体超微細化 / 計算機システム / SDIモデル / 動的電圧制御 / マルチタイミング・インタフェース … More Except Principal Investigator 計算機システム / 脳型ハードウェア / 不揮発性ロジック / 非同期式回路 / CAD / Verilog RTL / SDIモデル / AINOS / 低消費電力 / ばらつき補正機能 / はらつき補正機能 / MTJデバイス / ロジックLSI / 高速・低電力回路技術 / ダイ・ハード回路 / IoT応用 / ダーク・シリコンLSI / CMOS/MTJハイブリッド回路 / 不揮発ロジック / 脳型情報処理 / クロック埋め込み / 低消費電力化 / シリアル通信 / 通信方式 / 同期/非同期インタフェース / 同期／非同期インタフェース / PLL/DLLレス / 4値レベル信号 / 細粒度パワーゲーティング / 高速シリアル通信 / 1-out-of-4 Coding / SDI Model / Asynchronous System / Delay Variation / Low Power Consumption / Task Scheduling / Multi-Processor SoC / Hetero-Timing VLSI / ディペンダブルシステム / 情報システム / VLSIシステム / ヘテロタイミング / 1-out-of-4符号 / 非同期式システム / 遅延変動 / タスクスケジューリング / マルチプロセッサSoC / ヘテロタイミングVLSI / DI Interface / Asynchronous Circuit / SDl model / Locally timed VLSI / メモリアーキテクチャ / ダブルバッファDDL / STG / 非同期式ライブラリ / 事象駆動原理 / 同期・非同期融合型VLSIシステム / 暗号化回路 / 2線2相式データ転送 / DIインタフェース / 非同期式制御回路 / 設計支援CADシステム / 同期・非同期融合型VLSI / ディペンダブル VLSI / ディペンダブルVLSI / 半導体超微細化 / 命令時効制御 / 命令実行制御 / パワースイッチ / 動的リーク電力 Less

人工知能を活用した津軽弁から共通語への音声・文字情報変換システムの基盤技術開発Principal Investigator
- Principal Investigator
  
  今井雅
- Project Period (FY)
  2023 – 2026
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Review Section
  
  Basic Section 02070:Japanese linguistics-related
  Basic Section 02090:Japanese language education-related
  Sections That Are Subject to Joint Review: Basic Section02070:Japanese linguistics-related , Basic Section02090:Japanese language education-related
- Research Institution
  Hirosaki University
Development of a high-speed and ultra-low-power die-hard logic LSI fundamental technology for IoT applications
- Principal Investigator
  
  羽生貴弘
- Project Period (FY)
  2021 – 2024
- Research Category
  
  Grant-in-Aid for Scientific Research (A)
- Review Section
  
  Medium-sized Section 60:Information science, computer engineering, and related fields
- Research Institution
  Tohoku University
Establishment and Implementation of Multilayered Collaborative Methods to Ensure Security during Operation against Hardware TrojanPrincipal Investigator
- Principal Investigator
  
  Imai Masashi
- Project Period (FY)
  2020 – 2022
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Review Section
  
  Basic Section 60070:Information security-related
- Research Institution
  Hirosaki University
脳型コンピューティング向けダーク・シリコンロジックLSIの基盤技術開発
- Principal Investigator
  
  羽生貴弘
- Project Period (FY)
  2016
- Research Category
  
  Grant-in-Aid for Scientific Research (A)
- Research Field
  
  Computer system
- Research Institution
  Tohoku University
Fundamental Technology Development of Dark-Silicon Logic LSI for Brain-Inspired Computing
- Principal Investigator
  
  Hanyu Takahiro
- Project Period (FY)
  2016 – 2020
- Research Category
  
  Grant-in-Aid for Scientific Research (S)
- Research Field
  
  Computer system
- Research Institution
  Tohoku University
Development of Tamper-resistant Asynchronous Processors for Avoiding Information Leakage using Dynamic Analysis MethodsPrincipal Investigator
- Principal Investigator
  
  Imai Masashi
- Project Period (FY)
  2015 – 2017
- Research Category
  
  Grant-in-Aid for Scientific Research (C)
- Research Field
  
  Information security
- Research Institution
  Hirosaki University
Study on Implementation for Greatly Reducing Power Dissipation of Serial Communication Mechanisms
- Principal Investigator
  
  YONEDA Tomohiro
- Project Period (FY)
  2015 – 2017
- Research Category
  
  Grant-in-Aid for Scientific Research (A)
- Research Field
  
  Communication/Network engineering
- Research Institution
  National Institute of Informatics
Dependable VLSI design methodology which conquers engineering limits due to shrinking device size
- Principal Investigator
  
  NANYA Takashi
- Project Period (FY)
  2007 – 2009
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  Computer system/Network
- Research Institution
  The University of Tokyo
Low-Power High-Performance VLSI design using 1-out-of-4 codePrincipal Investigator
- Principal Investigator
  
  IMAI Masashi
- Project Period (FY)
  2007 – 2008
- Research Category
  
  Grant-in-Aid for Young Scientists (B)
- Research Field
  
  Computer system/Network
- Research Institution
  The University of Tokyo
Architecture and Circuit-Level Co-Design for Low-Power High-Performance Microprocessor
- Principal Investigator
  
  NAKAMURA Hiroshi
- Project Period (FY)
  2006 – 2008
- Research Category
  
  Grant-in-Aid for Scientific Research (A)
- Research Field
  
  Computer system/Network
- Research Institution
  The University of Tokyo
Architecture and Design Method for High-Quality Hetero-Timing VLSI Systems
- Principal Investigator
  
  NANYA Takashi
- Project Period (FY)
  2005 – 2006
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  Computer system/Network
- Research Institution
  The University of Tokyo
電圧可変マルチタイミング・インタフェースの設計技術に関する研究Principal Investigator
- Principal Investigator
  
  今井雅
- Project Period (FY)
  2004 – 2005
- Research Category
  
  Grant-in-Aid for Young Scientists (B)
- Research Field
  
  Computer system/Network
- Research Institution
  The University of Tokyo
Design Methodology for Advanced VLSI Systems with Heterogeneous Timing
- Principal Investigator
  
  NANYA Takashi
- Project Period (FY)
  2001 – 2002
- Research Category
  
  Grant-in-Aid for Scientific Research (B)
- Research Field
  
  計算機科学
- Research Institution
  The University of Tokyo

All 2024 2023 2022 2021 2020 2018 2017 2016 2015 2009 2008 2007 2006 2005 2004

All Journal Article Presentation

[Journal Article] Development of an Automatic Chronological Record Creation System Using Voice AI to Facilitate Information Aggregation and Sharing in the Event of a Disaster2023
- Author(s)
  Tsujiguchi T, Imai M, Kimura S, Koiwa T, Naraoka M, Hanada H, Yamanouchi K, Kashiwakura I, Ito K
- Journal Title
  
  Disaster medicine and public health preparedness
  
  Volume: 17
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-23K25330
[Journal Article] MTJ-Based Asynchronous Circuits for Re-Initialization Free Computing against Power Failures2018
- Author(s)
  N. Onizawa, M. Imai, T. Yoneda, and T. Hanyu
- Journal Title
  
  Microelectronics Journal
  
  Volume: 82 Pages: 46-61
- DOI
  10.1016/j.mejo.2018.10.012
- Peer Reviewed
- Data Source
  KAKENHI-PROJECT-16H06300
[Journal Article] ラッチベース非同期式回路のスキャンテスト2016
- Author(s)
  寺山恭平, 今井雅
- Journal Title
  
  電子情報通信学会論文誌
  
  Volume: J99-A
- Peer Reviewed / Acknowledgement Compliant
- Data Source
  KAKENHI-PROJECT-15K00179
[Journal Article] A design method of high performance and low power functional units considering delay variations2006
- Author(s)
  K.Watanabe, M.Imai, M.Kondo, H.Nakamura, T.Nanya
- Journal Title
  
  IEICE Trans. on Fundamentals Vol.E89-A, No.12
  
  Pages: 3519-3528
- NAID
  110007537855
- Data Source
  KAKENHI-PROJECT-17300013
[Journal Article] A novel design method for asynchronous bundled-data transfer circuits considering characteristics of delay variations2006
- Author(s)
  M.Imai, T.Nanya
- Journal Title
  
  Proc. ASYNC2006
  
  Pages: 68-77
- Data Source
  KAKENHI-PROJECT-17300013
[Journal Article] Design Method of High Performance and Low Power Functional Units Considering Delay Variations2006
- Author(s)
  K. Watanabe, M. Imai, M. Kondo, H. Nakamura, and Takashi Nanya
- Journal Title
  
  IEICE Trans on Fundamentals Vol.E89-A, No.12
  
  Pages: 3519-3528
- NAID
  110007537855
- Data Source
  KAKENHI-PROJECT-18200002
[Journal Article] Dynamic Multi-grain Pipelined Interconnect2006
- Author(s)
  Masashi Imai, T.Azuma, K.Watanabe, M.Kondo, H.Nakamura, T.Nanya
- Journal Title
  
  DATE06 Friday Workshop Notes
- Data Source
  KAKENHI-PROJECT-16700051
[Journal Article] A Novel Design Method for Asynchronous Bundled-data Transfer Circuits Considering Characteristics of Delay Variations2006
- Author(s)
  Masashi Imai, Takashi Nanya
- Journal Title
  
  Proc.of Async2006 12th
  
  Pages: 68-77
- Data Source
  KAKENHI-PROJECT-16700051
[Journal Article] A Novel Design Method for Asynchronous Bundled-data Transfer Circuits Considering Characteristics of Delay Variations2006
- Author(s)
  Masashi Imai
- Journal Title
  
  Proc.Async2006
  
  Pages: 68-77
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-17300013
[Journal Article] 1 out of 4符号を用いた低消費電力非同期式回路設計2006
- Author(s)
  藤井智弘, 今井雅, 中村宏, 南谷崇
- Journal Title
  
  電子情報通信学会集積回路研究会資料 Vol.106, No.27
  
  Pages: 19-24
- NAID
  110004824024
- Data Source
  KAKENHI-PROJECT-17300013
[Journal Article] A Novel Design Method for Asynchronous Bundled-data Transfer Circuits Considering Characteristics of Delay Variations2006
- Author(s)
  Masashi Imai
- Journal Title
  
  Proc. Async2006
  
  Pages: 68-77
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-17300013
[Journal Article] GALS型SoCの低消費電力化のためのタスクスケジューリング手法2005
- Author(s)
  渡辺亮, 近藤正章, 今井雅, 中村宏, 南谷崇
- Journal Title
  
  情報処理学会アーキテクチャ研究会 2005-ARC-164
  
  Pages: 61-66
- Data Source
  KAKENHI-PROJECT-17300013
[Journal Article] A novel design method using delay-variation-aware cell libraries for asynchronous bundled-data transfer circuits2005
- Author(s)
  M.Imai, C.Kogure, T.Nanya
- Journal Title
  
  ITC-CSCC
  
  Pages: 441-442
- Data Source
  KAKENHI-PROJECT-17300013
[Journal Article] BIT単位の遅延変動を考慮した高性能低消費電力演算回路の設計2005
- Author(s)
  渡邊孝一, 今井雅, 近藤正章, 中村宏, 南谷崇
- Journal Title
  
  電子情報通信学会VLD研究会 VLD2005-59,ICD2005-154,DC2005-36
  
  Pages: 37-42
- NAID
  110004018519
- Data Source
  KAKENHI-PROJECT-17300013
[Journal Article] 遅延変動特性を考慮したタイミング信号設計方式に関する検討2005
- Author(s)
  今井雅, 渡邊孝一, 近藤正章, 中村宏, 南谷崇
- Journal Title
  
  電子情報通信学会技術研究報告 VLD2005-59
  
  Pages: 31-36
- NAID
  110004018518
- Data Source
  KAKENHI-PROJECT-16700051
[Journal Article] A Novel Design Method using Delay-Variation-Aware Cell Libraries for Asynchronous Bundled-data Transfer Circuits2005
- Author(s)
  Masashi Imai
- Journal Title
  
  Proc.ITC-CSCC2005 Vol.2
  
  Pages: 441-442
- Description
  「研究成果報告書概要(欧文)」より
- Data Source
  KAKENHI-PROJECT-17300013
[Journal Article] 遅延変動特性を考慮したタイシング信号設計方式に関する検討2005
- Author(s)
  今井雅, 渡邊孝一, 近藤正章, 中村宏, 南谷崇
- Journal Title
  
  電子情報通信学会VLD研究会 VLD2005-59,ICD2005-154,DC2005-36
  
  Pages: 31-36
- Data Source
  KAKENHI-PROJECT-17300013
[Journal Article] A Novel Design Method using Delay-Variation-Aware Cell Libraries for Asynchronous Bundled-data Transfer Circuits2005
- Author(s)
  Masashi Imai
- Journal Title
  
  Proc. ITC-CSCC2005 Vol.2
  
  Pages: 441-442
- Description
  「研究成果報告書概要(和文)」より
- Data Source
  KAKENHI-PROJECT-17300013
[Journal Article] 遅延変動を考慮したスタンダードセルライブラリの構築と評価2004
- Author(s)
  小暮千賀明, 今井雅, 近藤正章, 中村宏, 南谷崇
- Journal Title
  
  電子情報通信学会技術研究報告 VLD2004-63
  
  Pages: 13-18
- NAID
  110003318178
- Data Source
  KAKENHI-PROJECT-16700051
[Journal Article] Evaluation of Delay Variation in Asynchronous Circuits Based on the Scalable-Delay-Insensitive Model2004
- Author(s)
  Masashi Imai, Metehan Ozcan, Takashi Nanya
- Journal Title
  
  Proc.of Async2004
  
  Pages: 62-71
- Data Source
  KAKENHI-PROJECT-16700051
[Presentation] Development of Tsugaru Dialect Dictionary Management System2024
- Author(s)
  Ryota Sato, Masashi Imai
- Organizer
  SASIMI2024
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-23K25330
[Presentation] Development of Snowfall Prediction System using X-band Weather Radar and Artificial Intelligence2024
- Author(s)
  Atsushi Onodera, Masashi Imai
- Organizer
  SASIMI2024
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-23K25330
[Presentation] 外れ値検知アルゴリズムによるハードウェアトロイ内包計算機に生じる誤りの検知2023
- Author(s)
  葛西巧朗, 今井雅
- Organizer
  情報処理学会東北支部研究報告
- Data Source
  KAKENHI-PROJECT-20K11805
[Presentation] 非同期式回路を用いた電源喪失対応 VLSI システムの実現2023
- Author(s)
  今井雅
- Organizer
  電子情報通信学会VLD研究会
- Data Source
  KAKENHI-PROJECT-20K11805
[Presentation] Development of Diagnosis-based Hardware Trojan Tolerate System2022
- Author(s)
  Takuro Kasai, Masashi Imai
- Organizer
  SASIMI2022
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-20K11805
[Presentation] ハードウェアトロイの挿入された計算機が齎す誤りの検知と対策,2022
- Author(s)
  葛西巧朗, 今井雅
- Organizer
  電子情報通信学会VLD研究会
- Data Source
  KAKENHI-PROJECT-20K11805
[Presentation] Novel Circuit Structure of Basic Standard Cells against Glitches2021
- Author(s)
  Masashi Imai
- Organizer
  ASYNC2021
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-20K11805
[Presentation] An Energy Efficient Processor Applicable to Continuous SPO2 Monitoring2021
- Author(s)
  Toshiki Kanamoto, Kan Hatakeyama, Seria Kasai, Masashi Imai, Atsushi Kurokawa, Masami Fukushima, Koichi Kitagishi, Seijin Nakayama, Hideki Ishihara
- Organizer
  GCCE
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-20K11805
[Presentation] Prediction of Winter Precipitation from X-band Weather Radar Observations Using Deep Learning2021
- Author(s)
  Mio Maeda, Akiyo Yatagai, Masashi Imai
- Organizer
  AOGS2021
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-20K11805
[Presentation] Asynchronous Building Blocks and Their Application for Ultra Low Energy Devices2020
- Author(s)
  Masashi Imai
- Organizer
  NOLTA2020
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-20K11805
[Presentation] Novel Delay Elements for Bundled-Data Transfer Circuits Based on Two-Phase Handshaking Protocols2018
- Author(s)
  Masashi Imai, Shinichiro Akasaka, Tomohiro Yoneda
- Organizer
  24th IEEE International Symposium on Asynchronous Circuits and Systems
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-15H02254
[Presentation] Minimum Power Supply Asynchronous Circuits for Re-initialization Free Computing2018
- Author(s)
  M. Imai, N. Onizawa, T. Hanyu, and T. Yoneda
- Organizer
  21st Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-16H06300
[Presentation] Minimum Power Supply Asynchronous Circuits for Re-initialization Free Computing2018
- Author(s)
  Masashi Imai, Naoya Onizawa, Takahiro Hanyu, Tomohiro Yoneda
- Organizer
  SASIMI2018
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-15K00179
[Presentation] ランダム遅延素子を用いた耐タンパ非同期式回路の設計2018
- Author(s)
  豊嶋太樹, 金本俊幾, 黒川敦, 今井雅
- Organizer
  情報処理学会東北支部研究報告
- Data Source
  KAKENHI-PROJECT-15K00179
[Presentation] ランダム遅延素子を用いた非同期式回路の耐タンパ性向上に関する一考察2017
- Author(s)
  豊嶋太樹, 金本俊幾, 黒川敦, 今井雅
- Organizer
  平成29年度電気関係学会東北支部連合大会
- Data Source
  KAKENHI-PROJECT-15K00179
[Presentation] A Study on Hardware Trojan Insertion into Asynchronous NoC Router2017
- Author(s)
  Koutaro Inaba, Tomohiro Yoneda, Masashi Imai
- Organizer
  Async2017
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-15K00179
[Presentation] MTJ-Based Asynchronous Circuits for Re-initialization Free Computing against Power Failures2017
- Author(s)
  N. Onizawa, M. Imai, T. Hanyu, and T. Yoneda
- Organizer
  23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-16H06300
[Presentation] A Study on Replica Delay Circuit of Bundled-Data Transfer Asynchronous Circuits2017
- Author(s)
  Shinichiro Akasaka, Toshiki Kanamoto, Atsushi Kurokawa, Masashi Imai
- Organizer
  Proc. Tohoku-Section Joint Convention of Institutes of Electrical and Information Engineers (IEEE Student Session)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-15K00179
[Presentation] 非同期式オンチップネットワークルータに対するハードウェアトロイ挿入2017
- Author(s)
  稲葉光太郎, 今井雅
- Organizer
  電子情報通信学会ハードウェアセキュリティ研究会
- Data Source
  KAKENHI-PROJECT-15K00179
[Presentation] Hardware Trojan Comparison between Synchronous and Asynchronous Circuits2017
- Author(s)
  Koutaro Inaba, Toshiki Kanamoto, Atsushi Kurokawa, Masashi Imai
- Organizer
  Tohoku-Section Joint Convention of Institutes of Electrical and Information Engineers (IEEE Student Session)
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-15K00179
[Presentation] Power-Gated Single-Track Asynchronous Circuits Using Three-Terminal MTJ-Based Nonvolatile Devices for Energy Harvesting Systems2016
- Author(s)
  Tomohiro Yoneda, Naoya Onizawa, Masashi Imai, Takahiro Hanyu
- Organizer
  ASYNC2016
- Place of Presentation
  Porto Alegre, Brazil
- Year and Date
  2016-05-08
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-15K00179
[Presentation] 非同期式回路に対するハードウェアトロイ挿入に関する一考察2016
- Author(s)
  稲葉光太郎, 今井雅
- Organizer
  電子情報通信学会ハードウェアセキュリティフォーラム
- Place of Presentation
  武蔵大学（東京都練馬区）
- Data Source
  KAKENHI-PROJECT-15K00179
[Presentation] ランダム遅延素子を用いた耐タンパ非同期式パイプライン回路2016
- Author(s)
  豊嶋太樹, 黒川敦, 今井雅
- Organizer
  電子情報通信学会 VLD
- Place of Presentation
  弘前市立観光館（青森県弘前市）
- Year and Date
  2016-06-16
- Data Source
  KAKENHI-PROJECT-15K00179
[Presentation] A Task Allocation Method for the DTTR Scheme based on Task Scheduling of Fault Patterns2016
- Author(s)
  Hiroshi Saito, Masashi Imai, Tomohiro Yoneda
- Organizer
  ISCAS2016
- Place of Presentation
  Montreal, Canada
- Year and Date
  2016-05-22
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-15K00179
[Presentation] The Synchronous vs. Asynchronous NoC Routers: An Apple-to-Apple Comparison between Synchronous and Transition Signaling Asynchronous Designs2016
- Author(s)
  Masashi Imai, Thiem Van Chu, Kenji Kise, Tomohiro Yoneda
- Organizer
  NOCS2016
- Place of Presentation
  奈良春日野国際フォーラム（奈良県奈良市）
- Year and Date
  2016-08-31
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-15K00179
[Presentation] Can Asynchronous Circuits Tolerate Hardware Trojan Threat?2016
- Author(s)
  Masashi Imai, Tomohiro Yoneda
- Organizer
  ASYNC2016
- Place of Presentation
  Porto Alegre, Brazil
- Year and Date
  2016-05-08
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-15K00179
[Presentation] Random Delay Elements for Tamper Resistant Asynchronous Circuits based on 2-phase Handshaking Protocol2016
- Author(s)
  Daiki Toyoshima, Tatsuya Ishikawa, Atsushi Kurokawa, Masashi Imai
- Organizer
  SASIMI2016
- Place of Presentation
  京都リサーチパーク（京都府京都市）
- Year and Date
  2016-10-24
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-15K00179
[Presentation] Hardware Trojan Insertion Difficulties into Synchronous and Asynchronous Circuits2016
- Author(s)
  Masashi Imai, Tomohiro Yoneda
- Organizer
  SASIMI2016
- Place of Presentation
  京都リサーチパーク（京都府京都市）
- Year and Date
  2016-10-24
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-15K00179
[Presentation] 多数決イネーブルラッチを用いた非同期式回路の耐故障性に関する一検討2016
- Author(s)
  今井雅, 米田友洋
- Organizer
  電子情報通信学会 VLD
- Place of Presentation
  弘前市立観光館（青森県弘前市）
- Year and Date
  2016-06-16
- Data Source
  KAKENHI-PROJECT-15K00179
[Presentation] A Study on Byzantine Fault Tolerant Systems using SCore Cluster System Software2016
- Author(s)
  Takeru Nanao, Atsushi Kurokawa, Masashi Imai
- Organizer
  平成28年度電気関係学会東北支部連合大会, IEEE Student Session
- Place of Presentation
  東北工業大学（宮城県仙台市）
- Year and Date
  2016-08-30
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-15K00179
[Presentation] Power-Gated Single-Track Asynchronous Circuits Using Three-Terminal MTJ-Based Nonvolatile Devices for Energy Harvesting Systems2016
- Author(s)
  Tomohiro Yoneda, Naoya Onizawa, Masashi Imai, Takahiro Hanyu,
- Organizer
  Async2016 Fresh ideas track
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-16H06300
[Presentation] Dependable Real-Time Task Execution Scheme for a Many-Core Platform2015
- Author(s)
  Tomohiro Yoneda, Masashi Imai, Hiroshi Saito, Kenji Kise
- Organizer
  DFT2015
- Place of Presentation
  アマースト（アメリカ）
- Year and Date
  2015-10-12
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-15K00179
[Presentation] Peak Current Reduction Method of Digital Bandpass Filter using Asynchronous MOUSETRAP Pipeline Circuits2015
- Author(s)
  Tatsuya Ishikawa, Atsushi Kurokawa, Masashi Imai
- Organizer
  平成27年度電気関係学会東北支部連合大会 IEEE Student Session
- Place of Presentation
  岩手県立大学（岩手）
- Year and Date
  2015-08-26
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-15K00179
[Presentation] A New Encoding Mechanism for Low Power Inter-Chip Serial Communication in Asynchronous Circuits2015
- Author(s)
  Tomohiro Yoneda, Masashi Imai
- Organizer
  The 33rd IEEE International Conference on Computer Design
- Place of Presentation
  New York University, New York City, USA
- Year and Date
  2015-10-18
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-15H02254
[Presentation] QDIモデルに基づく非同期式VLSIの低電圧特性の評価2015
- Author(s)
  田近龍平, 黒川敦, 今井雅
- Organizer
  電子情報通信学会技術研究報告 VLD2015-67,DC2015-63
- Place of Presentation
  長崎（長崎）
- Year and Date
  2015-12-01
- Data Source
  KAKENHI-PROJECT-15K00179
[Presentation] A New Encoding Mechanism for Low Power Inter-Chip Serial Communication in Asynchronous Circuits2015
- Author(s)
  Tomohiro Yoneda, Masashi Imai
- Organizer
  ICCD2015
- Place of Presentation
  ニューヨーク（アメリカ）
- Year and Date
  2015-10-18
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-15K00179
[Presentation] DTTR方式による高信頼目にコアシステムの性能評価2015
- Author(s)
  今井雅, 米田友洋
- Organizer
  FTC研究会
- Place of Presentation
  浅虫温泉（青森）
- Year and Date
  2015-07-16
- Data Source
  KAKENHI-PROJECT-15K00179
[Presentation] マルチコアシステムにおける信頼度向上手法のマルコフモデルによる性能評価2015
- Author(s)
  今井雅, 米田友洋
- Organizer
  電子情報通信学会技術研究報告 DC2015-20
- Place of Presentation
  機械振興会館（東京）
- Year and Date
  2015-06-16
- Data Source
  KAKENHI-PROJECT-15K00179
[Presentation] Performance Comparison between Asynchronous Self-timed Circuits and Synchronous Circuits under Ultra Low Voltage Environment2015
- Author(s)
  Ryuhei Tachika, Atsushi Kurokawa, Masashi Imai
- Organizer
  平成27年度電気関係学会東北支部連合大会 IEEE Student Session
- Place of Presentation
  岩手県立大学（岩手）
- Year and Date
  2015-08-26
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-15K00179
[Presentation] ラッチを用いた非同期式パイプライン回路の機能テストに関する一検討2015
- Author(s)
  豊嶋太樹, 寺山恭平, 黒川敦, 今井雅
- Organizer
  電子情報通信学会技術研究報告 DC2015-19
- Place of Presentation
  機械振興会館（東京）
- Year and Date
  2015-06-16
- Data Source
  KAKENHI-PROJECT-15K00179
[Presentation] DTTR方式による高信頼マルチコアシステムの性能評価に関する一考察2015
- Author(s)
  佐藤謙介, 齋藤寛, 米田友洋, 今井雅
- Organizer
  情報処理学会研究報告 Vol.2015-SLDM-172
- Place of Presentation
  仙台（宮城）
- Year and Date
  2015-10-26
- Data Source
  KAKENHI-PROJECT-15K00179
[Presentation] 非同期式回路を用いたピーク電流抑制型バンドパスフィルタの実装と評価2015
- Author(s)
  石川達也, 黒川敦, 今井雅
- Organizer
  電子情報通信学会技術研究報告 VLD2015-68,DC2015-64
- Place of Presentation
  長崎（長崎）
- Year and Date
  2015-12-01
- Data Source
  KAKENHI-PROJECT-15K00179
[Presentation] Comparing Permanent and Transient Fault Tolerance of Multiple-core based Dependable ECUs2015
- Author(s)
  Masashi Imai, Tomohiro Yoneda
- Organizer
  CARS2015
- Place of Presentation
  パリ（フランス）
- Year and Date
  2015-09-06
- Int'l Joint Research
- Data Source
  KAKENHI-PROJECT-15K00179
[Presentation] Achieving Degradation Tolerance in a Hardware Accelerator with Parallel Functional Units2009
- Author(s)
  Tomohiro Yoneda, Masashi Imai, Hiroshi Saito, Atsushi Matsumoto
- Organizer
  WDSN2009
- Place of Presentation
  Lisbon, Portugal
- Year and Date
  2009-06-29
- Data Source
  KAKENHI-PROJECT-19300009
[Presentation] N-way-Ring and Square Arbiters2009
- Author(s)
  Masashi Imai, Tomohiro Yoneda, Takashi Nnaya
- Organizer
  ICCD2009
- Place of Presentation
  Lake Tahoe, CA, USA
- Year and Date
  2009-10-05
- Data Source
  KAKENHI-PROJECT-19300009
[Presentation] Fine-Grain Leakage Power Reduction Method for m-out-of-n Encoded Circuits Using Multi-Threshold-Voltage Transistors2009
- Author(s)
  Masashi Imai
- Organizer
  ASYNC2009
- Place of Presentation
  Chapel Hill, NC, USA
- Year and Date
  2009-05-20
- Data Source
  KAKENHI-PROJECT-19300009
[Presentation] Fine-grain leakage power reduction method for m-out-o-f-n encoded circuits using multi-threshold-voltage transistors2009
- Author(s)
  Masashi Imai, Kouei Takada, Takashi Nanya
- Organizer
  ASYNC2009 (accepted)
- Place of Presentation
  North Carolina, USA
- Year and Date
  2009-05-20
- Data Source
  KAKENHI-PROJECT-19700039
[Presentation] Design and Implementation of Fine-grain Power Gating with Ground Bounce Suppression2009
- Author(s)
  K.Usami, T.Shirai, T.Hashida, H.Masuda, S.Takeda, M.Nakata, N.Seki, H.Amano, M.Namiki, M.Imai, M.Kondo, and H.Nakamura
- Organizer
  22nd International Conference on VLSI Design (VLSI Conference'09)
- Place of Presentation
  (381-386)
- Data Source
  KAKENHI-PROJECT-18200002
[Presentation] N-way Ring and Square Arbiters2009
- Author(s)
  Masashi Imai
- Organizer
  ICCD2009
- Place of Presentation
  Lake Tahoe, CA, USA
- Year and Date
  2009-10-05
- Data Source
  KAKENHI-PROJECT-19300009
[Presentation] プロセス二重化とプロセス対交換によるチップマルチプロセッサの高信頼化手法2009
- Author(s)
  長井智英,今井雅,南谷崇
- Organizer
  デザインガイア 2009
- Place of Presentation
  高知
- Year and Date
  2009-12-03
- Data Source
  KAKENHI-PROJECT-19300009
[Presentation] Fine-grain Leakage Power Reduction Method for m-out-of-n Encoded Circuits Using Multi-Threshold-Voltage Transistors2009
- Author(s)
  Masashi Imai, Kouei Takada, Takashi Nanya
- Organizer
  Async2009
- Place of Presentation
  Chapel Hill, NC, USA
- Year and Date
  2009-05-20
- Data Source
  KAKENHI-PROJECT-19300009
[Presentation] Fine-grain Leakage Power Reduction Method for m-out-of-n Encoded Circuits Using Multi-Threshold-Voltage Transistors2009
- Author(s)
  Masashi Imai, Kouei Takada, Takashi Nanya
- Organizer
  Proc Async2009
- Place of Presentation
  Chapel Hill, NC, USA
- Data Source
  KAKENHI-PROJECT-19700039
[Presentation] Performance Comparison between Self-timed Circuits and Synchronous Circuits Based on the Technology Roadmap of Semicon ductors2008
- Author(s)
  Masashi Imai
- Organizer
  WDSN2008
- Place of Presentation
  Anchorage, USA
- Data Source
  KAKENHI-PROJECT-19300009
[Presentation] A Design Method for 1-out-of-4 Encoded Low-Power Self-Timed Circuits using Standard Cell Libraries2008
- Author(s)
  Masashi Imai, Takashi Nanya
- Organizer
  ACSD2008
- Place of Presentation
  Xian, China
- Data Source
  KAKENHI-PROJECT-19300009
[Presentation] A Design Method for 1-out-of-4 Encoded Low-Power Self-Timed Circuits using Standard Cell Libraries2008
- Author(s)
  Masashi Imai, Takashi Nanya
- Organizer
  8th International Conference on Application of Concurrency to System Design 2008 (to appear)
- Place of Presentation
  Xi'an, China
- Year and Date
  2008-06-25
- Data Source
  KAKENHI-PROJECT-19700039
[Presentation] Performance Comparison between Self-timed Circuits and Synchronous Circuits Based on the Technology Roadmap of Semiconductors2008
- Author(s)
  Masashi Imai, Takashi Nanya
- Organizer
  Proc. DSN08 2nd Workshop on Dependable and Secure Nanocomputing, Supplemental Proceedings
- Place of Presentation
  Anchorage, USA
- Data Source
  KAKENHI-PROJECT-19700039
[Presentation] マルチ閾値電圧トランジスタを用いた2線2相式非同期式回路のリーク電力削減手法2008
- Author(s)
  高田幸永, 今井雅, 中村宏, 南谷崇
- Organizer
  電子情報通信学会技術研究報告
- Place of Presentation
  (VLD-2008-90)(183-188)
- Data Source
  KAKENHI-PROJECT-18200002
[Presentation] マルチ閾値電圧トランジスタを用いた2線2相式非同期式回路のリーク電力削減手法2008
- Author(s)
  高田幸永, 今井雅, 南谷崇
- Organizer
  デザインガイア
- Place of Presentation
  北九州学園研究都市
- Year and Date
  2008-11-19
- Data Source
  KAKENHI-PROJECT-19700039
[Presentation] A Design Method for 1-out-of-4 Encoded Low-Power Self-Timed Circuits using Standard Cell Libraries2008
- Author(s)
  Masashi Imai, Takashi Nanya
- Organizer
  Proc. ACSD08
- Place of Presentation
  Xi-an, China
- Data Source
  KAKENHI-PROJECT-19700039
[Presentation] A Design Method for l-out-of-4 Encoded Low-Power Self-Timed Circuits using Standard Cell Libraries2008
- Author(s)
  Masashi Imai
- Organizer
  ACSD 2008
- Place of Presentation
  Xian, China
- Data Source
  KAKENHI-PROJECT-19300009
[Presentation] Performance Comparison between Self-Timed Circuits and Synchronous Circuits Based on the Technology Roadmap of Semiconductors2008
- Author(s)
  Masashi Imai, Takashi Nanya
- Organizer
  WDSN2008
- Place of Presentation
  Anchorage, USA
- Data Source
  KAKENHI-PROJECT-19300009
[Presentation] マルチ閾値電圧トランジスタを用いた2線2相式非同期式回路のリーク電力削減手法2008
- Author(s)
  高田幸永, 今井雅, 中村宏, 南谷崇
- Organizer
  デザインガイア 2008
- Place of Presentation
  福岡
- Data Source
  KAKENHI-PROJECT-19300009
[Presentation] 共有資源の優先度制御によるチップ・マルチプロセッサの省電力化手法2008
- Author(s)
  椎名公康, 近藤正章, 今井雅, 中村宏, 南谷崇
- Organizer
  SACSIS2008
- Place of Presentation
  広島
- Data Source
  KAKENHI-PROJECT-19300009
[Presentation] マルチ閾値電圧トランジスタを用いた2線2相式非同期式回路のリーク電力削減手法2008
- Author(s)
  高田幸永,今井雅,中村宏,南谷崇
- Organizer
  電子情報通信学会技術研究報告
- Place of Presentation
  北九州
- Data Source
  KAKENHI-PROJECT-19700039
[Presentation] 共有資源の優先度制御によるチップ・マルチプロセッサの省電力化手法2008
- Author(s)
  椎名公康, 近藤正章, 今井雅, 中村宏, 南谷崇
- Organizer
  第6回先進的計算基盤システムシンポジウム SACSIS 2008
- Place of Presentation
  (317-324)
- Data Source
  KAKENHI-PROJECT-18200002
[Presentation] プロセス変動を考慮した電流制御による低電力化手法2007
- Author(s)
  金均東, 今井雅, 中村宏, 南谷崇
- Organizer
  デザインガイア2007
- Place of Presentation
  福岡
- Data Source
  KAKENHI-PROJECT-19300009
[Presentation] 共有資源の優先度と電源電圧の協調制御によるチップマルチプロセッサの省電力化2007
- Author(s)
  椎名公康, 近藤正章, 今井雅, 中村宏, 南谷崇
- Organizer
  デザインガイア2007
- Place of Presentation
  福岡
- Data Source
  KAKENHI-PROJECT-19300009

1. NAKAMURA Hiroshi (20212102)

# of Collaborated Projects: 4 results

# of Collaborated Products: 9 results
2. YONEDA Tomohiro (30182851)

# of Collaborated Projects: 4 results

# of Collaborated Products: 6 results
3. Hanyu Takahiro (40192702)

# of Collaborated Projects: 4 results

# of Collaborated Products: 4 results
4. KONDO MASAAKI (30376660)

# of Collaborated Projects: 3 results

# of Collaborated Products: 9 results
5. NANYA Takashi (80143684)

# of Collaborated Projects: 3 results

# of Collaborated Products: 15 results
6. 鬼沢直哉 (90551557)

# of Collaborated Projects: 2 results

# of Collaborated Products: 4 results
7. 夏井雅典 (10402661)

# of Collaborated Projects: 2 results

# of Collaborated Products: 0 results
8. USAMI KIMIYOSHI (20365547)

# of Collaborated Projects: 1 results

# of Collaborated Products: 1 results
9. KAMIYAMA Kazuto (60447331)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
10. 吉瀬謙二 (50323887)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
11. 齋藤寛 (50361671)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
12. 池田正二 (90281865)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
13. 村口正和 (90386623)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
14. 柏倉幾郎 (00177370)

# of Collaborated Projects: 1 results

# of Collaborated Products: 1 results
15. 井瀧千恵子 (00285008)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
16. 松崎正敏 (10355688)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
17. 新岡丈典 (20722276)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
18. 辻口貴清 (90737454)

# of Collaborated Projects: 1 results

# of Collaborated Products: 1 results
19. 杉山祐子 (30196779)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results
20. 吉仲怜 (70548487)

# of Collaborated Projects: 1 results

# of Collaborated Products: 0 results

Imai Masashi 今井 雅

IMAI MASASHI 今井 雅

IMAI Masashi 今井 雅

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人工知能を活用した津軽弁から共通語への音声・文字情報変換システムの基盤技術開発Principal Investigator

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Establishment and Implementation of Multilayered Collaborative Methods to Ensure Security during Operation against Hardware TrojanPrincipal Investigator

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Development of Tamper-resistant Asynchronous Processors for Avoiding Information Leakage using Dynamic Analysis MethodsPrincipal Investigator

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Low-Power High-Performance VLSI design using 1-out-of-4 codePrincipal Investigator

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電圧可変マルチタイミング・インタフェースの設計技術に関する研究Principal Investigator

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[Journal Article] Development of an Automatic Chronological Record Creation System Using Voice AI to Facilitate Information Aggregation and Sharing in the Event of a Disaster2023

Author(s)

Journal Title

Data Source

Imai Masashi 今井雅

IMAI MASASHI 今井雅

IMAI Masashi 今井雅